Included proposals to false late collisions due to H/W latencies
Signed-off-by: NMallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com>
Signed-off-by: NGanesh Venkatesan <ganesh.venkatesan@intel.com>
Signed-off-by: NJohn Ronciak <john.ronciak@intel.com>