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    i2c: au1550: relax bus timings a bit · 8a5e3d47
    Manuel Lauss 提交于
    The i2c-au1550 driver has to program various setup and hold times
    for the sda/scl signals by hand.  The current values seem to be
    working best when the driver is supplied with 50MHz, however on the
    DB1300 board 48MHz is the closest we can get to it, and the timings
    are a bit too tight for that, leading to the last bit of a transmission
    sometimes being swallowed.  This manifests itself in wrong readings
    of the ne1619 sensor and inability to configure the wm8731 i2s codec.
    
    With the relaxed timings, both the sensor and the i2s codec can now
    be accessed more reliably over a wider range of I2C block input
    frequencies.
    
    Verified on DB1200, DB1300 and DB1550 boards.
    Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
    Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
    8a5e3d47
i2c-au1550.c 9.4 KB