This adds nodes to SDM845-dtsi for all the I2C ports, all the SPI
ports, and UART9.  Note that I2C / SPI / UART are a bit strange on
sdm845 because each "serial engine" has 4 pins associated with it and
depending on which firmware has been loaded into the serial engine
(loaded by the BIOS) the serial engine can behave like an I2C port, a
SPI port, or a UART.  As per the landed bindings that means that we
need to create one node for each possible mode that the port could be
in.  With 16 serial engines that means 16 x 3 = 48 nodes.

We get away with only creating 33 nodes for now because it seems very
likely that SDM845-based boards will actually all use the same UART
(UART 9) for debug purposes.  While another UART could be used for
something like Bluetooth communication we can cross that path when we
come to it.  Some documentation that I saw implied that using a UART
for "high speed" communications actually needs yet another different
serial engine firmware anyway.

Note that quick measurements adding all these nodes adds <10k of extra
space per dtb that they're included with.  If this becomes a problem
we may need to think of a different way to structure this so that
boards only get the nodes they need (or figure out how to get dtc to
strip 'disabled' nodes).  For now it seems OK.

These nodes were programmatically generated with a fairly dumb python
script.  See http://crosreview.com/1091631 for the source.

NOTE: at the moment SPI chip select doesn't appear to work in my tests
with the latest posted SPI driver.  All testing of SPI with this patch
has been done by hacking SPI to GPIO chip select.
Signed-off-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>