On the 83xx controller, snooping is necessary for the DMA controller to
ensure cache coherence with the CPU when transferring to/from RAM.

The last descriptor in a chain will always have the End-of-Chain interrupt
bit set, so we can set the snoop bit while adding the End-of-Chain
interrupt bit.
Signed-off-by: NIra W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: NLi Yang <leoli@freescale.com>