• C
    drm/i915/execlists: Read the context-status HEAD from the HWSP · 767a983a
    Chris Wilson 提交于
    The engine also provides a mirror of the CSB write pointer in the HWSP,
    but not of our read pointer. To take advantage of this we need to
    remember where we read up to on the last interrupt and continue off from
    there. This poses a problem following a reset, as we don't know where
    the hw will start writing from, and due to the use of power contexts we
    cannot perform that query during the reset itself. So we continue the
    current modus operandi of delaying the first read of the context-status
    read/write pointers until after the first interrupt. With this we should
    now have eliminated all uncached mmio reads in handling the
    context-status interrupt, though we still have the uncached mmio writes
    for submitting new work, and many uncached mmio reads in the global
    interrupt handler itself. Still a step in the right direction towards
    reducing our resubmit latency, although it appears lost in the noise!
    
    v2: Cannonlake moved the CSB write index
    v3: Include the sw/hwsp state in debugfs/i915_engine_info
    v4: Also revert to using CSB mmio for GVT-g
    v5: Prevent the compiler reloading tail (Mika)
    Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
    Cc: Michel Thierry <michel.thierry@intel.com>
    Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
    Cc: Mika Kuoppala <mika.kuoppala@intel.com>
    Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
    Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
    Cc: Zhi Wang <zhi.a.wang@intel.com>
    Acked-by: NMichel Thierry <michel.thierry@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20170913085605.18299-6-chris@chris-wilson.co.ukReviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
    767a983a
i915_debugfs.c 140.4 KB