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    powerpc/fsl_rio: Error interrupt handler for sRIO on MPC85xx · 6ff31453
    Shaohui Xie 提交于
    The sRIO controller reports errors to the core with one signal, it uses
    register EPWISR to provides the core quick access to where the error
    occurred.  The EPWISR indicates that there are 4 interrupts sources,
    port1, port2, message unit and port write receive, but the sRIO driver
    does not support port2 for now, still the handler takes care of port2.
    Currently the handler only clear error status without any recovery.
    Signed-off-by: NShaohui Xie <b21989@freescale.com>
    Cc: Li Yang <leoli@freescale.com>
    Cc: Kumar Gala <kumar.gala@freescale.com>
    Cc: Roy Zang <tie-fei.zang@freescale.com>
    Cc: Alexandre Bounine <alexandre.bounine@idt.com>
    Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
    6ff31453
fsl_rio.c 45.9 KB