Correction of the omap_usb3_dpll_params array when the sys_clk_rate is
20MHz.
Signed-off-by: NNikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: NRuchika Kharwar <ruchika@ti.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>