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    ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug init · 6e7aceeb
    Rob Herring 提交于
    Commit b8db6b88 (ARM: 7547/4: cache-l2x0: add support for Aurora L2 cache
    ctrl) moved the masking of the part ID which caused the RTL version to be
    lost. Commit 6248d060 (ARM: 7545/1: cache-l2x0: make outer_cache_fns a
    field of l2x0_of_data) changed how .set_debug is initialized. Both commits
    break commit 74ddcdb8 (ARM: 7608/1: l2x0: Only set .set_debug
    on PL310 r3p0 and earlier) which uses the RTL version to conditionally set
    .set_debug function pointer. Commit b8db6b88 also caused the printed cache
    ID to be missing the version information.
    
    Fix this by reverting how the part number is masked so the RTL version
    info is maintained. The cache-id-part DT property does not set the RTL
    bits so masking them should have no effect. Also, re-arrange the order
    of the function pointer init so the .set_debug function can be overridden.
    Reported-by: NPaolo Pisati <paolo.pisati@canonical.com>
    Signed-off-by: NRob Herring <rob.herring@calxeda.com>
    Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
    Cc: Yehuda Yitschak <yehuday@marvell.com>
    Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
    6e7aceeb
cache-l2x0.c 20.7 KB