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    MIPS: CPS: Early debug using an ns16550-compatible UART · 609cf6f2
    Paul Burton 提交于
    Provide support for outputting early debug information, in the form of
    various register values should an exception occur, during the early
    bringup of secondary cores. This code requires an ns16550-compatible
    UART accessible from the secondary core, and is written in assembly due
    to the environment in which such early exceptions occur where way may
    not have a stack, be coherent or even have initialised caches.
    
    [ralf@linux-mips.org: Fix merge conflict.]
    Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
    Cc: linux-mips@linux-mips.org
    Cc: Steven J. Hill <Steven.Hill@imgtec.com>
    Cc: Andrew Bresticker <abrestic@chromium.org>
    Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
    Cc: Maciej W. Rozycki <macro@linux-mips.org>
    Cc: Jason Cooper <jason@lakedaemon.net>
    Cc: linux-kernel@vger.kernel.org
    Cc: James Hogan <james.hogan@imgtec.com>
    Cc: Markos Chandras <markos.chandras@imgtec.com>
    Patchwork: https://patchwork.linux-mips.org/patch/11202/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
    609cf6f2
mipsregs.h 59.9 KB