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    AHCI: Support multiple MSIs · 5ca72c4f
    Alexander Gordeev 提交于
    Take advantage of multiple MSIs implementation on x86 - on
    systems with IRQ remapping AHCI ports not only get assigned
    separate MSI vectors - but also separate IRQs. As result,
    interrupts generated by different ports could be serviced on
    different CPUs rather than on a single one.
    
    In cases when number of allocated MSIs is less than requested
    the Sharing Last MSI mode does not get used, no matter
    implemented in hardware or not. Instead, the driver assumes the
    advantage of multiple MSIs is negated and falls back to the
    single MSI mode as if MRSM bit was set (some Intel chips
    implement this strategy anyway - MRSM bit gets set even if the
    number of allocated MSIs exceeds the number of implemented ports).
    Signed-off-by: NAlexander Gordeev <agordeev@redhat.com>
    Acked-by: NJeff Garzik <jgarzik@redhat.com>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Cc: Suresh Siddha <suresh.b.siddha@intel.com>
    Cc: Yinghai Lu <yinghai@kernel.org>
    Cc: Matthew Wilcox <willy@linux.intel.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Andrew Morton <akpm@linux-foundation.org>
    Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Link: http://lkml.kernel.org/r/15bf7ee314dd55f21ec7d2a01c47613cd8190a7c.1353324359.git.agordeev@redhat.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
    5ca72c4f
libahci.c 62.0 KB