This prepares for adding support for extended SPI mode (XSPI), by extending
the regmap with the extra SREX and CTAREx registers.

An additional register map is made for allowing 16 bit access to CMD and TX
FIFO of the PUSHR register separately, which is also needed for XSPI mode
support.
Signed-off-by: NEsben Haabendal <eha@deif.com>
Acked-by: NMartin Hundebøll <martin@geanix.com>
Signed-off-by: NMark Brown <broonie@kernel.org>