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    PCI/DPC: Clear interrupt status in interrupt handler top half · 56abbf8a
    Oza Pawandeep 提交于
    The generic IRQ handling code ensures that an interrupt handler runs with
    its interrupt masked or disabled.  If the interrupt is level-triggered, the
    interrupt handler must tell its device to stop asserting the interrupt
    before returning.  If it doesn't, we will immediately take the interrupt
    again when the handler returns and the generic code unmasks the interrupt.
    
    The driver doesn't know whether its interrupt is edge- or level-triggered,
    so it must clear its interrupt source directly in its interrupt handler.
    
    Previously we cleared the DPC interrupt status in the bottom half, i.e., in
    deferred work, which can cause an interrupt storm if the DPC interrupt
    happens to be level-triggered, e.g., if we're using INTx instead of MSI.
    
    Clear the DPC interrupt status bit in the interrupt handler, not in the
    deferred work.
    Signed-off-by: NOza Pawandeep <poza@codeaurora.org>
    [bhelgaas: changelog]
    Signed-off-by: NBjorn Helgaas <helgaas@kernel.org>
    Reviewed-by: NKeith Busch <keith.busch@intel.com>
    56abbf8a
dpc.c 9.2 KB