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    drm/i915: split intel_ddi_pll_mode_set in 2 pieces · 566b734a
    Paulo Zanoni 提交于
    The first piece, intel_ddi_pll_select, finds a PLL and assigns it to
    the CRTC, but doesn't write any register. It can also fail in case it
    doesn't find a PLL.
    
    The second piece, intel_ddi_pll_enable, uses the information stored by
    intel_ddi_pll_select to actually enable the PLL by writing to its
    register. This function can't fail. We also have some refcount sanity
    checks here.
    
    The idea is that one day we'll remove all the functions that touch
    registers from haswell_crtc_mode_set to haswell_crtc_enable, so we'll
    call intel_ddi_pll_select at haswell_crtc_mode_set and then call
    intel_ddi_pll_enable at haswell_crtc_enable. Since I'm already
    touching this code, let's take care of this particular split today.
    
    v2: - Clock on the debug message is in KHz
        - Add missing POSTING_READ
    Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
    Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
    [danvet: Bikeshed comments.]
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    566b734a
intel_ddi.c 44.4 KB