This reverts commit 5ddc7bd4 ("mtd: atmel_nand: Support variable
RB_EDGE interrupts")

Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR
register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy
line edge status bit. It is a datasheet bug.

Cc: <stable@vger.kernel.org>
Fixes: commit 5ddc7bd4 ("mtd: atmel_nand: Support variable RB_EDGE interrupts")
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>