Program the default initial value of the L3SqcReg1 on BDW for performance

v2: Default confirmed and using intel_ring_emit_wa as Mika pointed out.

v3: Spec shows now a different value. It tells us to set to 0x784000
    instead the 0x610000 that is there already.
    Also rebased after a long time so using WA_WRITE now.

Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>