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由 Zhou Wang 提交于
Add PCIe host support for HiSilicon SoC Hip05, related DT binding documentation, and maintainer update. [bhelgaas: changelog, 32-bit only config write warning text] Signed-off-by: NZhou Wang <wangzhou1@hisilicon.com> Signed-off-by: NGabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Nliudongdong <liudongdong3@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> (DT binding)
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