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    ARM: imx6: gpc: Add PU power domain for GPU/VPU · 00eb60a8
    Philipp Zabel 提交于
    When generic pm domain support is enabled, the PGC can be used
    to completely gate power to the PU power domain containing GPU3D,
    GPU2D, and VPU cores.
    This code triggers the PGC powerdown sequence to disable the GPU/VPU
    isolation cells and gate power and then disables the PU regulator.
    To reenable, the reverse powerup sequence is triggered after the PU
    regulator is enabled again.
    The GPU and VPU devices in the PU power domain temporarily need
    to be clocked during powerup, so that the reset machinery can work.
    
    [Avoid explicit regulator enabling in probe, unless !PM]
    Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
    Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
    Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
    00eb60a8
gpc.c 8.7 KB