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    xhci: The trb_address_map radix tree expects 1KB segment memory aligment · 84c1e40f
    Hans de Goede 提交于
    If we align segment dma pool memory to 64 bytes, then a segment can be located
    at 0x10000040 - 0x1000043f, and a segment from another ring at 0x10000440 -
    0x1000083f. The last trb in the first segment at 0x10000430 will then translate
    to the same radix tree key as the first trb of the second segment, while they
    are in different rings!
    
    This patches fixes this by changing the alignment of the dma pool to be 1KB
    rather then 64 bytes. An alternative fix would be to reduce the shift used
    to calculate the radix tree keys, but that would (slighlty) grow the radix
    trees so I believe this is the better fix.
    
    Note this patch is mostly theoretical since in practice I've not seen
    the dma_pool actually return not 1KB aligned memory.
    Signed-off-by: NHans de Goede <hdegoede@redhat.com>
    Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
    84c1e40f
xhci-mem.c 75.0 KB