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由 Gregory Herrero 提交于
Kmem caches help to get correct boundary for descriptor buffers which need to be 512 bytes aligned for dwc2 controller. Two kmem caches are needed for generic descriptors and for hs isochronous descriptors which doesn't have same size. Acked-by: NJohn Youn <johnyoun@synopsys.com> Signed-off-by: NGregory Herrero <gregory.herrero@intel.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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