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    powerpc/pci: fix PCI-e check link issue · 36f68494
    Yuanquan Chen 提交于
    For Freescale powerpc platform, the PCI-e bus number uses the reassign mode
    by default. It means the second PCI-e controller's hose->first_busno is the
    first controller's last bus number adding 1. For some hotpluged device(or
    controlled by FPGA), the device is linked to PCI-e slot at linux runtime.
    It needs rescan for the system to add it and driver it to work. It successes
    to rescan the device linked to the first PCI-e controller's slot, but fails to
    rescan the device linked to the second PCI-e controller's slot. The cause is
    that the bus->number is reset to 0, which isn't equal to the hose->first_busno
    for the second controller checking PCI-e link. So it doesn't really check the
    PCI-e link status, the link status is always no_link. The device won't be
    really rescaned. Reset the bus->number to hose->first_busno in the function
    fsl_pcie_check_link(), it will do the real checking PCI-e link status for the
    second controller, the device will be rescaned.
    Signed-off-by: NYuanquan Chen <Yuanquan.Chen@freescale.com>
    Tested-by: NRojhalat Ibrahim <imr@rtschenk.de>
    Signed-off-by: NScott Wood <scottwood@freescale.com>
    36f68494
fsl_pci.c 28.3 KB