Change the PHY clock divisor to make the MDIO clock 2.5MHz, instead of
3.5MHz (which is out of spec).
Signed-off-by: NTatyana Nikolova <Tatyana.E.Nikolova@intel.com>
Signed-off-by: NFaisal Latif <Faisal.Latif@intel.com>
Signed-off-by: NRoland Dreier <roland@purestorage.com>