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由 Hiroshi DOYU 提交于
DT passes the exact GART register ranges without any overlapping with MC register ranges. GART register offset needs to be adjusted by one passed by DT correctly. Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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