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    Ath5k: flush work · 274c7c36
    Jiri Slaby 提交于
    Make sure that the irq is not in progress after stop. This means
    two things:
    - ensure the intr setting register is set by flushing posted values
    - call synchronize_irq() after that
    
    Also flush stop tx write, inform callers of the tx stop about still
    pending transfers (unsuccessful stop) and finally don't wait another
    3ms in ath5k_rx_stop, since ath5k_hw_stop_rx_dma ensures transfer to
    be finished.
    
    Make sure all writes will be ordered in respect to locks by mmiowb().
    Signed-off-by: NJiri Slaby <jirislaby@gmail.com>
    Acked-by: NNick Kossifidis <mickflemm@gmail.com>
    Cc: Luis R. Rodriguez <mcgrof@gmail.com>
    Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
    274c7c36
base.c 80.9 KB