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    drm/i915: properly enable the blc controller on the right pipe · 24ded204
    Daniel Vetter 提交于
    On gen4+ we have a bitfield to specify from which pipe the backlight
    controller should take it's clock. For PCH split platforms we've
    already set these up, but only at initialization time. And without
    taking into account the 3rd pipe added with ivb.
    
    For gen4, we've completely ignored these. Although we do restrict lvds
    to the 2nd pipe, so this is only a problem on machines where we boot
    up with the lvds on the first pipe.
    
    So restructure the code to enable the backlight on the right pipe at
    modeset time.
    
    v2: For odd reasons panel_enable_backlight gets called twice in a
    modeset, so we can't WARN_ON in there if the backlight controller is
    switched on already.
    
    v3: backlight enable can also be called through dpms on, so the check
    in there is legit. Update the comment to reflect that.
    Tested-By: NKamal Mostafa <kamal@canonical.com>
    Bugzilla: https://bugs.launchpad.net/bugs/954661
    Cc: Carsten Emde <C.Emde@osadl.org>
    Reviewed-by: NEugeni Dodonov <eugeni.dodonov@intel.com>
    Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    24ded204
intel_panel.c 12.0 KB