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    MIPS: Netlogic: Optimize EIMR/EIRR accesses in 32-bit · 220d9122
    Jayachandran C 提交于
    Provide functions ack_c0_eirr(), set_c0_eimr(), clear_c0_eimr()
    and read_c0_eirr_and_eimr() that do the EIMR and EIRR operations
    and update the interrupt handling code to use these functions.
    Also, use the EIMR register functions to mask interrupts in the
    irq code.
    
    The 64-bit interrupt request and mask registers (EIRR and EIMR) are
    accessed when the interrupts are off, and the common operations are
    to set or clear a bit in these registers. Using the 64-bit c0 access
    functions for these operations is not optimal in 32-bit, because it
    will disable/restore interrupts and split/join the 64-bit value during
    each register access.
    Signed-off-by: NJayachandran C <jchandra@broadcom.com>
    Patchwork: http://patchwork.linux-mips.org/patch/4790/Signed-off-by: NJohn Crispin <blogic@openwrt.org>
    220d9122
smp.c 7.5 KB