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    PCI: Distribute available buses to hotplug-capable bridges · 1c02ea81
    Mika Westerberg 提交于
    System BIOS sometimes allocates extra bus space for hotplug-capable PCIe
    root/downstream ports. This space is needed if the device plugged to the
    port will have more hotplug-capable downstream ports. A good example of
    this is Thunderbolt. Each Thunderbolt device contains a PCIe switch and
    one or more hotplug-capable PCIe downstream ports where the daisy chain
    can be extended.
    
    Currently Linux only allocates minimal bus space to make sure all the
    enumerated devices barely fit there. The BIOS reserved extra space is
    not taken into consideration at all. Because of this we run out of bus
    space pretty quickly when more PCIe devices are attached to hotplug
    downstream ports in order to extend the chain.
    
    Modify the PCI core so we distribute the available BIOS allocated bus space
    equally between hotplug-capable bridges to make sure there is enough bus
    space for extending the hierarchy later on.
    
    Update kernel docs of the affected functions.
    Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
    Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
    1c02ea81
probe.c 74.1 KB