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    perf_counter: powerpc: Add processor back-end for MPC7450 family · 7325927e
    Paul Mackerras 提交于
    This adds support for the performance monitor hardware on the
    MPC7450 family of processors (7450, 7451, 7455, 7447/7457, 7447A,
    7448), used in the later Apple G4 powermacs/powerbooks and other
    machines.  These machines have 6 hardware counters with a unique
    set of events which can be counted on each counter, with some
    events being available on multiple counters.
    
    Raw event codes for these processors are (PMC << 8) + PMCSEL.
    If PMC is non-zero then the event is that selected by the given
    PMCSEL value for that PMC (hardware counter).  If PMC is zero
    then the event selected is one of the low-numbered ones that are
    common to several PMCs.  In this case PMCSEL must be <= 22 and
    the event is what that PMCSEL value would select on PMC1 (but
    it may be placed any other PMC that has the same event for that
    PMCSEL value).
    
    For events that count cycles or occurrences that exceed a threshold,
    the threshold requested can be specified in the 0x3f000 bits of the
    raw event codes.  If the event uses the threshold multiplier bit
    and that bit should be set, that is indicated with the 0x40000 bit
    of the raw event code.
    
    This fills in some of the generic cache events.  Unfortunately there
    are quite a few blank spaces in the table, partly because these
    processors tend to count cache hits rather than cache accesses.
    Signed-off-by: NPaul Mackerras <paulus@samba.org>
    Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
    Cc: linuxppc-dev@ozlabs.org
    Cc: benh@kernel.crashing.org
    LKML-Reference: <19000.55631.802122.696927@cargo.ozlabs.ibm.com>
    Signed-off-by: NIngo Molnar <mingo@elte.hu>
    7325927e
mpc7450-pmu.c 10.0 KB