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由 Stefan Agner 提交于
The i.MX 7 designs Ethernet PLL provides a 1000MHz reference clock. Store the reference clock in the clk_pllv3 structure according to the PLL type. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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