Two issues are fixed here:

 - I2S transmits the left frame with the clock low but I don't seem to
   get LRCLK out without SFRMDLY being set so invert SFRMP and set a
   delay.
 - I2S has a clock cycle prior to the first data byte in each channel
   so we need to delay the data by one cycle.
Tested-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>