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由 Graeme Gregory 提交于
xgene v1/v2 8250 UARTs don't run at the standard clock rate expected by the driver and there is no information on clocking available from the SPCR table. As there has been no progress on relevant vendors updating DBG2/SPCR specifications to fix this work around this using the previous xgene quirk handling to avoid setting a baud rate and therefore using the UART as configured by firmware. Signed-off-by: NGraeme Gregory <graeme.gregory@linaro.org> Tested-by: NMark Salter <msalter@redhat.com> Reviewed-by: NMark Salter <msalter@redhat.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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