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    [ARM] 5577/2: ep93xx: syscon locked register functions · 02239f0a
    Hartley Sweeten 提交于
    Add core functions to handle writes to the ep93xx software locked
    registers.
    
    There are a number of registers in the EP93xx System Controller
    that require a write to the software lock register before they
    can be updated. This patch adds a number of exported functions
    to the ep93xx core that handle this access.
    
    The software locked clock divider registers, VidClkDiv, MIRClkDiv,
    I2SClkDiv and KeyTchClkDiv would typically involve writing a
    specific value to the register. To support this the
    ep93xx_syscon_swlocked_write() function is provided.
    
    For the DeviceCfg register it's more typical to only need to
    set or clear a single bit. A generic ep93xx_devcfg_set_clear()
    function is provided to handle both operations. Two inline
    functions, ep93xx_devcfg_set_bits() and ep93xx_devcfg_clear_bits()
    are also provided to improve code readability.
    
    In addition, the remaining bits in the System Controller Device
    Config Register have been documented and the previously defined
    names shortened.
    
    All code paths that use this functionality have been updated
    except for arch/arm/kernel/crunch.c. That code is in a context
    switch path, which is not reentrant, so it is safe against itself.
    
    Cc: Lennert Buytenhek <buytenh@wantstofly.org>
    Cc: Matthias Kaehlcke <matthias@kaehlcke.net>
    Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
    Acked-by: NRyan Mallon <ryan@bluewatersys.com>
    Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
    02239f0a
core.c 16.4 KB