ar9132.dtsi 2.4 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133
/ {
	compatible = "qca,ar9132";

	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "mips,mips24Kc";
			reg = <0>;
		};
	};

	cpuintc: interrupt-controller {
		compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";

		interrupt-controller;
		#interrupt-cells = <1>;

		qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
		qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
					<&ddr_ctrl 0>, <&ddr_ctrl 1>;
	};

	ahb {
		compatible = "simple-bus";
		ranges;

		#address-cells = <1>;
		#size-cells = <1>;

		interrupt-parent = <&cpuintc>;

		apb {
			compatible = "simple-bus";
			ranges;

			#address-cells = <1>;
			#size-cells = <1>;

			interrupt-parent = <&miscintc>;

			ddr_ctrl: memory-controller@18000000 {
				compatible = "qca,ar9132-ddr-controller",
						"qca,ar7240-ddr-controller";
				reg = <0x18000000 0x100>;

				#qca,ddr-wb-channel-cells = <1>;
			};

			uart@18020000 {
				compatible = "ns8250";
				reg = <0x18020000 0x20>;
				interrupts = <3>;

				clocks = <&pll 2>;
				clock-names = "uart";

				reg-io-width = <4>;
				reg-shift = <2>;
				no-loopback-test;

				status = "disabled";
			};

			gpio: gpio@18040000 {
				compatible = "qca,ar9132-gpio",
						"qca,ar7100-gpio";
				reg = <0x18040000 0x30>;
				interrupts = <2>;

				ngpios = <22>;

				gpio-controller;
				#gpio-cells = <2>;

				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pll: pll-controller@18050000 {
				compatible = "qca,ar9132-ppl",
						"qca,ar9130-pll";
				reg = <0x18050000 0x20>;

				clock-names = "ref";
				/* The board must provides the ref clock */

				#clock-cells = <1>;
				clock-output-names = "cpu", "ddr", "ahb";
			};

			wdt@18060008 {
				compatible = "qca,ar7130-wdt";
				reg = <0x18060008 0x8>;

				interrupts = <4>;

				clocks = <&pll 2>;
				clock-names = "wdt";
			};

			miscintc: interrupt-controller@18060010 {
				compatible = "qca,ar9132-misc-intc",
					   "qca,ar7100-misc-intc";
				reg = <0x18060010 0x4>;

				interrupt-parent = <&cpuintc>;
				interrupts = <6>;

				interrupt-controller;
				#interrupt-cells = <1>;
			};
		};

		spi@1f000000 {
			compatible = "qca,ar9132-spi", "qca,ar7100-spi";
			reg = <0x1f000000 0x10>;

			clocks = <&pll 2>;
			clock-names = "ahb";

			status = "disabled";

			#address-cells = <1>;
			#size-cells = <0>;
		};
	};
};