cx23885.h 20.6 KB
Newer Older
1 2 3
/*
 *  Driver for the Conexant CX23885 PCIe bridge
 *
4
 *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/pci.h>
#include <linux/i2c.h>
#include <linux/kdev_t.h>
25
#include <linux/slab.h>
26

27
#include <media/v4l2-device.h>
28
#include <media/v4l2-fh.h>
29
#include <media/v4l2-ctrls.h>
30 31
#include <media/tuner.h>
#include <media/tveeprom.h>
32 33
#include <media/videobuf-dma-sg.h>
#include <media/videobuf-dvb.h>
34
#include <media/rc-core.h>
35 36 37

#include "btcx-risc.h"
#include "cx23885-reg.h"
38
#include "media/cx2341x.h"
39 40 41

#include <linux/mutex.h>

42
#define CX23885_VERSION "0.0.3"
43 44 45 46 47 48 49

#define UNSET (-1U)

#define CX23885_MAXBOARDS 8

/* Max number of inputs by card */
#define MAX_CX23885_INPUT 8
50 51 52 53
#define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
#define RESOURCE_OVERLAY       1
#define RESOURCE_VIDEO         2
#define RESOURCE_VBI           4
54 55 56 57 58 59 60

#define BUFFER_TIMEOUT     (HZ)  /* 0.5 seconds */

#define CX23885_BOARD_NOAUTO               UNSET
#define CX23885_BOARD_UNKNOWN                  0
#define CX23885_BOARD_HAUPPAUGE_HVR1800lp      1
#define CX23885_BOARD_HAUPPAUGE_HVR1800        2
61
#define CX23885_BOARD_HAUPPAUGE_HVR1250        3
62
#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP   4
63
#define CX23885_BOARD_HAUPPAUGE_HVR1500Q       5
64
#define CX23885_BOARD_HAUPPAUGE_HVR1500        6
65
#define CX23885_BOARD_HAUPPAUGE_HVR1200        7
66
#define CX23885_BOARD_HAUPPAUGE_HVR1700        8
67
#define CX23885_BOARD_HAUPPAUGE_HVR1400        9
68
#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
69
#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
70
#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
71
#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F   13
72
#define CX23885_BOARD_TBS_6920                 14
73
#define CX23885_BOARD_TEVII_S470               15
74
#define CX23885_BOARD_DVBWORLD_2005            16
75
#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI      17
76
#define CX23885_BOARD_HAUPPAUGE_HVR1270        18
77
#define CX23885_BOARD_HAUPPAUGE_HVR1275        19
78
#define CX23885_BOARD_HAUPPAUGE_HVR1255        20
79
#define CX23885_BOARD_HAUPPAUGE_HVR1210        21
80
#define CX23885_BOARD_MYGICA_X8506             22
81
#define CX23885_BOARD_MAGICPRO_PROHDTVE2       23
82
#define CX23885_BOARD_HAUPPAUGE_HVR1850        24
83
#define CX23885_BOARD_COMPRO_VIDEOMATE_E800    25
84
#define CX23885_BOARD_HAUPPAUGE_HVR1290        26
85
#define CX23885_BOARD_MYGICA_X8558PRO          27
86
#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
87
#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID     29
88
#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
89
#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
90
#define CX23885_BOARD_MPX885                   32
91
#define CX23885_BOARD_MYGICA_X8507             33
92
#define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
93
#define CX23885_BOARD_TEVII_S471               35
94
#define CX23885_BOARD_HAUPPAUGE_HVR1255_22111  36
95
#define CX23885_BOARD_PROF_8000                37
96
#define CX23885_BOARD_HAUPPAUGE_HVR4400        38
97
#define CX23885_BOARD_AVERMEDIA_HC81R          39
98 99
#define CX23885_BOARD_TBS_6981                 40
#define CX23885_BOARD_TBS_6980                 41
100
#define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
101
#define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE     43
102
#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44
103

104 105 106 107 108 109 110 111 112 113
#define GPIO_0 0x00000001
#define GPIO_1 0x00000002
#define GPIO_2 0x00000004
#define GPIO_3 0x00000008
#define GPIO_4 0x00000010
#define GPIO_5 0x00000020
#define GPIO_6 0x00000040
#define GPIO_7 0x00000080
#define GPIO_8 0x00000100
#define GPIO_9 0x00000200
114 115 116 117 118 119
#define GPIO_10 0x00000400
#define GPIO_11 0x00000800
#define GPIO_12 0x00001000
#define GPIO_13 0x00002000
#define GPIO_14 0x00004000
#define GPIO_15 0x00008000
120

121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143
/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
#define CX23885_NORMS (\
	V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
	V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
	V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
	V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)

struct cx23885_fmt {
	char  *name;
	u32   fourcc;          /* v4l2 format id */
	int   depth;
	int   flags;
	u32   cxformat;
};

struct cx23885_tvnorm {
	char		*name;
	v4l2_std_id	id;
	u32		cxiformat;
	u32		cxoformat;
};

struct cx23885_fh {
144
	struct v4l2_fh		   fh;
145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160
	struct cx23885_dev         *dev;
	u32                        resources;

	/* video capture */
	struct cx23885_fmt         *fmt;
	unsigned int               width, height;

	/* vbi capture */
	struct videobuf_queue      vidq;
	struct videobuf_queue      vbiq;

	/* MPEG Encoder specifics ONLY */
	struct videobuf_queue      mpegq;
	atomic_t                   v4l_reading;
};

161 162 163 164 165 166
enum cx23885_itype {
	CX23885_VMUX_COMPOSITE1 = 1,
	CX23885_VMUX_COMPOSITE2,
	CX23885_VMUX_COMPOSITE3,
	CX23885_VMUX_COMPOSITE4,
	CX23885_VMUX_SVIDEO,
167
	CX23885_VMUX_COMPONENT,
168 169 170 171 172 173 174
	CX23885_VMUX_TELEVISION,
	CX23885_VMUX_CABLE,
	CX23885_VMUX_DVB,
	CX23885_VMUX_DEBUG,
	CX23885_RADIO,
};

175 176 177 178 179
enum cx23885_src_sel_type {
	CX23885_SRC_SEL_EXT_656_VIDEO = 0,
	CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
};

180 181 182 183 184 185 186 187 188 189 190 191 192 193 194
/* buffer for one video frame */
struct cx23885_buffer {
	/* common v4l buffer stuff -- must be first */
	struct videobuf_buffer vb;

	/* cx23885 specific */
	unsigned int           bpl;
	struct btcx_riscmem    risc;
	struct cx23885_fmt     *fmt;
	u32                    count;
};

struct cx23885_input {
	enum cx23885_itype type;
	unsigned int    vmux;
195
	unsigned int    amux;
196 197 198
	u32             gpio0, gpio1, gpio2, gpio3;
};

199 200
typedef enum {
	CX23885_MPEG_UNDEFINED = 0,
201 202
	CX23885_MPEG_DVB,
	CX23885_ANALOG_VIDEO,
203
	CX23885_MPEG_ENCODER,
204 205
} port_t;

206 207
struct cx23885_board {
	char                    *name;
208
	port_t			porta, portb, portc;
209
	int		num_fds_portb, num_fds_portc;
210 211 212 213
	unsigned int		tuner_type;
	unsigned int		radio_type;
	unsigned char		tuner_addr;
	unsigned char		radio_addr;
214
	unsigned int		tuner_bus;
215 216 217

	/* Vendors can and do run the PCIe bridge at different
	 * clock rates, driven physically by crystals on the PCBs.
L
Lucas De Marchi 已提交
218
	 * The core has to accommodate this. This allows the user
219 220 221 222 223 224 225
	 * to add new boards with new frequencys. The value is
	 * expressed in Hz.
	 *
	 * The core framework will default this value based on
	 * current designs, but it can vary.
	 */
	u32			clk_freq;
226
	struct cx23885_input    input[MAX_CX23885_INPUT];
227
	int			ci_type; /* for NetUP */
228 229
	/* Force bottom field first during DMA (888 workaround) */
	u32                     force_bff;
230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270
};

struct cx23885_subid {
	u16     subvendor;
	u16     subdevice;
	u32     card;
};

struct cx23885_i2c {
	struct cx23885_dev *dev;

	int                        nr;

	/* i2c i/o */
	struct i2c_adapter         i2c_adap;
	struct i2c_client          i2c_client;
	u32                        i2c_rc;

	/* 885 registers used for raw addess */
	u32                        i2c_period;
	u32                        reg_ctrl;
	u32                        reg_stat;
	u32                        reg_addr;
	u32                        reg_rdata;
	u32                        reg_wdata;
};

struct cx23885_dmaqueue {
	struct list_head       active;
	struct list_head       queued;
	struct timer_list      timeout;
	struct btcx_riscmem    stopper;
	u32                    count;
};

struct cx23885_tsport {
	struct cx23885_dev *dev;

	int                        nr;
	int                        sram_chno;

271
	struct videobuf_dvb_frontends frontends;
272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295

	/* dma queues */
	struct cx23885_dmaqueue    mpegq;
	u32                        ts_packet_size;
	u32                        ts_packet_count;

	int                        width;
	int                        height;

	spinlock_t                 slock;

	/* registers */
	u32                        reg_gpcnt;
	u32                        reg_gpcnt_ctl;
	u32                        reg_dma_ctl;
	u32                        reg_lngth;
	u32                        reg_hw_sop_ctrl;
	u32                        reg_gen_ctrl;
	u32                        reg_bd_pkt_status;
	u32                        reg_sop_status;
	u32                        reg_fifo_ovfl_stat;
	u32                        reg_vld_misc;
	u32                        reg_ts_clk_en;
	u32                        reg_ts_int_msk;
296
	u32                        reg_ts_int_stat;
297
	u32                        reg_src_sel;
298 299 300 301 302 303 304

	/* Default register vals */
	int                        pci_irqmask;
	u32                        dma_ctl_val;
	u32                        ts_int_msk_val;
	u32                        gen_ctrl_val;
	u32                        ts_clk_en_val;
305
	u32                        src_sel_val;
306 307
	u32                        vld_misc_val;
	u32                        hw_sop_ctrl_val;
308 309 310

	/* Allow a single tsport to have multiple frontends */
	u32                        num_frontends;
311
	void                (*gate_ctrl)(struct cx23885_tsport *port, int open);
312
	void                       *port_priv;
313 314 315

	/* Workaround for a temp dvb_frontend that the tuner can attached to */
	struct dvb_frontend analog_fe;
316 317

	int (*set_frontend)(struct dvb_frontend *fe);
318 319
};

320 321
struct cx23885_kernel_ir {
	struct cx23885_dev	*cx;
322 323 324
	char			*name;
	char			*phys;

325
	struct rc_dev		*rc;
326 327
};

328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355
struct cx23885_audio_buffer {
	unsigned int		bpl;
	struct btcx_riscmem	risc;
	struct videobuf_dmabuf	dma;
};

struct cx23885_audio_dev {
	struct cx23885_dev	*dev;

	struct pci_dev		*pci;

	struct snd_card		*card;

	spinlock_t		lock;

	atomic_t		count;

	unsigned int		dma_size;
	unsigned int		period_size;
	unsigned int		num_periods;

	struct videobuf_dmabuf	*dma_risc;

	struct cx23885_audio_buffer   *buf;

	struct snd_pcm_substream *substream;
};

356 357
struct cx23885_dev {
	atomic_t                   refcount;
358
	struct v4l2_device 	   v4l2_dev;
359
	struct v4l2_ctrl_handler   ctrl_handler;
360 361 362 363 364 365 366 367

	/* pci stuff */
	struct pci_dev             *pci;
	unsigned char              pci_rev, pci_lat;
	int                        pci_bus, pci_slot;
	u32                        __iomem *lmmio;
	u8                         __iomem *bmmio;
	int                        pci_irqmask;
368
	spinlock_t		   pci_irqmask_lock; /* protects mask reg too */
369
	int                        hwrevision;
370

371 372 373 374
	/* This valud is board specific and is used to configure the
	 * AV core so we see nice clean and stable video and audio. */
	u32                        clk_freq;

375
	/* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
376 377 378 379
	struct cx23885_i2c         i2c_bus[3];

	int                        nr;
	struct mutex               lock;
380
	struct mutex               gpio_lock;
381 382 383 384 385

	/* board details */
	unsigned int               board;
	char                       name[32];

386
	struct cx23885_tsport      ts1, ts2;
387 388 389

	/* sram configuration */
	struct sram_channel        *sram_channels;
390 391 392 393 394

	enum {
		CX23885_BRIDGE_UNDEFINED = 0,
		CX23885_BRIDGE_885 = 885,
		CX23885_BRIDGE_887 = 887,
395
		CX23885_BRIDGE_888 = 888,
396
	} bridge;
397 398 399 400

	/* Analog video */
	u32                        resources;
	unsigned int               input;
401
	unsigned int               audinput; /* Selectable audio input */
402 403 404 405
	u32                        tvaudio;
	v4l2_std_id                tvnorm;
	unsigned int               tuner_type;
	unsigned char              tuner_addr;
406
	unsigned int               tuner_bus;
407 408
	unsigned int               radio_type;
	unsigned char              radio_addr;
409
	struct v4l2_subdev 	   *sd_cx25840;
410
	struct work_struct	   cx25840_work;
411 412 413 414 415 416 417

	/* Infrared */
	struct v4l2_subdev         *sd_ir;
	struct work_struct	   ir_rx_work;
	unsigned long		   ir_rx_notifications;
	struct work_struct	   ir_tx_work;
	unsigned long		   ir_tx_notifications;
418

419
	struct cx23885_kernel_ir   *kernel_ir;
420 421
	atomic_t		   ir_input_stopping;

422 423 424 425 426 427 428 429
	/* V4l */
	u32                        freq;
	struct video_device        *video_dev;
	struct video_device        *vbi_dev;

	struct cx23885_dmaqueue    vidq;
	struct cx23885_dmaqueue    vbiq;
	spinlock_t                 slock;
430 431 432

	/* MPEG Encoder ONLY settings */
	u32                        cx23417_mailbox;
433
	struct cx2341x_handler     cxhdl;
434 435 436 437
	struct video_device        *v4l_device;
	atomic_t                   v4l_reader_count;
	struct cx23885_tvnorm      encodernorm;

438 439 440
	/* Analog raw audio */
	struct cx23885_audio_dev   *audio_dev;

441 442
};

443 444 445 446 447
static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
{
	return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
}

448 449 450
#define call_all(dev, o, f, args...) \
	v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)

451 452
#define CX23885_HW_888_IR  (1 << 0)
#define CX23885_HW_AV_CORE (1 << 1)
453 454 455 456 457 458

#define call_hw(dev, grpid, o, f, args...) \
	v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)

extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);

459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479
#define SRAM_CH01  0 /* Video A */
#define SRAM_CH02  1 /* VBI A */
#define SRAM_CH03  2 /* Video B */
#define SRAM_CH04  3 /* Transport via B */
#define SRAM_CH05  4 /* VBI B */
#define SRAM_CH06  5 /* Video C */
#define SRAM_CH07  6 /* Transport via C */
#define SRAM_CH08  7 /* Audio Internal A */
#define SRAM_CH09  8 /* Audio Internal B */
#define SRAM_CH10  9 /* Audio External */
#define SRAM_CH11 10 /* COMB_3D_N */
#define SRAM_CH12 11 /* Comb 3D N1 */
#define SRAM_CH13 12 /* Comb 3D N2 */
#define SRAM_CH14 13 /* MOE Vid */
#define SRAM_CH15 14 /* MOE RSLT */

struct sram_channel {
	char *name;
	u32  cmds_start;
	u32  ctrl_start;
	u32  cdt;
480
	u32  fifo_start;
481 482 483 484 485 486 487 488 489 490 491
	u32  fifo_size;
	u32  ptr1_reg;
	u32  ptr2_reg;
	u32  cnt1_reg;
	u32  cnt2_reg;
	u32  jumponly;
};

/* ----------------------------------------------------------- */

#define cx_read(reg)             readl(dev->lmmio + ((reg)>>2))
492
#define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
493

494
#define cx_andor(reg, mask, value) \
495 496 497
  writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  ((value) & (mask)), dev->lmmio+((reg)>>2))

498 499
#define cx_set(reg, bit)          cx_andor((reg), (bit), (bit))
#define cx_clear(reg, bit)        cx_andor((reg), (bit), 0)
500 501

/* ----------------------------------------------------------- */
502 503 504 505 506 507 508 509
/* cx23885-core.c                                              */

extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
	struct sram_channel *ch,
	unsigned int bpl, u32 risc);

extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
	struct sram_channel *ch);
510

511 512 513 514 515 516 517 518
extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
	u32 reg, u32 mask, u32 value);

extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
	struct scatterlist *sglist,
	unsigned int top_offset, unsigned int bottom_offset,
	unsigned int bpl, unsigned int padding, unsigned int lines);

519 520 521 522 523
extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
	struct btcx_riscmem *risc, struct scatterlist *sglist,
	unsigned int top_offset, unsigned int bottom_offset,
	unsigned int bpl, unsigned int padding, unsigned int lines);

524 525 526 527 528 529 530 531
void cx23885_cancel_buffers(struct cx23885_tsport *port);

extern int cx23885_restart_queue(struct cx23885_tsport *port,
				struct cx23885_dmaqueue *q);

extern void cx23885_wakeup(struct cx23885_tsport *port,
			   struct cx23885_dmaqueue *q, u32 count);

532 533
extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
534
extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
535 536 537
extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
	int asoutput);

538 539 540 541
extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
542 543 544

/* ----------------------------------------------------------- */
/* cx23885-cards.c                                             */
545 546 547 548 549 550
extern struct cx23885_board cx23885_boards[];
extern const unsigned int cx23885_bcount;

extern struct cx23885_subid cx23885_subids[];
extern const unsigned int cx23885_idcount;

551 552
extern int cx23885_tuner_callback(void *priv, int component,
	int command, int arg);
553
extern void cx23885_card_list(struct cx23885_dev *dev);
554
extern int  cx23885_ir_init(struct cx23885_dev *dev);
555 556
extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
extern void cx23885_ir_fini(struct cx23885_dev *dev);
557
extern void cx23885_gpio_setup(struct cx23885_dev *dev);
558 559 560 561 562 563
extern void cx23885_card_setup(struct cx23885_dev *dev);
extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);

extern int cx23885_dvb_register(struct cx23885_tsport *port);
extern int cx23885_dvb_unregister(struct cx23885_tsport *port);

564 565 566 567 568 569 570 571
extern int cx23885_buf_prepare(struct videobuf_queue *q,
			       struct cx23885_tsport *port,
			       struct cx23885_buffer *buf,
			       enum v4l2_field field);
extern void cx23885_buf_queue(struct cx23885_tsport *port,
			      struct cx23885_buffer *buf);
extern void cx23885_free_buffer(struct videobuf_queue *q,
				struct cx23885_buffer *buf);
572 573

/* ----------------------------------------------------------- */
574 575 576 577 578
/* cx23885-video.c                                             */
/* Video */
extern int cx23885_video_register(struct cx23885_dev *dev);
extern void cx23885_video_unregister(struct cx23885_dev *dev);
extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
579 580
extern void cx23885_video_wakeup(struct cx23885_dev *dev,
	struct cx23885_dmaqueue *q, u32 count);
581 582 583
int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
int cx23885_set_input(struct file *file, void *priv, unsigned int i);
int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
584
int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
585
int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
586 587 588 589 590 591 592

/* ----------------------------------------------------------- */
/* cx23885-vbi.c                                               */
extern int cx23885_vbi_fmt(struct file *file, void *priv,
	struct v4l2_format *f);
extern void cx23885_vbi_timeout(unsigned long data);
extern struct videobuf_queue_ops cx23885_vbi_qops;
593 594 595
extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
	struct cx23885_dmaqueue *q);
extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
596

597 598 599
/* cx23885-i2c.c                                                */
extern int cx23885_i2c_register(struct cx23885_i2c *bus);
extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
600
extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
601

602 603 604 605 606 607 608 609 610
/* ----------------------------------------------------------- */
/* cx23885-417.c                                               */
extern int cx23885_417_register(struct cx23885_dev *dev);
extern void cx23885_417_unregister(struct cx23885_dev *dev);
extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
extern void cx23885_mc417_init(struct cx23885_dev *dev);
extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
611 612 613 614
extern int mc417_register_read(struct cx23885_dev *dev,
				u16 address, u32 *value);
extern int mc417_register_write(struct cx23885_dev *dev,
				u16 address, u32 value);
615 616 617
extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
618

619 620
/* ----------------------------------------------------------- */
/* cx23885-alsa.c                                             */
621 622 623
extern struct cx23885_audio_dev *cx23885_audio_register(
					struct cx23885_dev *dev);
extern void cx23885_audio_unregister(struct cx23885_dev *dev);
624 625 626 627 628 629 630
extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
extern int cx23885_risc_databuffer(struct pci_dev *pci,
				   struct btcx_riscmem *risc,
				   struct scatterlist *sglist,
				   unsigned int bpl,
				   unsigned int lines,
				   unsigned int lpi);
631

632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648
/* ----------------------------------------------------------- */
/* tv norms                                                    */

static inline unsigned int norm_maxw(v4l2_std_id norm)
{
	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
}

static inline unsigned int norm_maxh(v4l2_std_id norm)
{
	return (norm & V4L2_STD_625_50) ? 576 : 480;
}

static inline unsigned int norm_swidth(v4l2_std_id norm)
{
	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
}