svm.c 141.0 KB
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/*
 * Kernel-based Virtual Machine driver for Linux
 *
 * AMD SVM support
 *
 * Copyright (C) 2006 Qumranet, Inc.
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 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
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 *
 * Authors:
 *   Yaniv Kamay  <yaniv@qumranet.com>
 *   Avi Kivity   <avi@qumranet.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 */
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#define pr_fmt(fmt) "SVM: " fmt

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#include <linux/kvm_host.h>

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#include "irq.h"
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#include "mmu.h"
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#include "kvm_cache_regs.h"
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#include "x86.h"
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#include "cpuid.h"
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#include "pmu.h"
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/kernel.h>
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#include <linux/vmalloc.h>
#include <linux/highmem.h>
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#include <linux/sched.h>
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#include <linux/trace_events.h>
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#include <linux/slab.h>
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#include <linux/amd-iommu.h>
#include <linux/hashtable.h>
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#include <linux/frame.h>
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#include <asm/apic.h>
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#include <asm/perf_event.h>
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#include <asm/tlbflush.h>
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#include <asm/desc.h>
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#include <asm/debugreg.h>
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#include <asm/kvm_para.h>
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#include <asm/irq_remapping.h>
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#include <asm/virtext.h>
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#include "trace.h"
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#define __ex(x) __kvm_handle_fault_on_reboot(x)

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MODULE_AUTHOR("Qumranet");
MODULE_LICENSE("GPL");

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static const struct x86_cpu_id svm_cpu_id[] = {
	X86_FEATURE_MATCH(X86_FEATURE_SVM),
	{}
};
MODULE_DEVICE_TABLE(x86cpu, svm_cpu_id);

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#define IOPM_ALLOC_ORDER 2
#define MSRPM_ALLOC_ORDER 1

#define SEG_TYPE_LDT 2
#define SEG_TYPE_BUSY_TSS16 3

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#define SVM_FEATURE_NPT            (1 <<  0)
#define SVM_FEATURE_LBRV           (1 <<  1)
#define SVM_FEATURE_SVML           (1 <<  2)
#define SVM_FEATURE_NRIP           (1 <<  3)
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#define SVM_FEATURE_TSC_RATE       (1 <<  4)
#define SVM_FEATURE_VMCB_CLEAN     (1 <<  5)
#define SVM_FEATURE_FLUSH_ASID     (1 <<  6)
#define SVM_FEATURE_DECODE_ASSIST  (1 <<  7)
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#define SVM_FEATURE_PAUSE_FILTER   (1 << 10)
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#define SVM_AVIC_DOORBELL	0xc001011b

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#define NESTED_EXIT_HOST	0	/* Exit handled on host level */
#define NESTED_EXIT_DONE	1	/* Exit caused nested vmexit  */
#define NESTED_EXIT_CONTINUE	2	/* Further checks needed      */

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#define DEBUGCTL_RESERVED_BITS (~(0x3fULL))

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#define TSC_RATIO_RSVD          0xffffff0000000000ULL
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#define TSC_RATIO_MIN		0x0000000000000001ULL
#define TSC_RATIO_MAX		0x000000ffffffffffULL
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#define AVIC_HPA_MASK	~((0xFFFULL << 52) | 0xFFF)
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/*
 * 0xff is broadcast, so the max index allowed for physical APIC ID
 * table is 0xfe.  APIC IDs above 0xff are reserved.
 */
#define AVIC_MAX_PHYSICAL_ID_COUNT	255

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#define AVIC_UNACCEL_ACCESS_WRITE_MASK		1
#define AVIC_UNACCEL_ACCESS_OFFSET_MASK		0xFF0
#define AVIC_UNACCEL_ACCESS_VECTOR_MASK		0xFFFFFFFF

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/* AVIC GATAG is encoded using VM and VCPU IDs */
#define AVIC_VCPU_ID_BITS		8
#define AVIC_VCPU_ID_MASK		((1 << AVIC_VCPU_ID_BITS) - 1)

#define AVIC_VM_ID_BITS			24
#define AVIC_VM_ID_NR			(1 << AVIC_VM_ID_BITS)
#define AVIC_VM_ID_MASK			((1 << AVIC_VM_ID_BITS) - 1)

#define AVIC_GATAG(x, y)		(((x & AVIC_VM_ID_MASK) << AVIC_VCPU_ID_BITS) | \
						(y & AVIC_VCPU_ID_MASK))
#define AVIC_GATAG_TO_VMID(x)		((x >> AVIC_VCPU_ID_BITS) & AVIC_VM_ID_MASK)
#define AVIC_GATAG_TO_VCPUID(x)		(x & AVIC_VCPU_ID_MASK)

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static bool erratum_383_found __read_mostly;

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static const u32 host_save_user_msrs[] = {
#ifdef CONFIG_X86_64
	MSR_STAR, MSR_LSTAR, MSR_CSTAR, MSR_SYSCALL_MASK, MSR_KERNEL_GS_BASE,
	MSR_FS_BASE,
#endif
	MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
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	MSR_TSC_AUX,
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};

#define NR_HOST_SAVE_USER_MSRS ARRAY_SIZE(host_save_user_msrs)

struct kvm_vcpu;

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struct nested_state {
	struct vmcb *hsave;
	u64 hsave_msr;
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	u64 vm_cr_msr;
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	u64 vmcb;

	/* These are the merged vectors */
	u32 *msrpm;

	/* gpa pointers to the real vectors */
	u64 vmcb_msrpm;
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	u64 vmcb_iopm;
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	/* A VMEXIT is required but not yet emulated */
	bool exit_required;

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	/* cache for intercepts of the guest */
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	u32 intercept_cr;
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	u32 intercept_dr;
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	u32 intercept_exceptions;
	u64 intercept;

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	/* Nested Paging related state */
	u64 nested_cr3;
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};

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#define MSRPM_OFFSETS	16
static u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly;

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/*
 * Set osvw_len to higher value when updated Revision Guides
 * are published and we know what the new status bits are
 */
static uint64_t osvw_len = 4, osvw_status;

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struct vcpu_svm {
	struct kvm_vcpu vcpu;
	struct vmcb *vmcb;
	unsigned long vmcb_pa;
	struct svm_cpu_data *svm_data;
	uint64_t asid_generation;
	uint64_t sysenter_esp;
	uint64_t sysenter_eip;
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	uint64_t tsc_aux;
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	u64 next_rip;

	u64 host_user_msrs[NR_HOST_SAVE_USER_MSRS];
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	struct {
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		u16 fs;
		u16 gs;
		u16 ldt;
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		u64 gs_base;
	} host;
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	u32 *msrpm;

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	ulong nmi_iret_rip;

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	struct nested_state nested;
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	bool nmi_singlestep;
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	u64 nmi_singlestep_guest_rflags;
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	unsigned int3_injected;
	unsigned long int3_rip;
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	/* cached guest cpuid flags for faster access */
	bool nrips_enabled	: 1;
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	u32 ldr_reg;
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	struct page *avic_backing_page;
	u64 *avic_physical_id_cache;
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	bool avic_is_running;
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	/*
	 * Per-vcpu list of struct amd_svm_iommu_ir:
	 * This is used mainly to store interrupt remapping information used
	 * when update the vcpu affinity. This avoids the need to scan for
	 * IRTE and try to match ga_tag in the IOMMU driver.
	 */
	struct list_head ir_list;
	spinlock_t ir_list_lock;
};

/*
 * This is a wrapper of struct amd_iommu_ir_data.
 */
struct amd_svm_iommu_ir {
	struct list_head node;	/* Used by SVM for per-vcpu ir_list */
	void *data;		/* Storing pointer to struct amd_ir_data */
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};

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#define AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK	(0xFF)
#define AVIC_LOGICAL_ID_ENTRY_VALID_MASK		(1 << 31)

#define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK	(0xFFULL)
#define AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK	(0xFFFFFFFFFFULL << 12)
#define AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK		(1ULL << 62)
#define AVIC_PHYSICAL_ID_ENTRY_VALID_MASK		(1ULL << 63)

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static DEFINE_PER_CPU(u64, current_tsc_ratio);
#define TSC_RATIO_DEFAULT	0x0100000000ULL

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#define MSR_INVALID			0xffffffffU

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static const struct svm_direct_access_msrs {
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	u32 index;   /* Index of the MSR */
	bool always; /* True if intercept is always on */
} direct_access_msrs[] = {
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	{ .index = MSR_STAR,				.always = true  },
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	{ .index = MSR_IA32_SYSENTER_CS,		.always = true  },
#ifdef CONFIG_X86_64
	{ .index = MSR_GS_BASE,				.always = true  },
	{ .index = MSR_FS_BASE,				.always = true  },
	{ .index = MSR_KERNEL_GS_BASE,			.always = true  },
	{ .index = MSR_LSTAR,				.always = true  },
	{ .index = MSR_CSTAR,				.always = true  },
	{ .index = MSR_SYSCALL_MASK,			.always = true  },
#endif
	{ .index = MSR_IA32_LASTBRANCHFROMIP,		.always = false },
	{ .index = MSR_IA32_LASTBRANCHTOIP,		.always = false },
	{ .index = MSR_IA32_LASTINTFROMIP,		.always = false },
	{ .index = MSR_IA32_LASTINTTOIP,		.always = false },
	{ .index = MSR_INVALID,				.always = false },
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};

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/* enable NPT for AMD64 and X86 with PAE */
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
static bool npt_enabled = true;
#else
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static bool npt_enabled;
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#endif
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/* allow nested paging (virtualized MMU) for all guests */
static int npt = true;
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module_param(npt, int, S_IRUGO);
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/* allow nested virtualization in KVM/SVM */
static int nested = true;
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module_param(nested, int, S_IRUGO);

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/* enable / disable AVIC */
static int avic;
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#ifdef CONFIG_X86_LOCAL_APIC
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module_param(avic, int, S_IRUGO);
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#endif
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/* enable/disable Virtual VMLOAD VMSAVE */
static int vls = true;
module_param(vls, int, 0444);

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static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
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static void svm_flush_tlb(struct kvm_vcpu *vcpu);
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static void svm_complete_interrupts(struct vcpu_svm *svm);
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static int nested_svm_exit_handled(struct vcpu_svm *svm);
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static int nested_svm_intercept(struct vcpu_svm *svm);
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static int nested_svm_vmexit(struct vcpu_svm *svm);
static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
				      bool has_error_code, u32 error_code);

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enum {
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	VMCB_INTERCEPTS, /* Intercept vectors, TSC offset,
			    pause filter count */
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	VMCB_PERM_MAP,   /* IOPM Base and MSRPM Base */
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	VMCB_ASID,	 /* ASID */
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	VMCB_INTR,	 /* int_ctl, int_vector */
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	VMCB_NPT,        /* npt_en, nCR3, gPAT */
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	VMCB_CR,	 /* CR0, CR3, CR4, EFER */
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	VMCB_DR,         /* DR6, DR7 */
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	VMCB_DT,         /* GDT, IDT */
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	VMCB_SEG,        /* CS, DS, SS, ES, CPL */
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	VMCB_CR2,        /* CR2 only */
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	VMCB_LBR,        /* DBGCTL, BR_FROM, BR_TO, LAST_EX_FROM, LAST_EX_TO */
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	VMCB_AVIC,       /* AVIC APIC_BAR, AVIC APIC_BACKING_PAGE,
			  * AVIC PHYSICAL_TABLE pointer,
			  * AVIC LOGICAL_TABLE pointer
			  */
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	VMCB_DIRTY_MAX,
};

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/* TPR and CR2 are always written before VMRUN */
#define VMCB_ALWAYS_DIRTY_MASK	((1U << VMCB_INTR) | (1U << VMCB_CR2))
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#define VMCB_AVIC_APIC_BAR_MASK		0xFFFFFFFFFF000ULL

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static inline void mark_all_dirty(struct vmcb *vmcb)
{
	vmcb->control.clean = 0;
}

static inline void mark_all_clean(struct vmcb *vmcb)
{
	vmcb->control.clean = ((1 << VMCB_DIRTY_MAX) - 1)
			       & ~VMCB_ALWAYS_DIRTY_MASK;
}

static inline void mark_dirty(struct vmcb *vmcb, int bit)
{
	vmcb->control.clean &= ~(1 << bit);
}

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static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
{
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	return container_of(vcpu, struct vcpu_svm, vcpu);
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}

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static inline void avic_update_vapic_bar(struct vcpu_svm *svm, u64 data)
{
	svm->vmcb->control.avic_vapic_bar = data & VMCB_AVIC_APIC_BAR_MASK;
	mark_dirty(svm->vmcb, VMCB_AVIC);
}

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static inline bool avic_vcpu_is_running(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	u64 *entry = svm->avic_physical_id_cache;

	if (!entry)
		return false;

	return (READ_ONCE(*entry) & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK);
}

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static void recalc_intercepts(struct vcpu_svm *svm)
{
	struct vmcb_control_area *c, *h;
	struct nested_state *g;

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	mark_dirty(svm->vmcb, VMCB_INTERCEPTS);

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	if (!is_guest_mode(&svm->vcpu))
		return;

	c = &svm->vmcb->control;
	h = &svm->nested.hsave->control;
	g = &svm->nested;

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	c->intercept_cr = h->intercept_cr | g->intercept_cr;
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	c->intercept_dr = h->intercept_dr | g->intercept_dr;
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	c->intercept_exceptions = h->intercept_exceptions | g->intercept_exceptions;
	c->intercept = h->intercept | g->intercept;
}

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static inline struct vmcb *get_host_vmcb(struct vcpu_svm *svm)
{
	if (is_guest_mode(&svm->vcpu))
		return svm->nested.hsave;
	else
		return svm->vmcb;
}

static inline void set_cr_intercept(struct vcpu_svm *svm, int bit)
{
	struct vmcb *vmcb = get_host_vmcb(svm);

	vmcb->control.intercept_cr |= (1U << bit);

	recalc_intercepts(svm);
}

static inline void clr_cr_intercept(struct vcpu_svm *svm, int bit)
{
	struct vmcb *vmcb = get_host_vmcb(svm);

	vmcb->control.intercept_cr &= ~(1U << bit);

	recalc_intercepts(svm);
}

static inline bool is_cr_intercept(struct vcpu_svm *svm, int bit)
{
	struct vmcb *vmcb = get_host_vmcb(svm);

	return vmcb->control.intercept_cr & (1U << bit);
}

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static inline void set_dr_intercepts(struct vcpu_svm *svm)
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{
	struct vmcb *vmcb = get_host_vmcb(svm);

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	vmcb->control.intercept_dr = (1 << INTERCEPT_DR0_READ)
		| (1 << INTERCEPT_DR1_READ)
		| (1 << INTERCEPT_DR2_READ)
		| (1 << INTERCEPT_DR3_READ)
		| (1 << INTERCEPT_DR4_READ)
		| (1 << INTERCEPT_DR5_READ)
		| (1 << INTERCEPT_DR6_READ)
		| (1 << INTERCEPT_DR7_READ)
		| (1 << INTERCEPT_DR0_WRITE)
		| (1 << INTERCEPT_DR1_WRITE)
		| (1 << INTERCEPT_DR2_WRITE)
		| (1 << INTERCEPT_DR3_WRITE)
		| (1 << INTERCEPT_DR4_WRITE)
		| (1 << INTERCEPT_DR5_WRITE)
		| (1 << INTERCEPT_DR6_WRITE)
		| (1 << INTERCEPT_DR7_WRITE);
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	recalc_intercepts(svm);
}

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static inline void clr_dr_intercepts(struct vcpu_svm *svm)
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{
	struct vmcb *vmcb = get_host_vmcb(svm);

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	vmcb->control.intercept_dr = 0;
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	recalc_intercepts(svm);
}

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static inline void set_exception_intercept(struct vcpu_svm *svm, int bit)
{
	struct vmcb *vmcb = get_host_vmcb(svm);

	vmcb->control.intercept_exceptions |= (1U << bit);

	recalc_intercepts(svm);
}

static inline void clr_exception_intercept(struct vcpu_svm *svm, int bit)
{
	struct vmcb *vmcb = get_host_vmcb(svm);

	vmcb->control.intercept_exceptions &= ~(1U << bit);

	recalc_intercepts(svm);
}

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static inline void set_intercept(struct vcpu_svm *svm, int bit)
{
	struct vmcb *vmcb = get_host_vmcb(svm);

	vmcb->control.intercept |= (1ULL << bit);

	recalc_intercepts(svm);
}

static inline void clr_intercept(struct vcpu_svm *svm, int bit)
{
	struct vmcb *vmcb = get_host_vmcb(svm);

	vmcb->control.intercept &= ~(1ULL << bit);

	recalc_intercepts(svm);
}

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static inline void enable_gif(struct vcpu_svm *svm)
{
	svm->vcpu.arch.hflags |= HF_GIF_MASK;
}

static inline void disable_gif(struct vcpu_svm *svm)
{
	svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
}

static inline bool gif_set(struct vcpu_svm *svm)
{
	return !!(svm->vcpu.arch.hflags & HF_GIF_MASK);
}

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static unsigned long iopm_base;
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struct kvm_ldttss_desc {
	u16 limit0;
	u16 base0;
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	unsigned base1:8, type:5, dpl:2, p:1;
	unsigned limit1:4, zero0:3, g:1, base2:8;
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	u32 base3;
	u32 zero1;
} __attribute__((packed));

struct svm_cpu_data {
	int cpu;

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	u64 asid_generation;
	u32 max_asid;
	u32 next_asid;
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	struct kvm_ldttss_desc *tss_desc;

	struct page *save_area;
};

static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);

struct svm_init_data {
	int cpu;
	int r;
};

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static const u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
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#define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
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#define MSRS_RANGE_SIZE 2048
#define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)

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static u32 svm_msrpm_offset(u32 msr)
{
	u32 offset;
	int i;

	for (i = 0; i < NUM_MSR_MAPS; i++) {
		if (msr < msrpm_ranges[i] ||
		    msr >= msrpm_ranges[i] + MSRS_IN_RANGE)
			continue;

		offset  = (msr - msrpm_ranges[i]) / 4; /* 4 msrs per u8 */
		offset += (i * MSRS_RANGE_SIZE);       /* add range offset */

		/* Now we have the u8 offset - but need the u32 offset */
		return offset / 4;
	}

	/* MSR not in any range */
	return MSR_INVALID;
}

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#define MAX_INST_SIZE 15

static inline void clgi(void)
{
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	asm volatile (__ex(SVM_CLGI));
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}

static inline void stgi(void)
{
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	asm volatile (__ex(SVM_STGI));
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}

static inline void invlpga(unsigned long addr, u32 asid)
{
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	asm volatile (__ex(SVM_INVLPGA) : : "a"(addr), "c"(asid));
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}

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static int get_npt_level(void)
{
#ifdef CONFIG_X86_64
	return PT64_ROOT_LEVEL;
#else
	return PT32E_ROOT_LEVEL;
#endif
}

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static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
{
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	vcpu->arch.efer = efer;
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	if (!npt_enabled && !(efer & EFER_LMA))
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		efer &= ~EFER_LME;
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	to_svm(vcpu)->vmcb->save.efer = efer | EFER_SVME;
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	mark_dirty(to_svm(vcpu)->vmcb, VMCB_CR);
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}

static int is_external_interrupt(u32 info)
{
	info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
	return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
}

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static u32 svm_get_interrupt_shadow(struct kvm_vcpu *vcpu)
592 593 594 595 596
{
	struct vcpu_svm *svm = to_svm(vcpu);
	u32 ret = 0;

	if (svm->vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK)
597 598
		ret = KVM_X86_SHADOW_INT_STI | KVM_X86_SHADOW_INT_MOV_SS;
	return ret;
599 600 601 602 603 604 605 606 607 608 609 610 611
}

static void svm_set_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	if (mask == 0)
		svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
	else
		svm->vmcb->control.int_state |= SVM_INTERRUPT_SHADOW_MASK;

}

A
Avi Kivity 已提交
612 613
static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
{
614 615
	struct vcpu_svm *svm = to_svm(vcpu);

616
	if (svm->vmcb->control.next_rip != 0) {
617
		WARN_ON_ONCE(!static_cpu_has(X86_FEATURE_NRIPS));
618
		svm->next_rip = svm->vmcb->control.next_rip;
619
	}
620

621
	if (!svm->next_rip) {
622
		if (emulate_instruction(vcpu, EMULTYPE_SKIP) !=
623 624
				EMULATE_DONE)
			printk(KERN_DEBUG "%s: NOP\n", __func__);
A
Avi Kivity 已提交
625 626
		return;
	}
627 628 629
	if (svm->next_rip - kvm_rip_read(vcpu) > MAX_INST_SIZE)
		printk(KERN_ERR "%s: ip 0x%lx next 0x%llx\n",
		       __func__, kvm_rip_read(vcpu), svm->next_rip);
A
Avi Kivity 已提交
630

631
	kvm_rip_write(vcpu, svm->next_rip);
632
	svm_set_interrupt_shadow(vcpu, 0);
A
Avi Kivity 已提交
633 634
}

635
static void svm_queue_exception(struct kvm_vcpu *vcpu)
J
Jan Kiszka 已提交
636 637
{
	struct vcpu_svm *svm = to_svm(vcpu);
638 639 640 641
	unsigned nr = vcpu->arch.exception.nr;
	bool has_error_code = vcpu->arch.exception.has_error_code;
	bool reinject = vcpu->arch.exception.reinject;
	u32 error_code = vcpu->arch.exception.error_code;
J
Jan Kiszka 已提交
642

J
Joerg Roedel 已提交
643 644 645 646
	/*
	 * If we are within a nested VM we'd better #VMEXIT and let the guest
	 * handle the exception
	 */
647 648
	if (!reinject &&
	    nested_svm_check_exception(svm, nr, has_error_code, error_code))
J
Jan Kiszka 已提交
649 650
		return;

651
	if (nr == BP_VECTOR && !static_cpu_has(X86_FEATURE_NRIPS)) {
652 653 654 655 656 657 658 659 660 661 662 663 664 665 666
		unsigned long rip, old_rip = kvm_rip_read(&svm->vcpu);

		/*
		 * For guest debugging where we have to reinject #BP if some
		 * INT3 is guest-owned:
		 * Emulate nRIP by moving RIP forward. Will fail if injection
		 * raises a fault that is not intercepted. Still better than
		 * failing in all cases.
		 */
		skip_emulated_instruction(&svm->vcpu);
		rip = kvm_rip_read(&svm->vcpu);
		svm->int3_rip = rip + svm->vmcb->save.cs.base;
		svm->int3_injected = rip - old_rip;
	}

J
Jan Kiszka 已提交
667 668 669 670 671 672 673
	svm->vmcb->control.event_inj = nr
		| SVM_EVTINJ_VALID
		| (has_error_code ? SVM_EVTINJ_VALID_ERR : 0)
		| SVM_EVTINJ_TYPE_EXEPT;
	svm->vmcb->control.event_inj_err = error_code;
}

674 675 676 677 678 679
static void svm_init_erratum_383(void)
{
	u32 low, high;
	int err;
	u64 val;

680
	if (!static_cpu_has_bug(X86_BUG_AMD_TLB_MMATCH))
681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697
		return;

	/* Use _safe variants to not break nested virtualization */
	val = native_read_msr_safe(MSR_AMD64_DC_CFG, &err);
	if (err)
		return;

	val |= (1ULL << 47);

	low  = lower_32_bits(val);
	high = upper_32_bits(val);

	native_write_msr_safe(MSR_AMD64_DC_CFG, low, high);

	erratum_383_found = true;
}

698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718
static void svm_init_osvw(struct kvm_vcpu *vcpu)
{
	/*
	 * Guests should see errata 400 and 415 as fixed (assuming that
	 * HLT and IO instructions are intercepted).
	 */
	vcpu->arch.osvw.length = (osvw_len >= 3) ? (osvw_len) : 3;
	vcpu->arch.osvw.status = osvw_status & ~(6ULL);

	/*
	 * By increasing VCPU's osvw.length to 3 we are telling the guest that
	 * all osvw.status bits inside that length, including bit 0 (which is
	 * reserved for erratum 298), are valid. However, if host processor's
	 * osvw_len is 0 then osvw_status[0] carries no information. We need to
	 * be conservative here and therefore we tell the guest that erratum 298
	 * is present (because we really don't know).
	 */
	if (osvw_len == 0 && boot_cpu_data.x86 == 0x10)
		vcpu->arch.osvw.status |= 1;
}

A
Avi Kivity 已提交
719 720
static int has_svm(void)
{
721
	const char *msg;
A
Avi Kivity 已提交
722

723
	if (!cpu_has_svm(&msg)) {
J
Joe Perches 已提交
724
		printk(KERN_INFO "has_svm: %s\n", msg);
A
Avi Kivity 已提交
725 726 727 728 729 730
		return 0;
	}

	return 1;
}

731
static void svm_hardware_disable(void)
A
Avi Kivity 已提交
732
{
733 734 735 736
	/* Make sure we clean up behind us */
	if (static_cpu_has(X86_FEATURE_TSCRATEMSR))
		wrmsrl(MSR_AMD64_TSC_RATIO, TSC_RATIO_DEFAULT);

737
	cpu_svm_disable();
738 739

	amd_pmu_disable_virt();
A
Avi Kivity 已提交
740 741
}

742
static int svm_hardware_enable(void)
A
Avi Kivity 已提交
743 744
{

745
	struct svm_cpu_data *sd;
A
Avi Kivity 已提交
746 747 748 749
	uint64_t efer;
	struct desc_struct *gdt;
	int me = raw_smp_processor_id();

750 751 752 753
	rdmsrl(MSR_EFER, efer);
	if (efer & EFER_SVME)
		return -EBUSY;

A
Avi Kivity 已提交
754
	if (!has_svm()) {
755
		pr_err("%s: err EOPNOTSUPP on %d\n", __func__, me);
756
		return -EINVAL;
A
Avi Kivity 已提交
757
	}
758 759
	sd = per_cpu(svm_data, me);
	if (!sd) {
760
		pr_err("%s: svm_data is NULL on %d\n", __func__, me);
761
		return -EINVAL;
A
Avi Kivity 已提交
762 763
	}

764 765 766
	sd->asid_generation = 1;
	sd->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
	sd->next_asid = sd->max_asid + 1;
A
Avi Kivity 已提交
767

768
	gdt = get_current_gdt_rw();
769
	sd->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
A
Avi Kivity 已提交
770

771
	wrmsrl(MSR_EFER, efer | EFER_SVME);
A
Avi Kivity 已提交
772

773
	wrmsrl(MSR_VM_HSAVE_PA, page_to_pfn(sd->save_area) << PAGE_SHIFT);
774

775 776
	if (static_cpu_has(X86_FEATURE_TSCRATEMSR)) {
		wrmsrl(MSR_AMD64_TSC_RATIO, TSC_RATIO_DEFAULT);
777
		__this_cpu_write(current_tsc_ratio, TSC_RATIO_DEFAULT);
778 779
	}

780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809

	/*
	 * Get OSVW bits.
	 *
	 * Note that it is possible to have a system with mixed processor
	 * revisions and therefore different OSVW bits. If bits are not the same
	 * on different processors then choose the worst case (i.e. if erratum
	 * is present on one processor and not on another then assume that the
	 * erratum is present everywhere).
	 */
	if (cpu_has(&boot_cpu_data, X86_FEATURE_OSVW)) {
		uint64_t len, status = 0;
		int err;

		len = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &err);
		if (!err)
			status = native_read_msr_safe(MSR_AMD64_OSVW_STATUS,
						      &err);

		if (err)
			osvw_status = osvw_len = 0;
		else {
			if (len < osvw_len)
				osvw_len = len;
			osvw_status |= status;
			osvw_status &= (1ULL << osvw_len) - 1;
		}
	} else
		osvw_status = osvw_len = 0;

810 811
	svm_init_erratum_383();

812 813
	amd_pmu_enable_virt();

814
	return 0;
A
Avi Kivity 已提交
815 816
}

817 818
static void svm_cpu_uninit(int cpu)
{
819
	struct svm_cpu_data *sd = per_cpu(svm_data, raw_smp_processor_id());
820

821
	if (!sd)
822 823 824
		return;

	per_cpu(svm_data, raw_smp_processor_id()) = NULL;
825 826
	__free_page(sd->save_area);
	kfree(sd);
827 828
}

A
Avi Kivity 已提交
829 830
static int svm_cpu_init(int cpu)
{
831
	struct svm_cpu_data *sd;
A
Avi Kivity 已提交
832 833
	int r;

834 835
	sd = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
	if (!sd)
A
Avi Kivity 已提交
836
		return -ENOMEM;
837 838
	sd->cpu = cpu;
	sd->save_area = alloc_page(GFP_KERNEL);
A
Avi Kivity 已提交
839
	r = -ENOMEM;
840
	if (!sd->save_area)
A
Avi Kivity 已提交
841 842
		goto err_1;

843
	per_cpu(svm_data, cpu) = sd;
A
Avi Kivity 已提交
844 845 846 847

	return 0;

err_1:
848
	kfree(sd);
A
Avi Kivity 已提交
849 850 851 852
	return r;

}

853 854 855 856 857 858 859 860 861 862 863
static bool valid_msr_intercept(u32 index)
{
	int i;

	for (i = 0; direct_access_msrs[i].index != MSR_INVALID; i++)
		if (direct_access_msrs[i].index == index)
			return true;

	return false;
}

864 865
static void set_msr_interception(u32 *msrpm, unsigned msr,
				 int read, int write)
A
Avi Kivity 已提交
866
{
867 868 869
	u8 bit_read, bit_write;
	unsigned long tmp;
	u32 offset;
A
Avi Kivity 已提交
870

871 872 873 874 875 876
	/*
	 * If this warning triggers extend the direct_access_msrs list at the
	 * beginning of the file
	 */
	WARN_ON(!valid_msr_intercept(msr));

877 878 879 880 881 882 883 884 885 886 887
	offset    = svm_msrpm_offset(msr);
	bit_read  = 2 * (msr & 0x0f);
	bit_write = 2 * (msr & 0x0f) + 1;
	tmp       = msrpm[offset];

	BUG_ON(offset == MSR_INVALID);

	read  ? clear_bit(bit_read,  &tmp) : set_bit(bit_read,  &tmp);
	write ? clear_bit(bit_write, &tmp) : set_bit(bit_write, &tmp);

	msrpm[offset] = tmp;
A
Avi Kivity 已提交
888 889
}

890
static void svm_vcpu_init_msrpm(u32 *msrpm)
A
Avi Kivity 已提交
891 892 893
{
	int i;

894 895
	memset(msrpm, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));

896 897 898 899 900 901
	for (i = 0; direct_access_msrs[i].index != MSR_INVALID; i++) {
		if (!direct_access_msrs[i].always)
			continue;

		set_msr_interception(msrpm, direct_access_msrs[i].index, 1, 1);
	}
902 903
}

904 905 906 907 908 909 910 911
static void add_msr_offset(u32 offset)
{
	int i;

	for (i = 0; i < MSRPM_OFFSETS; ++i) {

		/* Offset already in list? */
		if (msrpm_offsets[i] == offset)
912
			return;
913 914 915 916 917 918 919 920 921

		/* Slot used by another offset? */
		if (msrpm_offsets[i] != MSR_INVALID)
			continue;

		/* Add offset to list */
		msrpm_offsets[i] = offset;

		return;
A
Avi Kivity 已提交
922
	}
923 924 925 926 927

	/*
	 * If this BUG triggers the msrpm_offsets table has an overflow. Just
	 * increase MSRPM_OFFSETS in this case.
	 */
928
	BUG();
A
Avi Kivity 已提交
929 930
}

931
static void init_msrpm_offsets(void)
932
{
933
	int i;
934

935 936 937 938 939 940 941 942 943 944
	memset(msrpm_offsets, 0xff, sizeof(msrpm_offsets));

	for (i = 0; direct_access_msrs[i].index != MSR_INVALID; i++) {
		u32 offset;

		offset = svm_msrpm_offset(direct_access_msrs[i].index);
		BUG_ON(offset == MSR_INVALID);

		add_msr_offset(offset);
	}
945 946
}

947 948 949 950
static void svm_enable_lbrv(struct vcpu_svm *svm)
{
	u32 *msrpm = svm->msrpm;

951
	svm->vmcb->control.virt_ext |= LBR_CTL_ENABLE_MASK;
952 953 954 955 956 957 958 959 960 961
	set_msr_interception(msrpm, MSR_IA32_LASTBRANCHFROMIP, 1, 1);
	set_msr_interception(msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1);
	set_msr_interception(msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
	set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 1, 1);
}

static void svm_disable_lbrv(struct vcpu_svm *svm)
{
	u32 *msrpm = svm->msrpm;

962
	svm->vmcb->control.virt_ext &= ~LBR_CTL_ENABLE_MASK;
963 964 965 966 967 968
	set_msr_interception(msrpm, MSR_IA32_LASTBRANCHFROMIP, 0, 0);
	set_msr_interception(msrpm, MSR_IA32_LASTBRANCHTOIP, 0, 0);
	set_msr_interception(msrpm, MSR_IA32_LASTINTFROMIP, 0, 0);
	set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 0, 0);
}

969 970 971
static void disable_nmi_singlestep(struct vcpu_svm *svm)
{
	svm->nmi_singlestep = false;
972 973 974 975 976 977 978
	if (!(svm->vcpu.guest_debug & KVM_GUESTDBG_SINGLESTEP)) {
		/* Clear our flags if they were not set by the guest */
		if (!(svm->nmi_singlestep_guest_rflags & X86_EFLAGS_TF))
			svm->vmcb->save.rflags &= ~X86_EFLAGS_TF;
		if (!(svm->nmi_singlestep_guest_rflags & X86_EFLAGS_RF))
			svm->vmcb->save.rflags &= ~X86_EFLAGS_RF;
	}
979 980
}

981 982 983 984 985 986
/* Note:
 * This hash table is used to map VM_ID to a struct kvm_arch,
 * when handling AMD IOMMU GALOG notification to schedule in
 * a particular vCPU.
 */
#define SVM_VM_DATA_HASH_BITS	8
987
static DEFINE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS);
988 989
static u32 next_vm_id = 0;
static bool next_vm_id_wrapped = 0;
990
static DEFINE_SPINLOCK(svm_vm_data_hash_lock);
991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031

/* Note:
 * This function is called from IOMMU driver to notify
 * SVM to schedule in a particular vCPU of a particular VM.
 */
static int avic_ga_log_notifier(u32 ga_tag)
{
	unsigned long flags;
	struct kvm_arch *ka = NULL;
	struct kvm_vcpu *vcpu = NULL;
	u32 vm_id = AVIC_GATAG_TO_VMID(ga_tag);
	u32 vcpu_id = AVIC_GATAG_TO_VCPUID(ga_tag);

	pr_debug("SVM: %s: vm_id=%#x, vcpu_id=%#x\n", __func__, vm_id, vcpu_id);

	spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
	hash_for_each_possible(svm_vm_data_hash, ka, hnode, vm_id) {
		struct kvm *kvm = container_of(ka, struct kvm, arch);
		struct kvm_arch *vm_data = &kvm->arch;

		if (vm_data->avic_vm_id != vm_id)
			continue;
		vcpu = kvm_get_vcpu_by_id(kvm, vcpu_id);
		break;
	}
	spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);

	if (!vcpu)
		return 0;

	/* Note:
	 * At this point, the IOMMU should have already set the pending
	 * bit in the vAPIC backing page. So, we just need to schedule
	 * in the vcpu.
	 */
	if (vcpu->mode == OUTSIDE_GUEST_MODE)
		kvm_vcpu_wake_up(vcpu);

	return 0;
}

A
Avi Kivity 已提交
1032 1033 1034 1035
static __init int svm_hardware_setup(void)
{
	int cpu;
	struct page *iopm_pages;
1036
	void *iopm_va;
A
Avi Kivity 已提交
1037 1038 1039 1040 1041 1042
	int r;

	iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);

	if (!iopm_pages)
		return -ENOMEM;
1043 1044 1045

	iopm_va = page_address(iopm_pages);
	memset(iopm_va, 0xff, PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
A
Avi Kivity 已提交
1046 1047
	iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;

1048 1049
	init_msrpm_offsets();

1050 1051 1052
	if (boot_cpu_has(X86_FEATURE_NX))
		kvm_enable_efer_bits(EFER_NX);

A
Alexander Graf 已提交
1053 1054 1055
	if (boot_cpu_has(X86_FEATURE_FXSR_OPT))
		kvm_enable_efer_bits(EFER_FFXSR);

1056 1057
	if (boot_cpu_has(X86_FEATURE_TSCRATEMSR)) {
		kvm_has_tsc_control = true;
1058 1059
		kvm_max_tsc_scaling_ratio = TSC_RATIO_MAX;
		kvm_tsc_scaling_ratio_frac_bits = 32;
1060 1061
	}

1062 1063
	if (nested) {
		printk(KERN_INFO "kvm: Nested Virtualization enabled\n");
1064
		kvm_enable_efer_bits(EFER_SVME | EFER_LMSLE);
1065 1066
	}

Z
Zachary Amsden 已提交
1067
	for_each_possible_cpu(cpu) {
A
Avi Kivity 已提交
1068 1069
		r = svm_cpu_init(cpu);
		if (r)
1070
			goto err;
A
Avi Kivity 已提交
1071
	}
1072

1073
	if (!boot_cpu_has(X86_FEATURE_NPT))
1074 1075
		npt_enabled = false;

1076 1077 1078 1079 1080
	if (npt_enabled && !npt) {
		printk(KERN_INFO "kvm: Nested Paging disabled\n");
		npt_enabled = false;
	}

1081
	if (npt_enabled) {
1082
		printk(KERN_INFO "kvm: Nested Paging enabled\n");
1083
		kvm_enable_tdp();
1084 1085
	} else
		kvm_disable_tdp();
1086

1087 1088 1089
	if (avic) {
		if (!npt_enabled ||
		    !boot_cpu_has(X86_FEATURE_AVIC) ||
1090
		    !IS_ENABLED(CONFIG_X86_LOCAL_APIC)) {
1091
			avic = false;
1092
		} else {
1093
			pr_info("AVIC enabled\n");
1094 1095 1096

			amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier);
		}
1097
	}
1098

1099 1100 1101 1102 1103 1104 1105 1106 1107 1108
	if (vls) {
		if (!npt_enabled ||
		    !boot_cpu_has(X86_FEATURE_VIRTUAL_VMLOAD_VMSAVE) ||
		    !IS_ENABLED(CONFIG_X86_64)) {
			vls = false;
		} else {
			pr_info("Virtual VMLOAD VMSAVE supported\n");
		}
	}

A
Avi Kivity 已提交
1109 1110
	return 0;

1111
err:
A
Avi Kivity 已提交
1112 1113 1114 1115 1116 1117 1118
	__free_pages(iopm_pages, IOPM_ALLOC_ORDER);
	iopm_base = 0;
	return r;
}

static __exit void svm_hardware_unsetup(void)
{
1119 1120
	int cpu;

Z
Zachary Amsden 已提交
1121
	for_each_possible_cpu(cpu)
1122 1123
		svm_cpu_uninit(cpu);

A
Avi Kivity 已提交
1124
	__free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
1125
	iopm_base = 0;
A
Avi Kivity 已提交
1126 1127 1128 1129 1130 1131
}

static void init_seg(struct vmcb_seg *seg)
{
	seg->selector = 0;
	seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
J
Joerg Roedel 已提交
1132
		      SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
A
Avi Kivity 已提交
1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144
	seg->limit = 0xffff;
	seg->base = 0;
}

static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
{
	seg->selector = 0;
	seg->attrib = SVM_SELECTOR_P_MASK | type;
	seg->limit = 0xffff;
	seg->base = 0;
}

1145 1146 1147 1148 1149
static void svm_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	u64 g_tsc_offset = 0;

1150
	if (is_guest_mode(vcpu)) {
1151 1152 1153
		g_tsc_offset = svm->vmcb->control.tsc_offset -
			       svm->nested.hsave->control.tsc_offset;
		svm->nested.hsave->control.tsc_offset = offset;
1154 1155 1156 1157
	} else
		trace_kvm_write_tsc_offset(vcpu->vcpu_id,
					   svm->vmcb->control.tsc_offset,
					   offset);
1158 1159

	svm->vmcb->control.tsc_offset = offset + g_tsc_offset;
1160 1161

	mark_dirty(svm->vmcb, VMCB_INTERCEPTS);
1162 1163
}

1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179
static void avic_init_vmcb(struct vcpu_svm *svm)
{
	struct vmcb *vmcb = svm->vmcb;
	struct kvm_arch *vm_data = &svm->vcpu.kvm->arch;
	phys_addr_t bpa = page_to_phys(svm->avic_backing_page);
	phys_addr_t lpa = page_to_phys(vm_data->avic_logical_id_table_page);
	phys_addr_t ppa = page_to_phys(vm_data->avic_physical_id_table_page);

	vmcb->control.avic_backing_page = bpa & AVIC_HPA_MASK;
	vmcb->control.avic_logical_id = lpa & AVIC_HPA_MASK;
	vmcb->control.avic_physical_id = ppa & AVIC_HPA_MASK;
	vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID_COUNT;
	vmcb->control.int_ctl |= AVIC_ENABLE_MASK;
	svm->vcpu.arch.apicv_active = true;
}

P
Paolo Bonzini 已提交
1180
static void init_vmcb(struct vcpu_svm *svm)
A
Avi Kivity 已提交
1181
{
1182 1183
	struct vmcb_control_area *control = &svm->vmcb->control;
	struct vmcb_save_area *save = &svm->vmcb->save;
A
Avi Kivity 已提交
1184

1185
	svm->vcpu.arch.hflags = 0;
1186

1187 1188 1189 1190 1191 1192
	set_cr_intercept(svm, INTERCEPT_CR0_READ);
	set_cr_intercept(svm, INTERCEPT_CR3_READ);
	set_cr_intercept(svm, INTERCEPT_CR4_READ);
	set_cr_intercept(svm, INTERCEPT_CR0_WRITE);
	set_cr_intercept(svm, INTERCEPT_CR3_WRITE);
	set_cr_intercept(svm, INTERCEPT_CR4_WRITE);
1193 1194
	if (!kvm_vcpu_apicv_active(&svm->vcpu))
		set_cr_intercept(svm, INTERCEPT_CR8_WRITE);
A
Avi Kivity 已提交
1195

1196
	set_dr_intercepts(svm);
A
Avi Kivity 已提交
1197

1198 1199 1200
	set_exception_intercept(svm, PF_VECTOR);
	set_exception_intercept(svm, UD_VECTOR);
	set_exception_intercept(svm, MC_VECTOR);
1201
	set_exception_intercept(svm, AC_VECTOR);
1202
	set_exception_intercept(svm, DB_VECTOR);
A
Avi Kivity 已提交
1203

1204 1205 1206 1207
	set_intercept(svm, INTERCEPT_INTR);
	set_intercept(svm, INTERCEPT_NMI);
	set_intercept(svm, INTERCEPT_SMI);
	set_intercept(svm, INTERCEPT_SELECTIVE_CR0);
A
Avi Kivity 已提交
1208
	set_intercept(svm, INTERCEPT_RDPMC);
1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225
	set_intercept(svm, INTERCEPT_CPUID);
	set_intercept(svm, INTERCEPT_INVD);
	set_intercept(svm, INTERCEPT_HLT);
	set_intercept(svm, INTERCEPT_INVLPG);
	set_intercept(svm, INTERCEPT_INVLPGA);
	set_intercept(svm, INTERCEPT_IOIO_PROT);
	set_intercept(svm, INTERCEPT_MSR_PROT);
	set_intercept(svm, INTERCEPT_TASK_SWITCH);
	set_intercept(svm, INTERCEPT_SHUTDOWN);
	set_intercept(svm, INTERCEPT_VMRUN);
	set_intercept(svm, INTERCEPT_VMMCALL);
	set_intercept(svm, INTERCEPT_VMLOAD);
	set_intercept(svm, INTERCEPT_VMSAVE);
	set_intercept(svm, INTERCEPT_STGI);
	set_intercept(svm, INTERCEPT_CLGI);
	set_intercept(svm, INTERCEPT_SKINIT);
	set_intercept(svm, INTERCEPT_WBINVD);
J
Joerg Roedel 已提交
1226
	set_intercept(svm, INTERCEPT_XSETBV);
A
Avi Kivity 已提交
1227

1228 1229 1230 1231 1232
	if (!kvm_mwait_in_guest()) {
		set_intercept(svm, INTERCEPT_MONITOR);
		set_intercept(svm, INTERCEPT_MWAIT);
	}

A
Avi Kivity 已提交
1233
	control->iopm_base_pa = iopm_base;
1234
	control->msrpm_base_pa = __pa(svm->msrpm);
A
Avi Kivity 已提交
1235 1236 1237 1238 1239 1240 1241 1242 1243
	control->int_ctl = V_INTR_MASKING_MASK;

	init_seg(&save->es);
	init_seg(&save->ss);
	init_seg(&save->ds);
	init_seg(&save->fs);
	init_seg(&save->gs);

	save->cs.selector = 0xf000;
1244
	save->cs.base = 0xffff0000;
A
Avi Kivity 已提交
1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255
	/* Executable/Readable Code Segment */
	save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
		SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
	save->cs.limit = 0xffff;

	save->gdtr.limit = 0xffff;
	save->idtr.limit = 0xffff;

	init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
	init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);

P
Paolo Bonzini 已提交
1256
	svm_set_efer(&svm->vcpu, 0);
M
Mike Day 已提交
1257
	save->dr6 = 0xffff0ff0;
1258
	kvm_set_rflags(&svm->vcpu, 2);
A
Avi Kivity 已提交
1259
	save->rip = 0x0000fff0;
1260
	svm->vcpu.arch.regs[VCPU_REGS_RIP] = save->rip;
A
Avi Kivity 已提交
1261

J
Joerg Roedel 已提交
1262
	/*
1263
	 * svm_set_cr0() sets PG and WP and clears NW and CD on save->cr0.
1264
	 * It also updates the guest-visible cr0 value.
A
Avi Kivity 已提交
1265
	 */
1266
	svm_set_cr0(&svm->vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET);
1267
	kvm_mmu_reset_context(&svm->vcpu);
1268

1269
	save->cr4 = X86_CR4_PAE;
A
Avi Kivity 已提交
1270
	/* rdx = ?? */
1271 1272 1273 1274

	if (npt_enabled) {
		/* Setup VMCB for Nested Paging */
		control->nested_ctl = 1;
1275
		clr_intercept(svm, INTERCEPT_INVLPG);
1276
		clr_exception_intercept(svm, PF_VECTOR);
1277 1278
		clr_cr_intercept(svm, INTERCEPT_CR3_READ);
		clr_cr_intercept(svm, INTERCEPT_CR3_WRITE);
1279
		save->g_pat = svm->vcpu.arch.pat;
1280 1281 1282
		save->cr3 = 0;
		save->cr4 = 0;
	}
1283
	svm->asid_generation = 0;
1284

1285
	svm->nested.vmcb = 0;
1286 1287
	svm->vcpu.arch.hflags = 0;

1288
	if (boot_cpu_has(X86_FEATURE_PAUSEFILTER)) {
1289
		control->pause_filter_count = 3000;
1290
		set_intercept(svm, INTERCEPT_PAUSE);
1291 1292
	}

1293 1294 1295
	if (avic)
		avic_init_vmcb(svm);

1296 1297 1298 1299 1300 1301 1302 1303 1304 1305
	/*
	 * If hardware supports Virtual VMLOAD VMSAVE then enable it
	 * in VMCB and clear intercepts to avoid #VMEXIT.
	 */
	if (vls) {
		clr_intercept(svm, INTERCEPT_VMLOAD);
		clr_intercept(svm, INTERCEPT_VMSAVE);
		svm->vmcb->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
	}

1306 1307
	mark_all_dirty(svm->vmcb);

1308
	enable_gif(svm);
1309 1310 1311

}

1312 1313
static u64 *avic_get_physical_id_entry(struct kvm_vcpu *vcpu,
				       unsigned int index)
1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389
{
	u64 *avic_physical_id_table;
	struct kvm_arch *vm_data = &vcpu->kvm->arch;

	if (index >= AVIC_MAX_PHYSICAL_ID_COUNT)
		return NULL;

	avic_physical_id_table = page_address(vm_data->avic_physical_id_table_page);

	return &avic_physical_id_table[index];
}

/**
 * Note:
 * AVIC hardware walks the nested page table to check permissions,
 * but does not use the SPA address specified in the leaf page
 * table entry since it uses  address in the AVIC_BACKING_PAGE pointer
 * field of the VMCB. Therefore, we set up the
 * APIC_ACCESS_PAGE_PRIVATE_MEMSLOT (4KB) here.
 */
static int avic_init_access_page(struct kvm_vcpu *vcpu)
{
	struct kvm *kvm = vcpu->kvm;
	int ret;

	if (kvm->arch.apic_access_page_done)
		return 0;

	ret = x86_set_memory_region(kvm,
				    APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
				    APIC_DEFAULT_PHYS_BASE,
				    PAGE_SIZE);
	if (ret)
		return ret;

	kvm->arch.apic_access_page_done = true;
	return 0;
}

static int avic_init_backing_page(struct kvm_vcpu *vcpu)
{
	int ret;
	u64 *entry, new_entry;
	int id = vcpu->vcpu_id;
	struct vcpu_svm *svm = to_svm(vcpu);

	ret = avic_init_access_page(vcpu);
	if (ret)
		return ret;

	if (id >= AVIC_MAX_PHYSICAL_ID_COUNT)
		return -EINVAL;

	if (!svm->vcpu.arch.apic->regs)
		return -EINVAL;

	svm->avic_backing_page = virt_to_page(svm->vcpu.arch.apic->regs);

	/* Setting AVIC backing page address in the phy APIC ID table */
	entry = avic_get_physical_id_entry(vcpu, id);
	if (!entry)
		return -EINVAL;

	new_entry = READ_ONCE(*entry);
	new_entry = (page_to_phys(svm->avic_backing_page) &
		     AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK) |
		     AVIC_PHYSICAL_ID_ENTRY_VALID_MASK;
	WRITE_ONCE(*entry, new_entry);

	svm->avic_physical_id_cache = entry;

	return 0;
}

static void avic_vm_destroy(struct kvm *kvm)
{
1390
	unsigned long flags;
1391 1392
	struct kvm_arch *vm_data = &kvm->arch;

1393 1394 1395
	if (!avic)
		return;

1396 1397 1398 1399
	if (vm_data->avic_logical_id_table_page)
		__free_page(vm_data->avic_logical_id_table_page);
	if (vm_data->avic_physical_id_table_page)
		__free_page(vm_data->avic_physical_id_table_page);
1400 1401 1402 1403

	spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
	hash_del(&vm_data->hnode);
	spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);
1404 1405 1406 1407
}

static int avic_vm_init(struct kvm *kvm)
{
1408
	unsigned long flags;
1409
	int err = -ENOMEM;
1410 1411 1412
	struct kvm_arch *vm_data = &kvm->arch;
	struct page *p_page;
	struct page *l_page;
1413 1414
	struct kvm_arch *ka;
	u32 vm_id;
1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434

	if (!avic)
		return 0;

	/* Allocating physical APIC ID table (4KB) */
	p_page = alloc_page(GFP_KERNEL);
	if (!p_page)
		goto free_avic;

	vm_data->avic_physical_id_table_page = p_page;
	clear_page(page_address(p_page));

	/* Allocating logical APIC ID table (4KB) */
	l_page = alloc_page(GFP_KERNEL);
	if (!l_page)
		goto free_avic;

	vm_data->avic_logical_id_table_page = l_page;
	clear_page(page_address(l_page));

1435
	spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451
 again:
	vm_id = next_vm_id = (next_vm_id + 1) & AVIC_VM_ID_MASK;
	if (vm_id == 0) { /* id is 1-based, zero is not okay */
		next_vm_id_wrapped = 1;
		goto again;
	}
	/* Is it still in use? Only possible if wrapped at least once */
	if (next_vm_id_wrapped) {
		hash_for_each_possible(svm_vm_data_hash, ka, hnode, vm_id) {
			struct kvm *k2 = container_of(ka, struct kvm, arch);
			struct kvm_arch *vd2 = &k2->arch;
			if (vd2->avic_vm_id == vm_id)
				goto again;
		}
	}
	vm_data->avic_vm_id = vm_id;
1452 1453 1454
	hash_add(svm_vm_data_hash, &vm_data->hnode, vm_data->avic_vm_id);
	spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);

1455 1456 1457 1458 1459
	return 0;

free_avic:
	avic_vm_destroy(kvm);
	return err;
A
Avi Kivity 已提交
1460 1461
}

1462 1463
static inline int
avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, bool r)
1464
{
1465 1466 1467
	int ret = 0;
	unsigned long flags;
	struct amd_svm_iommu_ir *ir;
1468 1469
	struct vcpu_svm *svm = to_svm(vcpu);

1470 1471
	if (!kvm_arch_has_assigned_device(vcpu->kvm))
		return 0;
1472

1473 1474 1475 1476 1477
	/*
	 * Here, we go through the per-vcpu ir_list to update all existing
	 * interrupt remapping table entry targeting this vcpu.
	 */
	spin_lock_irqsave(&svm->ir_list_lock, flags);
1478

1479 1480
	if (list_empty(&svm->ir_list))
		goto out;
1481

1482 1483 1484 1485 1486 1487 1488 1489
	list_for_each_entry(ir, &svm->ir_list, node) {
		ret = amd_iommu_update_ga(cpu, r, ir->data);
		if (ret)
			break;
	}
out:
	spin_unlock_irqrestore(&svm->ir_list_lock, flags);
	return ret;
1490 1491 1492 1493 1494 1495
}

static void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
{
	u64 entry;
	/* ID = 0xff (broadcast), ID > 0xff (reserved) */
1496
	int h_physical_id = kvm_cpu_get_apicid(cpu);
1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515
	struct vcpu_svm *svm = to_svm(vcpu);

	if (!kvm_vcpu_apicv_active(vcpu))
		return;

	if (WARN_ON(h_physical_id >= AVIC_MAX_PHYSICAL_ID_COUNT))
		return;

	entry = READ_ONCE(*(svm->avic_physical_id_cache));
	WARN_ON(entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK);

	entry &= ~AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
	entry |= (h_physical_id & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK);

	entry &= ~AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;
	if (svm->avic_is_running)
		entry |= AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;

	WRITE_ONCE(*(svm->avic_physical_id_cache), entry);
1516 1517
	avic_update_iommu_vcpu_affinity(vcpu, h_physical_id,
					svm->avic_is_running);
1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528
}

static void avic_vcpu_put(struct kvm_vcpu *vcpu)
{
	u64 entry;
	struct vcpu_svm *svm = to_svm(vcpu);

	if (!kvm_vcpu_apicv_active(vcpu))
		return;

	entry = READ_ONCE(*(svm->avic_physical_id_cache));
1529 1530 1531
	if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK)
		avic_update_iommu_vcpu_affinity(vcpu, -1, 0);

1532 1533
	entry &= ~AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;
	WRITE_ONCE(*(svm->avic_physical_id_cache), entry);
A
Avi Kivity 已提交
1534 1535
}

1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549
/**
 * This function is called during VCPU halt/unhalt.
 */
static void avic_set_running(struct kvm_vcpu *vcpu, bool is_run)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	svm->avic_is_running = is_run;
	if (is_run)
		avic_vcpu_load(vcpu, vcpu->cpu);
	else
		avic_vcpu_put(vcpu);
}

1550
static void svm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
1551 1552
{
	struct vcpu_svm *svm = to_svm(vcpu);
1553 1554
	u32 dummy;
	u32 eax = 1;
1555

1556 1557 1558 1559 1560 1561
	if (!init_event) {
		svm->vcpu.arch.apic_base = APIC_DEFAULT_PHYS_BASE |
					   MSR_IA32_APICBASE_ENABLE;
		if (kvm_vcpu_is_reset_bsp(&svm->vcpu))
			svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP;
	}
P
Paolo Bonzini 已提交
1562
	init_vmcb(svm);
A
Avi Kivity 已提交
1563

1564 1565
	kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy);
	kvm_register_write(vcpu, VCPU_REGS_RDX, eax);
1566 1567 1568

	if (kvm_vcpu_apicv_active(vcpu) && !init_event)
		avic_update_vapic_bar(svm, APIC_DEFAULT_PHYS_BASE);
1569 1570
}

R
Rusty Russell 已提交
1571
static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
A
Avi Kivity 已提交
1572
{
1573
	struct vcpu_svm *svm;
A
Avi Kivity 已提交
1574
	struct page *page;
1575
	struct page *msrpm_pages;
A
Alexander Graf 已提交
1576
	struct page *hsave_page;
A
Alexander Graf 已提交
1577
	struct page *nested_msrpm_pages;
R
Rusty Russell 已提交
1578
	int err;
A
Avi Kivity 已提交
1579

1580
	svm = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
R
Rusty Russell 已提交
1581 1582 1583 1584 1585 1586 1587 1588 1589
	if (!svm) {
		err = -ENOMEM;
		goto out;
	}

	err = kvm_vcpu_init(&svm->vcpu, kvm, id);
	if (err)
		goto free_svm;

1590
	err = -ENOMEM;
A
Avi Kivity 已提交
1591
	page = alloc_page(GFP_KERNEL);
1592
	if (!page)
R
Rusty Russell 已提交
1593
		goto uninit;
A
Avi Kivity 已提交
1594

1595 1596
	msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
	if (!msrpm_pages)
1597
		goto free_page1;
A
Alexander Graf 已提交
1598 1599 1600

	nested_msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
	if (!nested_msrpm_pages)
1601
		goto free_page2;
1602

A
Alexander Graf 已提交
1603 1604
	hsave_page = alloc_page(GFP_KERNEL);
	if (!hsave_page)
1605 1606
		goto free_page3;

1607 1608 1609 1610
	if (avic) {
		err = avic_init_backing_page(&svm->vcpu);
		if (err)
			goto free_page4;
1611 1612 1613

		INIT_LIST_HEAD(&svm->ir_list);
		spin_lock_init(&svm->ir_list_lock);
1614 1615
	}

1616 1617 1618 1619 1620
	/* We initialize this flag to true to make sure that the is_running
	 * bit would be set the first time the vcpu is loaded.
	 */
	svm->avic_is_running = true;

1621
	svm->nested.hsave = page_address(hsave_page);
A
Alexander Graf 已提交
1622

1623 1624 1625
	svm->msrpm = page_address(msrpm_pages);
	svm_vcpu_init_msrpm(svm->msrpm);

1626
	svm->nested.msrpm = page_address(nested_msrpm_pages);
1627
	svm_vcpu_init_msrpm(svm->nested.msrpm);
A
Alexander Graf 已提交
1628

1629 1630 1631 1632
	svm->vmcb = page_address(page);
	clear_page(svm->vmcb);
	svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
	svm->asid_generation = 0;
P
Paolo Bonzini 已提交
1633
	init_vmcb(svm);
A
Avi Kivity 已提交
1634

1635 1636
	svm_init_osvw(&svm->vcpu);

R
Rusty Russell 已提交
1637
	return &svm->vcpu;
1638

1639 1640
free_page4:
	__free_page(hsave_page);
1641 1642 1643 1644 1645 1646
free_page3:
	__free_pages(nested_msrpm_pages, MSRPM_ALLOC_ORDER);
free_page2:
	__free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
free_page1:
	__free_page(page);
R
Rusty Russell 已提交
1647 1648 1649
uninit:
	kvm_vcpu_uninit(&svm->vcpu);
free_svm:
1650
	kmem_cache_free(kvm_vcpu_cache, svm);
R
Rusty Russell 已提交
1651 1652
out:
	return ERR_PTR(err);
A
Avi Kivity 已提交
1653 1654 1655 1656
}

static void svm_free_vcpu(struct kvm_vcpu *vcpu)
{
1657 1658
	struct vcpu_svm *svm = to_svm(vcpu);

R
Rusty Russell 已提交
1659
	__free_page(pfn_to_page(svm->vmcb_pa >> PAGE_SHIFT));
1660
	__free_pages(virt_to_page(svm->msrpm), MSRPM_ALLOC_ORDER);
1661 1662
	__free_page(virt_to_page(svm->nested.hsave));
	__free_pages(virt_to_page(svm->nested.msrpm), MSRPM_ALLOC_ORDER);
R
Rusty Russell 已提交
1663
	kvm_vcpu_uninit(vcpu);
1664
	kmem_cache_free(kvm_vcpu_cache, svm);
A
Avi Kivity 已提交
1665 1666
}

1667
static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
A
Avi Kivity 已提交
1668
{
1669
	struct vcpu_svm *svm = to_svm(vcpu);
1670
	int i;
1671 1672

	if (unlikely(cpu != vcpu->cpu)) {
1673
		svm->asid_generation = 0;
1674
		mark_all_dirty(svm->vmcb);
1675
	}
1676

1677 1678 1679
#ifdef CONFIG_X86_64
	rdmsrl(MSR_GS_BASE, to_svm(vcpu)->host.gs_base);
#endif
1680 1681 1682 1683
	savesegment(fs, svm->host.fs);
	savesegment(gs, svm->host.gs);
	svm->host.ldt = kvm_read_ldt();

1684
	for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
1685
		rdmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
1686

1687 1688 1689 1690 1691 1692
	if (static_cpu_has(X86_FEATURE_TSCRATEMSR)) {
		u64 tsc_ratio = vcpu->arch.tsc_scaling_ratio;
		if (tsc_ratio != __this_cpu_read(current_tsc_ratio)) {
			__this_cpu_write(current_tsc_ratio, tsc_ratio);
			wrmsrl(MSR_AMD64_TSC_RATIO, tsc_ratio);
		}
1693
	}
P
Paolo Bonzini 已提交
1694 1695 1696
	/* This assumes that the kernel never uses MSR_TSC_AUX */
	if (static_cpu_has(X86_FEATURE_RDTSCP))
		wrmsrl(MSR_TSC_AUX, svm->tsc_aux);
1697 1698

	avic_vcpu_load(vcpu, cpu);
A
Avi Kivity 已提交
1699 1700 1701 1702
}

static void svm_vcpu_put(struct kvm_vcpu *vcpu)
{
1703
	struct vcpu_svm *svm = to_svm(vcpu);
1704 1705
	int i;

1706 1707
	avic_vcpu_put(vcpu);

1708
	++vcpu->stat.host_state_reload;
1709 1710 1711
	kvm_load_ldt(svm->host.ldt);
#ifdef CONFIG_X86_64
	loadsegment(fs, svm->host.fs);
1712
	wrmsrl(MSR_KERNEL_GS_BASE, current->thread.gsbase);
1713
	load_gs_index(svm->host.gs);
1714
#else
1715
#ifdef CONFIG_X86_32_LAZY_GS
1716
	loadsegment(gs, svm->host.gs);
1717
#endif
1718
#endif
1719
	for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
1720
		wrmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
A
Avi Kivity 已提交
1721 1722
}

1723 1724 1725 1726 1727 1728 1729 1730 1731 1732
static void svm_vcpu_blocking(struct kvm_vcpu *vcpu)
{
	avic_set_running(vcpu, false);
}

static void svm_vcpu_unblocking(struct kvm_vcpu *vcpu)
{
	avic_set_running(vcpu, true);
}

A
Avi Kivity 已提交
1733 1734
static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
{
1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745
	struct vcpu_svm *svm = to_svm(vcpu);
	unsigned long rflags = svm->vmcb->save.rflags;

	if (svm->nmi_singlestep) {
		/* Hide our flags if they were not set by the guest */
		if (!(svm->nmi_singlestep_guest_rflags & X86_EFLAGS_TF))
			rflags &= ~X86_EFLAGS_TF;
		if (!(svm->nmi_singlestep_guest_rflags & X86_EFLAGS_RF))
			rflags &= ~X86_EFLAGS_RF;
	}
	return rflags;
A
Avi Kivity 已提交
1746 1747 1748 1749
}

static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
{
1750 1751 1752
	if (to_svm(vcpu)->nmi_singlestep)
		rflags |= (X86_EFLAGS_TF | X86_EFLAGS_RF);

P
Paolo Bonzini 已提交
1753
       /*
A
Andrea Gelmini 已提交
1754
        * Any change of EFLAGS.VM is accompanied by a reload of SS
P
Paolo Bonzini 已提交
1755 1756 1757
        * (caused by either a task switch or an inter-privilege IRET),
        * so we do not need to update the CPL here.
        */
1758
	to_svm(vcpu)->vmcb->save.rflags = rflags;
A
Avi Kivity 已提交
1759 1760
}

1761 1762 1763 1764 1765
static u32 svm_get_pkru(struct kvm_vcpu *vcpu)
{
	return 0;
}

A
Avi Kivity 已提交
1766 1767 1768 1769 1770
static void svm_cache_reg(struct kvm_vcpu *vcpu, enum kvm_reg reg)
{
	switch (reg) {
	case VCPU_EXREG_PDPTR:
		BUG_ON(!npt_enabled);
1771
		load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
A
Avi Kivity 已提交
1772 1773 1774 1775 1776 1777
		break;
	default:
		BUG();
	}
}

1778 1779
static void svm_set_vintr(struct vcpu_svm *svm)
{
1780
	set_intercept(svm, INTERCEPT_VINTR);
1781 1782 1783 1784
}

static void svm_clear_vintr(struct vcpu_svm *svm)
{
1785
	clr_intercept(svm, INTERCEPT_VINTR);
1786 1787
}

A
Avi Kivity 已提交
1788 1789
static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
{
1790
	struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
A
Avi Kivity 已提交
1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802

	switch (seg) {
	case VCPU_SREG_CS: return &save->cs;
	case VCPU_SREG_DS: return &save->ds;
	case VCPU_SREG_ES: return &save->es;
	case VCPU_SREG_FS: return &save->fs;
	case VCPU_SREG_GS: return &save->gs;
	case VCPU_SREG_SS: return &save->ss;
	case VCPU_SREG_TR: return &save->tr;
	case VCPU_SREG_LDTR: return &save->ldtr;
	}
	BUG();
A
Al Viro 已提交
1803
	return NULL;
A
Avi Kivity 已提交
1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827
}

static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
{
	struct vmcb_seg *s = svm_seg(vcpu, seg);

	return s->base;
}

static void svm_get_segment(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg)
{
	struct vmcb_seg *s = svm_seg(vcpu, seg);

	var->base = s->base;
	var->limit = s->limit;
	var->selector = s->selector;
	var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
	var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
	var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
	var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
	var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
	var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
	var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
1828 1829 1830 1831 1832 1833 1834 1835 1836 1837

	/*
	 * AMD CPUs circa 2014 track the G bit for all segments except CS.
	 * However, the SVM spec states that the G bit is not observed by the
	 * CPU, and some VMware virtual CPUs drop the G bit for all segments.
	 * So let's synthesize a legal G bit for all segments, this helps
	 * running KVM nested. It also helps cross-vendor migration, because
	 * Intel's vmentry has a check on the 'G' bit.
	 */
	var->g = s->limit > 0xfffff;
1838

J
Joerg Roedel 已提交
1839 1840
	/*
	 * AMD's VMCB does not have an explicit unusable field, so emulate it
1841 1842
	 * for cross vendor migration purposes by "not present"
	 */
1843
	var->unusable = !var->present;
1844

1845 1846 1847 1848 1849 1850
	switch (seg) {
	case VCPU_SREG_TR:
		/*
		 * Work around a bug where the busy flag in the tr selector
		 * isn't exposed
		 */
1851
		var->type |= 0x2;
1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866
		break;
	case VCPU_SREG_DS:
	case VCPU_SREG_ES:
	case VCPU_SREG_FS:
	case VCPU_SREG_GS:
		/*
		 * The accessed bit must always be set in the segment
		 * descriptor cache, although it can be cleared in the
		 * descriptor, the cached bit always remains at 1. Since
		 * Intel has a check on this, set it here to support
		 * cross-vendor migration.
		 */
		if (!var->unusable)
			var->type |= 0x1;
		break;
1867
	case VCPU_SREG_SS:
J
Joerg Roedel 已提交
1868 1869
		/*
		 * On AMD CPUs sometimes the DB bit in the segment
1870 1871 1872 1873 1874 1875
		 * descriptor is left as 1, although the whole segment has
		 * been made unusable. Clear it here to pass an Intel VMX
		 * entry check when cross vendor migrating.
		 */
		if (var->unusable)
			var->db = 0;
1876
		/* This is symmetric with svm_set_segment() */
J
Jan Kiszka 已提交
1877
		var->dpl = to_svm(vcpu)->vmcb->save.cpl;
1878
		break;
1879
	}
A
Avi Kivity 已提交
1880 1881
}

1882 1883 1884 1885 1886 1887 1888
static int svm_get_cpl(struct kvm_vcpu *vcpu)
{
	struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;

	return save->cpl;
}

1889
static void svm_get_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
A
Avi Kivity 已提交
1890
{
1891 1892
	struct vcpu_svm *svm = to_svm(vcpu);

1893 1894
	dt->size = svm->vmcb->save.idtr.limit;
	dt->address = svm->vmcb->save.idtr.base;
A
Avi Kivity 已提交
1895 1896
}

1897
static void svm_set_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
A
Avi Kivity 已提交
1898
{
1899 1900
	struct vcpu_svm *svm = to_svm(vcpu);

1901 1902
	svm->vmcb->save.idtr.limit = dt->size;
	svm->vmcb->save.idtr.base = dt->address ;
1903
	mark_dirty(svm->vmcb, VMCB_DT);
A
Avi Kivity 已提交
1904 1905
}

1906
static void svm_get_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
A
Avi Kivity 已提交
1907
{
1908 1909
	struct vcpu_svm *svm = to_svm(vcpu);

1910 1911
	dt->size = svm->vmcb->save.gdtr.limit;
	dt->address = svm->vmcb->save.gdtr.base;
A
Avi Kivity 已提交
1912 1913
}

1914
static void svm_set_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
A
Avi Kivity 已提交
1915
{
1916 1917
	struct vcpu_svm *svm = to_svm(vcpu);

1918 1919
	svm->vmcb->save.gdtr.limit = dt->size;
	svm->vmcb->save.gdtr.base = dt->address ;
1920
	mark_dirty(svm->vmcb, VMCB_DT);
A
Avi Kivity 已提交
1921 1922
}

1923 1924 1925 1926
static void svm_decache_cr0_guest_bits(struct kvm_vcpu *vcpu)
{
}

1927 1928 1929 1930
static void svm_decache_cr3(struct kvm_vcpu *vcpu)
{
}

1931
static void svm_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1932 1933 1934
{
}

A
Avi Kivity 已提交
1935 1936 1937 1938 1939
static void update_cr0_intercept(struct vcpu_svm *svm)
{
	ulong gcr0 = svm->vcpu.arch.cr0;
	u64 *hcr0 = &svm->vmcb->save.cr0;

1940 1941
	*hcr0 = (*hcr0 & ~SVM_CR0_SELECTIVE_MASK)
		| (gcr0 & SVM_CR0_SELECTIVE_MASK);
A
Avi Kivity 已提交
1942

1943
	mark_dirty(svm->vmcb, VMCB_CR);
A
Avi Kivity 已提交
1944

1945
	if (gcr0 == *hcr0) {
1946 1947
		clr_cr_intercept(svm, INTERCEPT_CR0_READ);
		clr_cr_intercept(svm, INTERCEPT_CR0_WRITE);
A
Avi Kivity 已提交
1948
	} else {
1949 1950
		set_cr_intercept(svm, INTERCEPT_CR0_READ);
		set_cr_intercept(svm, INTERCEPT_CR0_WRITE);
A
Avi Kivity 已提交
1951 1952 1953
	}
}

A
Avi Kivity 已提交
1954 1955
static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
{
1956 1957
	struct vcpu_svm *svm = to_svm(vcpu);

1958
#ifdef CONFIG_X86_64
1959
	if (vcpu->arch.efer & EFER_LME) {
1960
		if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
1961
			vcpu->arch.efer |= EFER_LMA;
1962
			svm->vmcb->save.efer |= EFER_LMA | EFER_LME;
A
Avi Kivity 已提交
1963 1964
		}

M
Mike Day 已提交
1965
		if (is_paging(vcpu) && !(cr0 & X86_CR0_PG)) {
1966
			vcpu->arch.efer &= ~EFER_LMA;
1967
			svm->vmcb->save.efer &= ~(EFER_LMA | EFER_LME);
A
Avi Kivity 已提交
1968 1969 1970
		}
	}
#endif
1971
	vcpu->arch.cr0 = cr0;
1972 1973 1974

	if (!npt_enabled)
		cr0 |= X86_CR0_PG | X86_CR0_WP;
1975

1976 1977 1978 1979 1980 1981 1982
	/*
	 * re-enable caching here because the QEMU bios
	 * does not do it - this results in some delay at
	 * reboot
	 */
	if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
		cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
1983
	svm->vmcb->save.cr0 = cr0;
1984
	mark_dirty(svm->vmcb, VMCB_CR);
A
Avi Kivity 已提交
1985
	update_cr0_intercept(svm);
A
Avi Kivity 已提交
1986 1987
}

1988
static int svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
A
Avi Kivity 已提交
1989
{
1990
	unsigned long host_cr4_mce = cr4_read_shadow() & X86_CR4_MCE;
1991 1992
	unsigned long old_cr4 = to_svm(vcpu)->vmcb->save.cr4;

1993 1994 1995
	if (cr4 & X86_CR4_VMXE)
		return 1;

1996
	if (npt_enabled && ((old_cr4 ^ cr4) & X86_CR4_PGE))
1997
		svm_flush_tlb(vcpu);
1998

1999 2000 2001
	vcpu->arch.cr4 = cr4;
	if (!npt_enabled)
		cr4 |= X86_CR4_PAE;
2002
	cr4 |= host_cr4_mce;
2003
	to_svm(vcpu)->vmcb->save.cr4 = cr4;
2004
	mark_dirty(to_svm(vcpu)->vmcb, VMCB_CR);
2005
	return 0;
A
Avi Kivity 已提交
2006 2007 2008 2009 2010
}

static void svm_set_segment(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg)
{
2011
	struct vcpu_svm *svm = to_svm(vcpu);
A
Avi Kivity 已提交
2012 2013 2014 2015 2016
	struct vmcb_seg *s = svm_seg(vcpu, seg);

	s->base = var->base;
	s->limit = var->limit;
	s->selector = var->selector;
2017 2018 2019 2020 2021 2022 2023 2024
	s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
	s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
	s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
	s->attrib |= ((var->present & 1) && !var->unusable) << SVM_SELECTOR_P_SHIFT;
	s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
	s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
	s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
	s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
P
Paolo Bonzini 已提交
2025 2026 2027 2028 2029 2030 2031 2032

	/*
	 * This is always accurate, except if SYSRET returned to a segment
	 * with SS.DPL != 3.  Intel does not have this quirk, and always
	 * forces SS.DPL to 3 on sysret, so we ignore that case; fixing it
	 * would entail passing the CPL to userspace and back.
	 */
	if (seg == VCPU_SREG_SS)
2033 2034
		/* This is symmetric with svm_get_segment() */
		svm->vmcb->save.cpl = (var->dpl & 3);
A
Avi Kivity 已提交
2035

2036
	mark_dirty(svm->vmcb, VMCB_SEG);
A
Avi Kivity 已提交
2037 2038
}

2039
static void update_bp_intercept(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
2040
{
J
Jan Kiszka 已提交
2041 2042
	struct vcpu_svm *svm = to_svm(vcpu);

2043
	clr_exception_intercept(svm, BP_VECTOR);
2044

J
Jan Kiszka 已提交
2045 2046
	if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) {
		if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
2047
			set_exception_intercept(svm, BP_VECTOR);
J
Jan Kiszka 已提交
2048 2049
	} else
		vcpu->guest_debug = 0;
2050 2051
}

2052
static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *sd)
A
Avi Kivity 已提交
2053
{
2054 2055 2056
	if (sd->next_asid > sd->max_asid) {
		++sd->asid_generation;
		sd->next_asid = 1;
2057
		svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
A
Avi Kivity 已提交
2058 2059
	}

2060 2061
	svm->asid_generation = sd->asid_generation;
	svm->vmcb->control.asid = sd->next_asid++;
2062 2063

	mark_dirty(svm->vmcb, VMCB_ASID);
A
Avi Kivity 已提交
2064 2065
}

J
Jan Kiszka 已提交
2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078
static u64 svm_get_dr6(struct kvm_vcpu *vcpu)
{
	return to_svm(vcpu)->vmcb->save.dr6;
}

static void svm_set_dr6(struct kvm_vcpu *vcpu, unsigned long value)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	svm->vmcb->save.dr6 = value;
	mark_dirty(svm->vmcb, VMCB_DR);
}

2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093
static void svm_sync_dirty_debug_regs(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	get_debugreg(vcpu->arch.db[0], 0);
	get_debugreg(vcpu->arch.db[1], 1);
	get_debugreg(vcpu->arch.db[2], 2);
	get_debugreg(vcpu->arch.db[3], 3);
	vcpu->arch.dr6 = svm_get_dr6(vcpu);
	vcpu->arch.dr7 = svm->vmcb->save.dr7;

	vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_WONT_EXIT;
	set_dr_intercepts(svm);
}

2094
static void svm_set_dr7(struct kvm_vcpu *vcpu, unsigned long value)
A
Avi Kivity 已提交
2095
{
2096 2097
	struct vcpu_svm *svm = to_svm(vcpu);

2098
	svm->vmcb->save.dr7 = value;
2099
	mark_dirty(svm->vmcb, VMCB_DR);
A
Avi Kivity 已提交
2100 2101
}

A
Avi Kivity 已提交
2102
static int pf_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
2103
{
G
Gleb Natapov 已提交
2104
	u64 fault_address = svm->vmcb->control.exit_info_2;
2105
	u64 error_code = svm->vmcb->control.exit_info_1;
A
Avi Kivity 已提交
2106

2107
	return kvm_handle_page_fault(&svm->vcpu, error_code, fault_address,
2108
			svm->vmcb->control.insn_bytes,
2109
			svm->vmcb->control.insn_len, !npt_enabled);
A
Avi Kivity 已提交
2110 2111
}

A
Avi Kivity 已提交
2112
static int db_interception(struct vcpu_svm *svm)
J
Jan Kiszka 已提交
2113
{
A
Avi Kivity 已提交
2114 2115
	struct kvm_run *kvm_run = svm->vcpu.run;

J
Jan Kiszka 已提交
2116
	if (!(svm->vcpu.guest_debug &
2117
	      (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)) &&
J
Jan Kiszka 已提交
2118
		!svm->nmi_singlestep) {
J
Jan Kiszka 已提交
2119 2120 2121
		kvm_queue_exception(&svm->vcpu, DB_VECTOR);
		return 1;
	}
2122

J
Jan Kiszka 已提交
2123
	if (svm->nmi_singlestep) {
2124
		disable_nmi_singlestep(svm);
2125 2126 2127
	}

	if (svm->vcpu.guest_debug &
J
Joerg Roedel 已提交
2128
	    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)) {
2129 2130 2131 2132 2133 2134 2135 2136
		kvm_run->exit_reason = KVM_EXIT_DEBUG;
		kvm_run->debug.arch.pc =
			svm->vmcb->save.cs.base + svm->vmcb->save.rip;
		kvm_run->debug.arch.exception = DB_VECTOR;
		return 0;
	}

	return 1;
J
Jan Kiszka 已提交
2137 2138
}

A
Avi Kivity 已提交
2139
static int bp_interception(struct vcpu_svm *svm)
J
Jan Kiszka 已提交
2140
{
A
Avi Kivity 已提交
2141 2142
	struct kvm_run *kvm_run = svm->vcpu.run;

J
Jan Kiszka 已提交
2143 2144 2145 2146 2147 2148
	kvm_run->exit_reason = KVM_EXIT_DEBUG;
	kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
	kvm_run->debug.arch.exception = BP_VECTOR;
	return 0;
}

A
Avi Kivity 已提交
2149
static int ud_interception(struct vcpu_svm *svm)
2150 2151 2152
{
	int er;

2153
	er = emulate_instruction(&svm->vcpu, EMULTYPE_TRAP_UD);
2154
	if (er != EMULATE_DONE)
2155
		kvm_queue_exception(&svm->vcpu, UD_VECTOR);
2156 2157 2158
	return 1;
}

2159 2160 2161 2162 2163 2164
static int ac_interception(struct vcpu_svm *svm)
{
	kvm_queue_exception_e(&svm->vcpu, AC_VECTOR, 0);
	return 1;
}

2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203
static bool is_erratum_383(void)
{
	int err, i;
	u64 value;

	if (!erratum_383_found)
		return false;

	value = native_read_msr_safe(MSR_IA32_MC0_STATUS, &err);
	if (err)
		return false;

	/* Bit 62 may or may not be set for this mce */
	value &= ~(1ULL << 62);

	if (value != 0xb600000000010015ULL)
		return false;

	/* Clear MCi_STATUS registers */
	for (i = 0; i < 6; ++i)
		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0, 0);

	value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &err);
	if (!err) {
		u32 low, high;

		value &= ~(1ULL << 2);
		low    = lower_32_bits(value);
		high   = upper_32_bits(value);

		native_write_msr_safe(MSR_IA32_MCG_STATUS, low, high);
	}

	/* Flush tlb to evict multi-match entries */
	__flush_tlb_all();

	return true;
}

2204
static void svm_handle_mce(struct vcpu_svm *svm)
2205
{
2206 2207 2208 2209 2210 2211 2212
	if (is_erratum_383()) {
		/*
		 * Erratum 383 triggered. Guest state is corrupt so kill the
		 * guest.
		 */
		pr_err("KVM: Guest triggered AMD Erratum 383\n");

2213
		kvm_make_request(KVM_REQ_TRIPLE_FAULT, &svm->vcpu);
2214 2215 2216 2217

		return;
	}

2218 2219 2220 2221 2222 2223 2224 2225
	/*
	 * On an #MC intercept the MCE handler is not called automatically in
	 * the host. So do it by hand here.
	 */
	asm volatile (
		"int $0x12\n");
	/* not sure if we ever come back to this point */

2226 2227 2228 2229 2230
	return;
}

static int mc_interception(struct vcpu_svm *svm)
{
2231 2232 2233
	return 1;
}

A
Avi Kivity 已提交
2234
static int shutdown_interception(struct vcpu_svm *svm)
2235
{
A
Avi Kivity 已提交
2236 2237
	struct kvm_run *kvm_run = svm->vcpu.run;

2238 2239 2240 2241
	/*
	 * VMCB is undefined after a SHUTDOWN intercept
	 * so reinitialize it.
	 */
2242
	clear_page(svm->vmcb);
P
Paolo Bonzini 已提交
2243
	init_vmcb(svm);
2244 2245 2246 2247 2248

	kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
	return 0;
}

A
Avi Kivity 已提交
2249
static int io_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
2250
{
2251
	struct kvm_vcpu *vcpu = &svm->vcpu;
M
Mike Day 已提交
2252
	u32 io_info = svm->vmcb->control.exit_info_1; /* address size bug? */
2253
	int size, in, string, ret;
2254
	unsigned port;
A
Avi Kivity 已提交
2255

R
Rusty Russell 已提交
2256
	++svm->vcpu.stat.io_exits;
2257
	string = (io_info & SVM_IOIO_STR_MASK) != 0;
2258
	in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
2259
	if (string)
2260
		return emulate_instruction(vcpu, 0) == EMULATE_DONE;
2261

2262 2263
	port = io_info >> 16;
	size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
2264
	svm->next_rip = svm->vmcb->control.exit_info_2;
2265
	ret = kvm_skip_emulated_instruction(&svm->vcpu);
2266

2267 2268 2269 2270 2271 2272 2273 2274
	/*
	 * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
	 * KVM_EXIT_DEBUG here.
	 */
	if (in)
		return kvm_fast_pio_in(vcpu, size, port) && ret;
	else
		return kvm_fast_pio_out(vcpu, size, port) && ret;
A
Avi Kivity 已提交
2275 2276
}

A
Avi Kivity 已提交
2277
static int nmi_interception(struct vcpu_svm *svm)
2278 2279 2280 2281
{
	return 1;
}

A
Avi Kivity 已提交
2282
static int intr_interception(struct vcpu_svm *svm)
2283 2284 2285 2286 2287
{
	++svm->vcpu.stat.irq_exits;
	return 1;
}

A
Avi Kivity 已提交
2288
static int nop_on_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
2289 2290 2291 2292
{
	return 1;
}

A
Avi Kivity 已提交
2293
static int halt_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
2294
{
2295
	svm->next_rip = kvm_rip_read(&svm->vcpu) + 1;
R
Rusty Russell 已提交
2296
	return kvm_emulate_halt(&svm->vcpu);
A
Avi Kivity 已提交
2297 2298
}

A
Avi Kivity 已提交
2299
static int vmmcall_interception(struct vcpu_svm *svm)
2300
{
2301
	svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
2302
	return kvm_emulate_hypercall(&svm->vcpu);
2303 2304
}

2305 2306 2307 2308 2309 2310 2311
static unsigned long nested_svm_get_tdp_cr3(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	return svm->nested.nested_cr3;
}

2312 2313 2314 2315 2316 2317 2318
static u64 nested_svm_get_tdp_pdptr(struct kvm_vcpu *vcpu, int index)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	u64 cr3 = svm->nested.nested_cr3;
	u64 pdpte;
	int ret;

2319 2320
	ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(cr3), &pdpte,
				       offset_in_page(cr3) + index * 8, 8);
2321 2322 2323 2324 2325
	if (ret)
		return 0;
	return pdpte;
}

2326 2327 2328 2329 2330 2331
static void nested_svm_set_tdp_cr3(struct kvm_vcpu *vcpu,
				   unsigned long root)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	svm->vmcb->control.nested_cr3 = root;
2332
	mark_dirty(svm->vmcb, VMCB_NPT);
2333
	svm_flush_tlb(vcpu);
2334 2335
}

2336 2337
static void nested_svm_inject_npf_exit(struct kvm_vcpu *vcpu,
				       struct x86_exception *fault)
2338 2339 2340
{
	struct vcpu_svm *svm = to_svm(vcpu);

2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360
	if (svm->vmcb->control.exit_code != SVM_EXIT_NPF) {
		/*
		 * TODO: track the cause of the nested page fault, and
		 * correctly fill in the high bits of exit_info_1.
		 */
		svm->vmcb->control.exit_code = SVM_EXIT_NPF;
		svm->vmcb->control.exit_code_hi = 0;
		svm->vmcb->control.exit_info_1 = (1ULL << 32);
		svm->vmcb->control.exit_info_2 = fault->address;
	}

	svm->vmcb->control.exit_info_1 &= ~0xffffffffULL;
	svm->vmcb->control.exit_info_1 |= fault->error_code;

	/*
	 * The present bit is always zero for page structure faults on real
	 * hardware.
	 */
	if (svm->vmcb->control.exit_info_1 & (2ULL << 32))
		svm->vmcb->control.exit_info_1 &= ~1;
2361 2362 2363 2364

	nested_svm_vmexit(svm);
}

2365
static void nested_svm_init_mmu_context(struct kvm_vcpu *vcpu)
2366
{
2367 2368
	WARN_ON(mmu_is_nested(vcpu));
	kvm_init_shadow_mmu(vcpu);
2369 2370
	vcpu->arch.mmu.set_cr3           = nested_svm_set_tdp_cr3;
	vcpu->arch.mmu.get_cr3           = nested_svm_get_tdp_cr3;
2371
	vcpu->arch.mmu.get_pdptr         = nested_svm_get_tdp_pdptr;
2372 2373
	vcpu->arch.mmu.inject_page_fault = nested_svm_inject_npf_exit;
	vcpu->arch.mmu.shadow_root_level = get_npt_level();
2374
	reset_shadow_zero_bits_mask(vcpu, &vcpu->arch.mmu);
2375 2376 2377 2378 2379 2380 2381 2382
	vcpu->arch.walk_mmu              = &vcpu->arch.nested_mmu;
}

static void nested_svm_uninit_mmu_context(struct kvm_vcpu *vcpu)
{
	vcpu->arch.walk_mmu = &vcpu->arch.mmu;
}

2383 2384
static int nested_svm_check_permissions(struct vcpu_svm *svm)
{
2385 2386
	if (!(svm->vcpu.arch.efer & EFER_SVME) ||
	    !is_paging(&svm->vcpu)) {
2387 2388 2389 2390 2391 2392 2393 2394 2395
		kvm_queue_exception(&svm->vcpu, UD_VECTOR);
		return 1;
	}

	if (svm->vmcb->save.cpl) {
		kvm_inject_gp(&svm->vcpu, 0);
		return 1;
	}

2396
	return 0;
2397 2398
}

2399 2400 2401
static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
				      bool has_error_code, u32 error_code)
{
2402 2403
	int vmexit;

2404
	if (!is_guest_mode(&svm->vcpu))
2405
		return 0;
2406

2407 2408 2409 2410
	vmexit = nested_svm_intercept(svm);
	if (vmexit != NESTED_EXIT_DONE)
		return 0;

2411 2412 2413
	svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr;
	svm->vmcb->control.exit_code_hi = 0;
	svm->vmcb->control.exit_info_1 = error_code;
2414 2415 2416 2417 2418 2419 2420 2421 2422 2423

	/*
	 * FIXME: we should not write CR2 when L1 intercepts an L2 #PF exception.
	 * The fix is to add the ancillary datum (CR2 or DR6) to structs
	 * kvm_queued_exception and kvm_vcpu_events, so that CR2 and DR6 can be
	 * written only when inject_pending_event runs (DR6 would written here
	 * too).  This should be conditional on a new capability---if the
	 * capability is disabled, kvm_multiple_exception would write the
	 * ancillary information to CR2 or DR6, for backwards ABI-compatibility.
	 */
2424 2425 2426 2427
	if (svm->vcpu.arch.exception.nested_apf)
		svm->vmcb->control.exit_info_2 = svm->vcpu.arch.apf.nested_apf_token;
	else
		svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
2428

2429
	svm->nested.exit_required = true;
2430
	return vmexit;
2431 2432
}

2433 2434
/* This function returns true if it is save to enable the irq window */
static inline bool nested_svm_intr(struct vcpu_svm *svm)
2435
{
2436
	if (!is_guest_mode(&svm->vcpu))
2437
		return true;
2438

2439
	if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
2440
		return true;
2441

2442
	if (!(svm->vcpu.arch.hflags & HF_HIF_MASK))
2443
		return false;
2444

2445 2446 2447 2448 2449 2450 2451 2452
	/*
	 * if vmexit was already requested (by intercepted exception
	 * for instance) do not overwrite it with "external interrupt"
	 * vmexit.
	 */
	if (svm->nested.exit_required)
		return false;

2453 2454 2455
	svm->vmcb->control.exit_code   = SVM_EXIT_INTR;
	svm->vmcb->control.exit_info_1 = 0;
	svm->vmcb->control.exit_info_2 = 0;
2456

2457 2458 2459
	if (svm->nested.intercept & 1ULL) {
		/*
		 * The #vmexit can't be emulated here directly because this
G
Guo Chao 已提交
2460
		 * code path runs with irqs and preemption disabled. A
2461 2462 2463 2464
		 * #vmexit emulation might sleep. Only signal request for
		 * the #vmexit here.
		 */
		svm->nested.exit_required = true;
2465
		trace_kvm_nested_intr_vmexit(svm->vmcb->save.rip);
2466
		return false;
2467 2468
	}

2469
	return true;
2470 2471
}

2472 2473 2474
/* This function returns true if it is save to enable the nmi window */
static inline bool nested_svm_nmi(struct vcpu_svm *svm)
{
2475
	if (!is_guest_mode(&svm->vcpu))
2476 2477 2478 2479 2480 2481 2482 2483 2484
		return true;

	if (!(svm->nested.intercept & (1ULL << INTERCEPT_NMI)))
		return true;

	svm->vmcb->control.exit_code = SVM_EXIT_NMI;
	svm->nested.exit_required = true;

	return false;
2485 2486
}

2487
static void *nested_svm_map(struct vcpu_svm *svm, u64 gpa, struct page **_page)
2488 2489 2490
{
	struct page *page;

2491 2492
	might_sleep();

2493
	page = kvm_vcpu_gfn_to_page(&svm->vcpu, gpa >> PAGE_SHIFT);
2494 2495 2496
	if (is_error_page(page))
		goto error;

2497 2498 2499
	*_page = page;

	return kmap(page);
2500 2501 2502 2503 2504 2505 2506

error:
	kvm_inject_gp(&svm->vcpu, 0);

	return NULL;
}

2507
static void nested_svm_unmap(struct page *page)
2508
{
2509
	kunmap(page);
2510 2511 2512
	kvm_release_page_dirty(page);
}

2513 2514
static int nested_svm_intercept_ioio(struct vcpu_svm *svm)
{
2515 2516 2517
	unsigned port, size, iopm_len;
	u16 val, mask;
	u8 start_bit;
2518
	u64 gpa;
2519

2520 2521
	if (!(svm->nested.intercept & (1ULL << INTERCEPT_IOIO_PROT)))
		return NESTED_EXIT_HOST;
2522

2523
	port = svm->vmcb->control.exit_info_1 >> 16;
2524 2525
	size = (svm->vmcb->control.exit_info_1 & SVM_IOIO_SIZE_MASK) >>
		SVM_IOIO_SIZE_SHIFT;
2526
	gpa  = svm->nested.vmcb_iopm + (port / 8);
2527 2528 2529 2530
	start_bit = port % 8;
	iopm_len = (start_bit + size > 8) ? 2 : 1;
	mask = (0xf >> (4 - size)) << start_bit;
	val = 0;
2531

2532
	if (kvm_vcpu_read_guest(&svm->vcpu, gpa, &val, iopm_len))
2533
		return NESTED_EXIT_DONE;
2534

2535
	return (val & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;
2536 2537
}

2538
static int nested_svm_exit_handled_msr(struct vcpu_svm *svm)
2539
{
2540 2541
	u32 offset, msr, value;
	int write, mask;
2542

2543
	if (!(svm->nested.intercept & (1ULL << INTERCEPT_MSR_PROT)))
2544
		return NESTED_EXIT_HOST;
2545

2546 2547 2548 2549
	msr    = svm->vcpu.arch.regs[VCPU_REGS_RCX];
	offset = svm_msrpm_offset(msr);
	write  = svm->vmcb->control.exit_info_1 & 1;
	mask   = 1 << ((2 * (msr & 0xf)) + write);
2550

2551 2552
	if (offset == MSR_INVALID)
		return NESTED_EXIT_DONE;
2553

2554 2555
	/* Offset is in 32 bit units but need in 8 bit units */
	offset *= 4;
2556

2557
	if (kvm_vcpu_read_guest(&svm->vcpu, svm->nested.vmcb_msrpm + offset, &value, 4))
2558
		return NESTED_EXIT_DONE;
2559

2560
	return (value & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;
2561 2562
}

2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587
/* DB exceptions for our internal use must not cause vmexit */
static int nested_svm_intercept_db(struct vcpu_svm *svm)
{
	unsigned long dr6;

	/* if we're not singlestepping, it's not ours */
	if (!svm->nmi_singlestep)
		return NESTED_EXIT_DONE;

	/* if it's not a singlestep exception, it's not ours */
	if (kvm_get_dr(&svm->vcpu, 6, &dr6))
		return NESTED_EXIT_DONE;
	if (!(dr6 & DR6_BS))
		return NESTED_EXIT_DONE;

	/* if the guest is singlestepping, it should get the vmexit */
	if (svm->nmi_singlestep_guest_rflags & X86_EFLAGS_TF) {
		disable_nmi_singlestep(svm);
		return NESTED_EXIT_DONE;
	}

	/* it's ours, the nested hypervisor must not see this one */
	return NESTED_EXIT_HOST;
}

2588
static int nested_svm_exit_special(struct vcpu_svm *svm)
2589 2590
{
	u32 exit_code = svm->vmcb->control.exit_code;
2591

2592 2593 2594
	switch (exit_code) {
	case SVM_EXIT_INTR:
	case SVM_EXIT_NMI:
2595
	case SVM_EXIT_EXCP_BASE + MC_VECTOR:
2596 2597
		return NESTED_EXIT_HOST;
	case SVM_EXIT_NPF:
J
Joerg Roedel 已提交
2598
		/* For now we are always handling NPFs when using them */
2599 2600 2601 2602
		if (npt_enabled)
			return NESTED_EXIT_HOST;
		break;
	case SVM_EXIT_EXCP_BASE + PF_VECTOR:
G
Gleb Natapov 已提交
2603
		/* When we're shadowing, trap PFs, but not async PF */
2604
		if (!npt_enabled && svm->vcpu.arch.apf.host_apf_reason == 0)
2605 2606 2607 2608
			return NESTED_EXIT_HOST;
		break;
	default:
		break;
2609 2610
	}

2611 2612 2613 2614 2615 2616
	return NESTED_EXIT_CONTINUE;
}

/*
 * If this function returns true, this #vmexit was already handled
 */
2617
static int nested_svm_intercept(struct vcpu_svm *svm)
2618 2619 2620 2621
{
	u32 exit_code = svm->vmcb->control.exit_code;
	int vmexit = NESTED_EXIT_HOST;

2622
	switch (exit_code) {
2623
	case SVM_EXIT_MSR:
2624
		vmexit = nested_svm_exit_handled_msr(svm);
2625
		break;
2626 2627 2628
	case SVM_EXIT_IOIO:
		vmexit = nested_svm_intercept_ioio(svm);
		break;
2629 2630 2631
	case SVM_EXIT_READ_CR0 ... SVM_EXIT_WRITE_CR8: {
		u32 bit = 1U << (exit_code - SVM_EXIT_READ_CR0);
		if (svm->nested.intercept_cr & bit)
2632
			vmexit = NESTED_EXIT_DONE;
2633 2634
		break;
	}
2635 2636 2637
	case SVM_EXIT_READ_DR0 ... SVM_EXIT_WRITE_DR7: {
		u32 bit = 1U << (exit_code - SVM_EXIT_READ_DR0);
		if (svm->nested.intercept_dr & bit)
2638
			vmexit = NESTED_EXIT_DONE;
2639 2640 2641 2642
		break;
	}
	case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
		u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
2643 2644 2645 2646 2647 2648
		if (svm->nested.intercept_exceptions & excp_bits) {
			if (exit_code == SVM_EXIT_EXCP_BASE + DB_VECTOR)
				vmexit = nested_svm_intercept_db(svm);
			else
				vmexit = NESTED_EXIT_DONE;
		}
G
Gleb Natapov 已提交
2649 2650
		/* async page fault always cause vmexit */
		else if ((exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR) &&
2651
			 svm->vcpu.arch.exception.nested_apf != 0)
G
Gleb Natapov 已提交
2652
			vmexit = NESTED_EXIT_DONE;
2653 2654
		break;
	}
2655 2656 2657 2658
	case SVM_EXIT_ERR: {
		vmexit = NESTED_EXIT_DONE;
		break;
	}
2659 2660
	default: {
		u64 exit_bits = 1ULL << (exit_code - SVM_EXIT_INTR);
J
Joerg Roedel 已提交
2661
		if (svm->nested.intercept & exit_bits)
2662
			vmexit = NESTED_EXIT_DONE;
2663 2664 2665
	}
	}

2666 2667 2668 2669 2670 2671 2672 2673 2674 2675
	return vmexit;
}

static int nested_svm_exit_handled(struct vcpu_svm *svm)
{
	int vmexit;

	vmexit = nested_svm_intercept(svm);

	if (vmexit == NESTED_EXIT_DONE)
2676 2677 2678
		nested_svm_vmexit(svm);

	return vmexit;
2679 2680
}

2681 2682 2683 2684 2685
static inline void copy_vmcb_control_area(struct vmcb *dst_vmcb, struct vmcb *from_vmcb)
{
	struct vmcb_control_area *dst  = &dst_vmcb->control;
	struct vmcb_control_area *from = &from_vmcb->control;

2686
	dst->intercept_cr         = from->intercept_cr;
2687
	dst->intercept_dr         = from->intercept_dr;
2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707
	dst->intercept_exceptions = from->intercept_exceptions;
	dst->intercept            = from->intercept;
	dst->iopm_base_pa         = from->iopm_base_pa;
	dst->msrpm_base_pa        = from->msrpm_base_pa;
	dst->tsc_offset           = from->tsc_offset;
	dst->asid                 = from->asid;
	dst->tlb_ctl              = from->tlb_ctl;
	dst->int_ctl              = from->int_ctl;
	dst->int_vector           = from->int_vector;
	dst->int_state            = from->int_state;
	dst->exit_code            = from->exit_code;
	dst->exit_code_hi         = from->exit_code_hi;
	dst->exit_info_1          = from->exit_info_1;
	dst->exit_info_2          = from->exit_info_2;
	dst->exit_int_info        = from->exit_int_info;
	dst->exit_int_info_err    = from->exit_int_info_err;
	dst->nested_ctl           = from->nested_ctl;
	dst->event_inj            = from->event_inj;
	dst->event_inj_err        = from->event_inj_err;
	dst->nested_cr3           = from->nested_cr3;
2708
	dst->virt_ext              = from->virt_ext;
2709 2710
}

2711
static int nested_svm_vmexit(struct vcpu_svm *svm)
2712
{
2713
	struct vmcb *nested_vmcb;
2714
	struct vmcb *hsave = svm->nested.hsave;
J
Joerg Roedel 已提交
2715
	struct vmcb *vmcb = svm->vmcb;
2716
	struct page *page;
2717

2718 2719 2720 2721
	trace_kvm_nested_vmexit_inject(vmcb->control.exit_code,
				       vmcb->control.exit_info_1,
				       vmcb->control.exit_info_2,
				       vmcb->control.exit_int_info,
2722 2723
				       vmcb->control.exit_int_info_err,
				       KVM_ISA_SVM);
2724

2725
	nested_vmcb = nested_svm_map(svm, svm->nested.vmcb, &page);
2726 2727 2728
	if (!nested_vmcb)
		return 1;

2729 2730
	/* Exit Guest-Mode */
	leave_guest_mode(&svm->vcpu);
2731 2732
	svm->nested.vmcb = 0;

2733
	/* Give the current vmcb to the guest */
J
Joerg Roedel 已提交
2734 2735 2736 2737 2738 2739 2740 2741
	disable_gif(svm);

	nested_vmcb->save.es     = vmcb->save.es;
	nested_vmcb->save.cs     = vmcb->save.cs;
	nested_vmcb->save.ss     = vmcb->save.ss;
	nested_vmcb->save.ds     = vmcb->save.ds;
	nested_vmcb->save.gdtr   = vmcb->save.gdtr;
	nested_vmcb->save.idtr   = vmcb->save.idtr;
2742
	nested_vmcb->save.efer   = svm->vcpu.arch.efer;
2743
	nested_vmcb->save.cr0    = kvm_read_cr0(&svm->vcpu);
2744
	nested_vmcb->save.cr3    = kvm_read_cr3(&svm->vcpu);
J
Joerg Roedel 已提交
2745
	nested_vmcb->save.cr2    = vmcb->save.cr2;
2746
	nested_vmcb->save.cr4    = svm->vcpu.arch.cr4;
2747
	nested_vmcb->save.rflags = kvm_get_rflags(&svm->vcpu);
J
Joerg Roedel 已提交
2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763
	nested_vmcb->save.rip    = vmcb->save.rip;
	nested_vmcb->save.rsp    = vmcb->save.rsp;
	nested_vmcb->save.rax    = vmcb->save.rax;
	nested_vmcb->save.dr7    = vmcb->save.dr7;
	nested_vmcb->save.dr6    = vmcb->save.dr6;
	nested_vmcb->save.cpl    = vmcb->save.cpl;

	nested_vmcb->control.int_ctl           = vmcb->control.int_ctl;
	nested_vmcb->control.int_vector        = vmcb->control.int_vector;
	nested_vmcb->control.int_state         = vmcb->control.int_state;
	nested_vmcb->control.exit_code         = vmcb->control.exit_code;
	nested_vmcb->control.exit_code_hi      = vmcb->control.exit_code_hi;
	nested_vmcb->control.exit_info_1       = vmcb->control.exit_info_1;
	nested_vmcb->control.exit_info_2       = vmcb->control.exit_info_2;
	nested_vmcb->control.exit_int_info     = vmcb->control.exit_int_info;
	nested_vmcb->control.exit_int_info_err = vmcb->control.exit_int_info_err;
2764 2765 2766

	if (svm->nrips_enabled)
		nested_vmcb->control.next_rip  = vmcb->control.next_rip;
2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 2782

	/*
	 * If we emulate a VMRUN/#VMEXIT in the same host #vmexit cycle we have
	 * to make sure that we do not lose injected events. So check event_inj
	 * here and copy it to exit_int_info if it is valid.
	 * Exit_int_info and event_inj can't be both valid because the case
	 * below only happens on a VMRUN instruction intercept which has
	 * no valid exit_int_info set.
	 */
	if (vmcb->control.event_inj & SVM_EVTINJ_VALID) {
		struct vmcb_control_area *nc = &nested_vmcb->control;

		nc->exit_int_info     = vmcb->control.event_inj;
		nc->exit_int_info_err = vmcb->control.event_inj_err;
	}

J
Joerg Roedel 已提交
2783 2784 2785
	nested_vmcb->control.tlb_ctl           = 0;
	nested_vmcb->control.event_inj         = 0;
	nested_vmcb->control.event_inj_err     = 0;
2786 2787 2788 2789 2790 2791

	/* We always set V_INTR_MASKING and remember the old value in hflags */
	if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
		nested_vmcb->control.int_ctl &= ~V_INTR_MASKING_MASK;

	/* Restore the original control entries */
2792
	copy_vmcb_control_area(vmcb, hsave);
2793

2794 2795
	kvm_clear_exception_queue(&svm->vcpu);
	kvm_clear_interrupt_queue(&svm->vcpu);
2796

2797 2798
	svm->nested.nested_cr3 = 0;

2799 2800 2801 2802 2803 2804 2805
	/* Restore selected save entries */
	svm->vmcb->save.es = hsave->save.es;
	svm->vmcb->save.cs = hsave->save.cs;
	svm->vmcb->save.ss = hsave->save.ss;
	svm->vmcb->save.ds = hsave->save.ds;
	svm->vmcb->save.gdtr = hsave->save.gdtr;
	svm->vmcb->save.idtr = hsave->save.idtr;
2806
	kvm_set_rflags(&svm->vcpu, hsave->save.rflags);
2807 2808 2809 2810 2811 2812 2813
	svm_set_efer(&svm->vcpu, hsave->save.efer);
	svm_set_cr0(&svm->vcpu, hsave->save.cr0 | X86_CR0_PE);
	svm_set_cr4(&svm->vcpu, hsave->save.cr4);
	if (npt_enabled) {
		svm->vmcb->save.cr3 = hsave->save.cr3;
		svm->vcpu.arch.cr3 = hsave->save.cr3;
	} else {
2814
		(void)kvm_set_cr3(&svm->vcpu, hsave->save.cr3);
2815 2816 2817 2818 2819 2820 2821 2822
	}
	kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, hsave->save.rax);
	kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, hsave->save.rsp);
	kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, hsave->save.rip);
	svm->vmcb->save.dr7 = 0;
	svm->vmcb->save.cpl = 0;
	svm->vmcb->control.exit_int_info = 0;

2823 2824
	mark_all_dirty(svm->vmcb);

2825
	nested_svm_unmap(page);
2826

2827
	nested_svm_uninit_mmu_context(&svm->vcpu);
2828 2829 2830 2831 2832
	kvm_mmu_reset_context(&svm->vcpu);
	kvm_mmu_load(&svm->vcpu);

	return 0;
}
A
Alexander Graf 已提交
2833

2834
static bool nested_svm_vmrun_msrpm(struct vcpu_svm *svm)
A
Alexander Graf 已提交
2835
{
2836 2837
	/*
	 * This function merges the msr permission bitmaps of kvm and the
G
Guo Chao 已提交
2838
	 * nested vmcb. It is optimized in that it only merges the parts where
2839 2840
	 * the kvm msr permission bitmap may contain zero bits
	 */
A
Alexander Graf 已提交
2841
	int i;
2842

2843 2844
	if (!(svm->nested.intercept & (1ULL << INTERCEPT_MSR_PROT)))
		return true;
2845

2846 2847 2848
	for (i = 0; i < MSRPM_OFFSETS; i++) {
		u32 value, p;
		u64 offset;
2849

2850 2851
		if (msrpm_offsets[i] == 0xffffffff)
			break;
A
Alexander Graf 已提交
2852

2853 2854
		p      = msrpm_offsets[i];
		offset = svm->nested.vmcb_msrpm + (p * 4);
2855

2856
		if (kvm_vcpu_read_guest(&svm->vcpu, offset, &value, 4))
2857 2858 2859 2860
			return false;

		svm->nested.msrpm[p] = svm->msrpm[p] | value;
	}
A
Alexander Graf 已提交
2861

2862
	svm->vmcb->control.msrpm_base_pa = __pa(svm->nested.msrpm);
2863 2864

	return true;
A
Alexander Graf 已提交
2865 2866
}

2867 2868 2869 2870 2871
static bool nested_vmcb_checks(struct vmcb *vmcb)
{
	if ((vmcb->control.intercept & (1ULL << INTERCEPT_VMRUN)) == 0)
		return false;

2872 2873 2874
	if (vmcb->control.asid == 0)
		return false;

2875 2876 2877
	if (vmcb->control.nested_ctl && !npt_enabled)
		return false;

2878 2879 2880
	return true;
}

2881
static bool nested_svm_vmrun(struct vcpu_svm *svm)
A
Alexander Graf 已提交
2882
{
2883
	struct vmcb *nested_vmcb;
2884
	struct vmcb *hsave = svm->nested.hsave;
J
Joerg Roedel 已提交
2885
	struct vmcb *vmcb = svm->vmcb;
2886
	struct page *page;
2887
	u64 vmcb_gpa;
A
Alexander Graf 已提交
2888

2889
	vmcb_gpa = svm->vmcb->save.rax;
A
Alexander Graf 已提交
2890

2891
	nested_vmcb = nested_svm_map(svm, svm->vmcb->save.rax, &page);
2892 2893 2894
	if (!nested_vmcb)
		return false;

2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905
	if (!nested_vmcb_checks(nested_vmcb)) {
		nested_vmcb->control.exit_code    = SVM_EXIT_ERR;
		nested_vmcb->control.exit_code_hi = 0;
		nested_vmcb->control.exit_info_1  = 0;
		nested_vmcb->control.exit_info_2  = 0;

		nested_svm_unmap(page);

		return false;
	}

2906
	trace_kvm_nested_vmrun(svm->vmcb->save.rip, vmcb_gpa,
2907 2908 2909 2910 2911
			       nested_vmcb->save.rip,
			       nested_vmcb->control.int_ctl,
			       nested_vmcb->control.event_inj,
			       nested_vmcb->control.nested_ctl);

2912 2913
	trace_kvm_nested_intercepts(nested_vmcb->control.intercept_cr & 0xffff,
				    nested_vmcb->control.intercept_cr >> 16,
2914 2915 2916
				    nested_vmcb->control.intercept_exceptions,
				    nested_vmcb->control.intercept);

A
Alexander Graf 已提交
2917
	/* Clear internal status */
2918 2919
	kvm_clear_exception_queue(&svm->vcpu);
	kvm_clear_interrupt_queue(&svm->vcpu);
A
Alexander Graf 已提交
2920

J
Joerg Roedel 已提交
2921 2922 2923 2924
	/*
	 * Save the old vmcb, so we don't need to pick what we save, but can
	 * restore everything when a VMEXIT occurs
	 */
J
Joerg Roedel 已提交
2925 2926 2927 2928 2929 2930
	hsave->save.es     = vmcb->save.es;
	hsave->save.cs     = vmcb->save.cs;
	hsave->save.ss     = vmcb->save.ss;
	hsave->save.ds     = vmcb->save.ds;
	hsave->save.gdtr   = vmcb->save.gdtr;
	hsave->save.idtr   = vmcb->save.idtr;
2931
	hsave->save.efer   = svm->vcpu.arch.efer;
2932
	hsave->save.cr0    = kvm_read_cr0(&svm->vcpu);
J
Joerg Roedel 已提交
2933
	hsave->save.cr4    = svm->vcpu.arch.cr4;
2934
	hsave->save.rflags = kvm_get_rflags(&svm->vcpu);
2935
	hsave->save.rip    = kvm_rip_read(&svm->vcpu);
J
Joerg Roedel 已提交
2936 2937 2938 2939 2940
	hsave->save.rsp    = vmcb->save.rsp;
	hsave->save.rax    = vmcb->save.rax;
	if (npt_enabled)
		hsave->save.cr3    = vmcb->save.cr3;
	else
2941
		hsave->save.cr3    = kvm_read_cr3(&svm->vcpu);
J
Joerg Roedel 已提交
2942

2943
	copy_vmcb_control_area(hsave, vmcb);
A
Alexander Graf 已提交
2944

2945
	if (kvm_get_rflags(&svm->vcpu) & X86_EFLAGS_IF)
A
Alexander Graf 已提交
2946 2947 2948 2949
		svm->vcpu.arch.hflags |= HF_HIF_MASK;
	else
		svm->vcpu.arch.hflags &= ~HF_HIF_MASK;

2950 2951 2952 2953 2954 2955
	if (nested_vmcb->control.nested_ctl) {
		kvm_mmu_unload(&svm->vcpu);
		svm->nested.nested_cr3 = nested_vmcb->control.nested_cr3;
		nested_svm_init_mmu_context(&svm->vcpu);
	}

A
Alexander Graf 已提交
2956 2957 2958 2959 2960 2961 2962
	/* Load the nested guest state */
	svm->vmcb->save.es = nested_vmcb->save.es;
	svm->vmcb->save.cs = nested_vmcb->save.cs;
	svm->vmcb->save.ss = nested_vmcb->save.ss;
	svm->vmcb->save.ds = nested_vmcb->save.ds;
	svm->vmcb->save.gdtr = nested_vmcb->save.gdtr;
	svm->vmcb->save.idtr = nested_vmcb->save.idtr;
2963
	kvm_set_rflags(&svm->vcpu, nested_vmcb->save.rflags);
A
Alexander Graf 已提交
2964 2965 2966 2967 2968 2969
	svm_set_efer(&svm->vcpu, nested_vmcb->save.efer);
	svm_set_cr0(&svm->vcpu, nested_vmcb->save.cr0);
	svm_set_cr4(&svm->vcpu, nested_vmcb->save.cr4);
	if (npt_enabled) {
		svm->vmcb->save.cr3 = nested_vmcb->save.cr3;
		svm->vcpu.arch.cr3 = nested_vmcb->save.cr3;
2970
	} else
2971
		(void)kvm_set_cr3(&svm->vcpu, nested_vmcb->save.cr3);
2972 2973 2974 2975

	/* Guest paging mode is active - reset mmu */
	kvm_mmu_reset_context(&svm->vcpu);

J
Joerg Roedel 已提交
2976
	svm->vmcb->save.cr2 = svm->vcpu.arch.cr2 = nested_vmcb->save.cr2;
A
Alexander Graf 已提交
2977 2978 2979
	kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, nested_vmcb->save.rax);
	kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, nested_vmcb->save.rsp);
	kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, nested_vmcb->save.rip);
J
Joerg Roedel 已提交
2980

A
Alexander Graf 已提交
2981 2982 2983 2984 2985 2986 2987 2988
	/* In case we don't even reach vcpu_run, the fields are not updated */
	svm->vmcb->save.rax = nested_vmcb->save.rax;
	svm->vmcb->save.rsp = nested_vmcb->save.rsp;
	svm->vmcb->save.rip = nested_vmcb->save.rip;
	svm->vmcb->save.dr7 = nested_vmcb->save.dr7;
	svm->vmcb->save.dr6 = nested_vmcb->save.dr6;
	svm->vmcb->save.cpl = nested_vmcb->save.cpl;

2989
	svm->nested.vmcb_msrpm = nested_vmcb->control.msrpm_base_pa & ~0x0fffULL;
2990
	svm->nested.vmcb_iopm  = nested_vmcb->control.iopm_base_pa  & ~0x0fffULL;
A
Alexander Graf 已提交
2991

J
Joerg Roedel 已提交
2992
	/* cache intercepts */
2993
	svm->nested.intercept_cr         = nested_vmcb->control.intercept_cr;
2994
	svm->nested.intercept_dr         = nested_vmcb->control.intercept_dr;
J
Joerg Roedel 已提交
2995 2996 2997
	svm->nested.intercept_exceptions = nested_vmcb->control.intercept_exceptions;
	svm->nested.intercept            = nested_vmcb->control.intercept;

2998
	svm_flush_tlb(&svm->vcpu);
A
Alexander Graf 已提交
2999 3000 3001 3002 3003 3004
	svm->vmcb->control.int_ctl = nested_vmcb->control.int_ctl | V_INTR_MASKING_MASK;
	if (nested_vmcb->control.int_ctl & V_INTR_MASKING_MASK)
		svm->vcpu.arch.hflags |= HF_VINTR_MASK;
	else
		svm->vcpu.arch.hflags &= ~HF_VINTR_MASK;

3005 3006
	if (svm->vcpu.arch.hflags & HF_VINTR_MASK) {
		/* We only want the cr8 intercept bits of the guest */
3007 3008
		clr_cr_intercept(svm, INTERCEPT_CR8_READ);
		clr_cr_intercept(svm, INTERCEPT_CR8_WRITE);
3009 3010
	}

3011
	/* We don't want to see VMMCALLs from a nested guest */
3012
	clr_intercept(svm, INTERCEPT_VMMCALL);
3013

3014
	svm->vmcb->control.virt_ext = nested_vmcb->control.virt_ext;
A
Alexander Graf 已提交
3015 3016 3017 3018 3019 3020
	svm->vmcb->control.int_vector = nested_vmcb->control.int_vector;
	svm->vmcb->control.int_state = nested_vmcb->control.int_state;
	svm->vmcb->control.tsc_offset += nested_vmcb->control.tsc_offset;
	svm->vmcb->control.event_inj = nested_vmcb->control.event_inj;
	svm->vmcb->control.event_inj_err = nested_vmcb->control.event_inj_err;

3021
	nested_svm_unmap(page);
3022

3023 3024 3025
	/* Enter Guest-Mode */
	enter_guest_mode(&svm->vcpu);

3026 3027 3028 3029 3030 3031
	/*
	 * Merge guest and host intercepts - must be called  with vcpu in
	 * guest-mode to take affect here
	 */
	recalc_intercepts(svm);

3032
	svm->nested.vmcb = vmcb_gpa;
3033

3034
	enable_gif(svm);
A
Alexander Graf 已提交
3035

3036 3037
	mark_all_dirty(svm->vmcb);

3038
	return true;
A
Alexander Graf 已提交
3039 3040
}

3041
static void nested_svm_vmloadsave(struct vmcb *from_vmcb, struct vmcb *to_vmcb)
3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056
{
	to_vmcb->save.fs = from_vmcb->save.fs;
	to_vmcb->save.gs = from_vmcb->save.gs;
	to_vmcb->save.tr = from_vmcb->save.tr;
	to_vmcb->save.ldtr = from_vmcb->save.ldtr;
	to_vmcb->save.kernel_gs_base = from_vmcb->save.kernel_gs_base;
	to_vmcb->save.star = from_vmcb->save.star;
	to_vmcb->save.lstar = from_vmcb->save.lstar;
	to_vmcb->save.cstar = from_vmcb->save.cstar;
	to_vmcb->save.sfmask = from_vmcb->save.sfmask;
	to_vmcb->save.sysenter_cs = from_vmcb->save.sysenter_cs;
	to_vmcb->save.sysenter_esp = from_vmcb->save.sysenter_esp;
	to_vmcb->save.sysenter_eip = from_vmcb->save.sysenter_eip;
}

A
Avi Kivity 已提交
3057
static int vmload_interception(struct vcpu_svm *svm)
3058
{
3059
	struct vmcb *nested_vmcb;
3060
	struct page *page;
3061
	int ret;
3062

3063 3064 3065
	if (nested_svm_check_permissions(svm))
		return 1;

3066
	nested_vmcb = nested_svm_map(svm, svm->vmcb->save.rax, &page);
3067 3068 3069
	if (!nested_vmcb)
		return 1;

3070
	svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
3071
	ret = kvm_skip_emulated_instruction(&svm->vcpu);
3072

3073
	nested_svm_vmloadsave(nested_vmcb, svm->vmcb);
3074
	nested_svm_unmap(page);
3075

3076
	return ret;
3077 3078
}

A
Avi Kivity 已提交
3079
static int vmsave_interception(struct vcpu_svm *svm)
3080
{
3081
	struct vmcb *nested_vmcb;
3082
	struct page *page;
3083
	int ret;
3084

3085 3086 3087
	if (nested_svm_check_permissions(svm))
		return 1;

3088
	nested_vmcb = nested_svm_map(svm, svm->vmcb->save.rax, &page);
3089 3090 3091
	if (!nested_vmcb)
		return 1;

3092
	svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
3093
	ret = kvm_skip_emulated_instruction(&svm->vcpu);
3094

3095
	nested_svm_vmloadsave(svm->vmcb, nested_vmcb);
3096
	nested_svm_unmap(page);
3097

3098
	return ret;
3099 3100
}

A
Avi Kivity 已提交
3101
static int vmrun_interception(struct vcpu_svm *svm)
A
Alexander Graf 已提交
3102 3103 3104 3105
{
	if (nested_svm_check_permissions(svm))
		return 1;

3106 3107
	/* Save rip after vmrun instruction */
	kvm_rip_write(&svm->vcpu, kvm_rip_read(&svm->vcpu) + 3);
A
Alexander Graf 已提交
3108

3109
	if (!nested_svm_vmrun(svm))
A
Alexander Graf 已提交
3110 3111
		return 1;

3112
	if (!nested_svm_vmrun_msrpm(svm))
3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124
		goto failed;

	return 1;

failed:

	svm->vmcb->control.exit_code    = SVM_EXIT_ERR;
	svm->vmcb->control.exit_code_hi = 0;
	svm->vmcb->control.exit_info_1  = 0;
	svm->vmcb->control.exit_info_2  = 0;

	nested_svm_vmexit(svm);
A
Alexander Graf 已提交
3125 3126 3127 3128

	return 1;
}

A
Avi Kivity 已提交
3129
static int stgi_interception(struct vcpu_svm *svm)
3130
{
3131 3132
	int ret;

3133 3134 3135 3136
	if (nested_svm_check_permissions(svm))
		return 1;

	svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
3137
	ret = kvm_skip_emulated_instruction(&svm->vcpu);
3138
	kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
3139

3140
	enable_gif(svm);
3141

3142
	return ret;
3143 3144
}

A
Avi Kivity 已提交
3145
static int clgi_interception(struct vcpu_svm *svm)
3146
{
3147 3148
	int ret;

3149 3150 3151 3152
	if (nested_svm_check_permissions(svm))
		return 1;

	svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
3153
	ret = kvm_skip_emulated_instruction(&svm->vcpu);
3154

3155
	disable_gif(svm);
3156 3157

	/* After a CLGI no interrupts should come */
3158 3159 3160 3161 3162
	if (!kvm_vcpu_apicv_active(&svm->vcpu)) {
		svm_clear_vintr(svm);
		svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
		mark_dirty(svm->vmcb, VMCB_INTR);
	}
3163

3164
	return ret;
3165 3166
}

A
Avi Kivity 已提交
3167
static int invlpga_interception(struct vcpu_svm *svm)
A
Alexander Graf 已提交
3168 3169 3170
{
	struct kvm_vcpu *vcpu = &svm->vcpu;

3171 3172
	trace_kvm_invlpga(svm->vmcb->save.rip, kvm_register_read(&svm->vcpu, VCPU_REGS_RCX),
			  kvm_register_read(&svm->vcpu, VCPU_REGS_RAX));
3173

A
Alexander Graf 已提交
3174
	/* Let's treat INVLPGA the same as INVLPG (can be optimized!) */
3175
	kvm_mmu_invlpg(vcpu, kvm_register_read(&svm->vcpu, VCPU_REGS_RAX));
A
Alexander Graf 已提交
3176 3177

	svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
3178
	return kvm_skip_emulated_instruction(&svm->vcpu);
A
Alexander Graf 已提交
3179 3180
}

3181 3182
static int skinit_interception(struct vcpu_svm *svm)
{
3183
	trace_kvm_skinit(svm->vmcb->save.rip, kvm_register_read(&svm->vcpu, VCPU_REGS_RAX));
3184 3185 3186 3187 3188

	kvm_queue_exception(&svm->vcpu, UD_VECTOR);
	return 1;
}

D
David Kaplan 已提交
3189 3190
static int wbinvd_interception(struct vcpu_svm *svm)
{
3191
	return kvm_emulate_wbinvd(&svm->vcpu);
D
David Kaplan 已提交
3192 3193
}

J
Joerg Roedel 已提交
3194 3195 3196 3197 3198 3199 3200
static int xsetbv_interception(struct vcpu_svm *svm)
{
	u64 new_bv = kvm_read_edx_eax(&svm->vcpu);
	u32 index = kvm_register_read(&svm->vcpu, VCPU_REGS_RCX);

	if (kvm_set_xcr(&svm->vcpu, index, new_bv) == 0) {
		svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
3201
		return kvm_skip_emulated_instruction(&svm->vcpu);
J
Joerg Roedel 已提交
3202 3203 3204 3205 3206
	}

	return 1;
}

A
Avi Kivity 已提交
3207
static int task_switch_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
3208
{
3209
	u16 tss_selector;
3210 3211 3212
	int reason;
	int int_type = svm->vmcb->control.exit_int_info &
		SVM_EXITINTINFO_TYPE_MASK;
3213
	int int_vec = svm->vmcb->control.exit_int_info & SVM_EVTINJ_VEC_MASK;
3214 3215 3216 3217
	uint32_t type =
		svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_TYPE_MASK;
	uint32_t idt_v =
		svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_VALID;
3218 3219
	bool has_error_code = false;
	u32 error_code = 0;
3220 3221

	tss_selector = (u16)svm->vmcb->control.exit_info_1;
3222

3223 3224
	if (svm->vmcb->control.exit_info_2 &
	    (1ULL << SVM_EXITINFOSHIFT_TS_REASON_IRET))
3225 3226 3227 3228
		reason = TASK_SWITCH_IRET;
	else if (svm->vmcb->control.exit_info_2 &
		 (1ULL << SVM_EXITINFOSHIFT_TS_REASON_JMP))
		reason = TASK_SWITCH_JMP;
3229
	else if (idt_v)
3230 3231 3232 3233
		reason = TASK_SWITCH_GATE;
	else
		reason = TASK_SWITCH_CALL;

3234 3235 3236 3237 3238 3239
	if (reason == TASK_SWITCH_GATE) {
		switch (type) {
		case SVM_EXITINTINFO_TYPE_NMI:
			svm->vcpu.arch.nmi_injected = false;
			break;
		case SVM_EXITINTINFO_TYPE_EXEPT:
3240 3241 3242 3243 3244 3245
			if (svm->vmcb->control.exit_info_2 &
			    (1ULL << SVM_EXITINFOSHIFT_TS_HAS_ERROR_CODE)) {
				has_error_code = true;
				error_code =
					(u32)svm->vmcb->control.exit_info_2;
			}
3246 3247 3248 3249 3250 3251 3252 3253 3254
			kvm_clear_exception_queue(&svm->vcpu);
			break;
		case SVM_EXITINTINFO_TYPE_INTR:
			kvm_clear_interrupt_queue(&svm->vcpu);
			break;
		default:
			break;
		}
	}
3255

3256 3257 3258
	if (reason != TASK_SWITCH_GATE ||
	    int_type == SVM_EXITINTINFO_TYPE_SOFT ||
	    (int_type == SVM_EXITINTINFO_TYPE_EXEPT &&
3259 3260
	     (int_vec == OF_VECTOR || int_vec == BP_VECTOR)))
		skip_emulated_instruction(&svm->vcpu);
3261

3262 3263 3264 3265
	if (int_type != SVM_EXITINTINFO_TYPE_SOFT)
		int_vec = -1;

	if (kvm_task_switch(&svm->vcpu, tss_selector, int_vec, reason,
3266 3267 3268 3269 3270 3271 3272
				has_error_code, error_code) == EMULATE_FAIL) {
		svm->vcpu.run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
		svm->vcpu.run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
		svm->vcpu.run->internal.ndata = 0;
		return 0;
	}
	return 1;
A
Avi Kivity 已提交
3273 3274
}

A
Avi Kivity 已提交
3275
static int cpuid_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
3276
{
3277
	svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
3278
	return kvm_emulate_cpuid(&svm->vcpu);
A
Avi Kivity 已提交
3279 3280
}

A
Avi Kivity 已提交
3281
static int iret_interception(struct vcpu_svm *svm)
3282 3283
{
	++svm->vcpu.stat.nmi_window_exits;
3284
	clr_intercept(svm, INTERCEPT_IRET);
3285
	svm->vcpu.arch.hflags |= HF_IRET_MASK;
3286
	svm->nmi_iret_rip = kvm_rip_read(&svm->vcpu);
3287
	kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
3288 3289 3290
	return 1;
}

A
Avi Kivity 已提交
3291
static int invlpg_interception(struct vcpu_svm *svm)
M
Marcelo Tosatti 已提交
3292
{
3293 3294 3295 3296
	if (!static_cpu_has(X86_FEATURE_DECODEASSISTS))
		return emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE;

	kvm_mmu_invlpg(&svm->vcpu, svm->vmcb->control.exit_info_1);
3297
	return kvm_skip_emulated_instruction(&svm->vcpu);
M
Marcelo Tosatti 已提交
3298 3299
}

A
Avi Kivity 已提交
3300
static int emulate_on_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
3301
{
3302
	return emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE;
A
Avi Kivity 已提交
3303 3304
}

A
Avi Kivity 已提交
3305 3306 3307 3308 3309 3310 3311 3312
static int rdpmc_interception(struct vcpu_svm *svm)
{
	int err;

	if (!static_cpu_has(X86_FEATURE_NRIPS))
		return emulate_on_interception(svm);

	err = kvm_rdpmc(&svm->vcpu);
3313
	return kvm_complete_insn_gp(&svm->vcpu, err);
A
Avi Kivity 已提交
3314 3315
}

3316 3317
static bool check_selective_cr0_intercepted(struct vcpu_svm *svm,
					    unsigned long val)
3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339
{
	unsigned long cr0 = svm->vcpu.arch.cr0;
	bool ret = false;
	u64 intercept;

	intercept = svm->nested.intercept;

	if (!is_guest_mode(&svm->vcpu) ||
	    (!(intercept & (1ULL << INTERCEPT_SELECTIVE_CR0))))
		return false;

	cr0 &= ~SVM_CR0_SELECTIVE_MASK;
	val &= ~SVM_CR0_SELECTIVE_MASK;

	if (cr0 ^ val) {
		svm->vmcb->control.exit_code = SVM_EXIT_CR0_SEL_WRITE;
		ret = (nested_svm_exit_handled(svm) == NESTED_EXIT_DONE);
	}

	return ret;
}

3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354
#define CR_VALID (1ULL << 63)

static int cr_interception(struct vcpu_svm *svm)
{
	int reg, cr;
	unsigned long val;
	int err;

	if (!static_cpu_has(X86_FEATURE_DECODEASSISTS))
		return emulate_on_interception(svm);

	if (unlikely((svm->vmcb->control.exit_info_1 & CR_VALID) == 0))
		return emulate_on_interception(svm);

	reg = svm->vmcb->control.exit_info_1 & SVM_EXITINFO_REG_MASK;
3355 3356 3357 3358
	if (svm->vmcb->control.exit_code == SVM_EXIT_CR0_SEL_WRITE)
		cr = SVM_EXIT_WRITE_CR0 - SVM_EXIT_READ_CR0;
	else
		cr = svm->vmcb->control.exit_code - SVM_EXIT_READ_CR0;
3359 3360 3361 3362 3363 3364 3365

	err = 0;
	if (cr >= 16) { /* mov to cr */
		cr -= 16;
		val = kvm_register_read(&svm->vcpu, reg);
		switch (cr) {
		case 0:
3366 3367
			if (!check_selective_cr0_intercepted(svm, val))
				err = kvm_set_cr0(&svm->vcpu, val);
3368 3369 3370
			else
				return 1;

3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392 3393 3394
			break;
		case 3:
			err = kvm_set_cr3(&svm->vcpu, val);
			break;
		case 4:
			err = kvm_set_cr4(&svm->vcpu, val);
			break;
		case 8:
			err = kvm_set_cr8(&svm->vcpu, val);
			break;
		default:
			WARN(1, "unhandled write to CR%d", cr);
			kvm_queue_exception(&svm->vcpu, UD_VECTOR);
			return 1;
		}
	} else { /* mov from cr */
		switch (cr) {
		case 0:
			val = kvm_read_cr0(&svm->vcpu);
			break;
		case 2:
			val = svm->vcpu.arch.cr2;
			break;
		case 3:
3395
			val = kvm_read_cr3(&svm->vcpu);
3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409
			break;
		case 4:
			val = kvm_read_cr4(&svm->vcpu);
			break;
		case 8:
			val = kvm_get_cr8(&svm->vcpu);
			break;
		default:
			WARN(1, "unhandled read from CR%d", cr);
			kvm_queue_exception(&svm->vcpu, UD_VECTOR);
			return 1;
		}
		kvm_register_write(&svm->vcpu, reg, val);
	}
3410
	return kvm_complete_insn_gp(&svm->vcpu, err);
3411 3412
}

3413 3414 3415 3416 3417
static int dr_interception(struct vcpu_svm *svm)
{
	int reg, dr;
	unsigned long val;

3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428
	if (svm->vcpu.guest_debug == 0) {
		/*
		 * No more DR vmexits; force a reload of the debug registers
		 * and reenter on this instruction.  The next vmexit will
		 * retrieve the full state of the debug registers.
		 */
		clr_dr_intercepts(svm);
		svm->vcpu.arch.switch_db_regs |= KVM_DEBUGREG_WONT_EXIT;
		return 1;
	}

3429 3430 3431 3432 3433 3434 3435
	if (!boot_cpu_has(X86_FEATURE_DECODEASSISTS))
		return emulate_on_interception(svm);

	reg = svm->vmcb->control.exit_info_1 & SVM_EXITINFO_REG_MASK;
	dr = svm->vmcb->control.exit_code - SVM_EXIT_READ_DR0;

	if (dr >= 16) { /* mov to DRn */
3436 3437
		if (!kvm_require_dr(&svm->vcpu, dr - 16))
			return 1;
3438 3439 3440
		val = kvm_register_read(&svm->vcpu, reg);
		kvm_set_dr(&svm->vcpu, dr - 16, val);
	} else {
3441 3442 3443 3444
		if (!kvm_require_dr(&svm->vcpu, dr))
			return 1;
		kvm_get_dr(&svm->vcpu, dr, &val);
		kvm_register_write(&svm->vcpu, reg, val);
3445 3446
	}

3447
	return kvm_skip_emulated_instruction(&svm->vcpu);
3448 3449
}

A
Avi Kivity 已提交
3450
static int cr8_write_interception(struct vcpu_svm *svm)
3451
{
A
Avi Kivity 已提交
3452
	struct kvm_run *kvm_run = svm->vcpu.run;
A
Andre Przywara 已提交
3453
	int r;
A
Avi Kivity 已提交
3454

3455 3456
	u8 cr8_prev = kvm_get_cr8(&svm->vcpu);
	/* instruction emulation calls kvm_set_cr8() */
3457
	r = cr_interception(svm);
3458
	if (lapic_in_kernel(&svm->vcpu))
3459
		return r;
3460
	if (cr8_prev <= kvm_get_cr8(&svm->vcpu))
3461
		return r;
3462 3463 3464 3465
	kvm_run->exit_reason = KVM_EXIT_SET_TPR;
	return 0;
}

3466
static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
A
Avi Kivity 已提交
3467
{
3468 3469
	struct vcpu_svm *svm = to_svm(vcpu);

3470
	switch (msr_info->index) {
3471
	case MSR_IA32_TSC: {
3472
		msr_info->data = svm->vmcb->control.tsc_offset +
3473
			kvm_scale_tsc(vcpu, rdtsc());
3474

A
Avi Kivity 已提交
3475 3476
		break;
	}
B
Brian Gerst 已提交
3477
	case MSR_STAR:
3478
		msr_info->data = svm->vmcb->save.star;
A
Avi Kivity 已提交
3479
		break;
3480
#ifdef CONFIG_X86_64
A
Avi Kivity 已提交
3481
	case MSR_LSTAR:
3482
		msr_info->data = svm->vmcb->save.lstar;
A
Avi Kivity 已提交
3483 3484
		break;
	case MSR_CSTAR:
3485
		msr_info->data = svm->vmcb->save.cstar;
A
Avi Kivity 已提交
3486 3487
		break;
	case MSR_KERNEL_GS_BASE:
3488
		msr_info->data = svm->vmcb->save.kernel_gs_base;
A
Avi Kivity 已提交
3489 3490
		break;
	case MSR_SYSCALL_MASK:
3491
		msr_info->data = svm->vmcb->save.sfmask;
A
Avi Kivity 已提交
3492 3493 3494
		break;
#endif
	case MSR_IA32_SYSENTER_CS:
3495
		msr_info->data = svm->vmcb->save.sysenter_cs;
A
Avi Kivity 已提交
3496 3497
		break;
	case MSR_IA32_SYSENTER_EIP:
3498
		msr_info->data = svm->sysenter_eip;
A
Avi Kivity 已提交
3499 3500
		break;
	case MSR_IA32_SYSENTER_ESP:
3501
		msr_info->data = svm->sysenter_esp;
A
Avi Kivity 已提交
3502
		break;
P
Paolo Bonzini 已提交
3503 3504 3505 3506 3507
	case MSR_TSC_AUX:
		if (!boot_cpu_has(X86_FEATURE_RDTSCP))
			return 1;
		msr_info->data = svm->tsc_aux;
		break;
J
Joerg Roedel 已提交
3508 3509 3510 3511 3512
	/*
	 * Nobody will change the following 5 values in the VMCB so we can
	 * safely return them on rdmsr. They will always be 0 until LBRV is
	 * implemented.
	 */
3513
	case MSR_IA32_DEBUGCTLMSR:
3514
		msr_info->data = svm->vmcb->save.dbgctl;
3515 3516
		break;
	case MSR_IA32_LASTBRANCHFROMIP:
3517
		msr_info->data = svm->vmcb->save.br_from;
3518 3519
		break;
	case MSR_IA32_LASTBRANCHTOIP:
3520
		msr_info->data = svm->vmcb->save.br_to;
3521 3522
		break;
	case MSR_IA32_LASTINTFROMIP:
3523
		msr_info->data = svm->vmcb->save.last_excp_from;
3524 3525
		break;
	case MSR_IA32_LASTINTTOIP:
3526
		msr_info->data = svm->vmcb->save.last_excp_to;
3527
		break;
A
Alexander Graf 已提交
3528
	case MSR_VM_HSAVE_PA:
3529
		msr_info->data = svm->nested.hsave_msr;
A
Alexander Graf 已提交
3530
		break;
3531
	case MSR_VM_CR:
3532
		msr_info->data = svm->nested.vm_cr_msr;
3533
		break;
3534
	case MSR_IA32_UCODE_REV:
3535
		msr_info->data = 0x01000065;
3536
		break;
3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553
	case MSR_F15H_IC_CFG: {

		int family, model;

		family = guest_cpuid_family(vcpu);
		model  = guest_cpuid_model(vcpu);

		if (family < 0 || model < 0)
			return kvm_get_msr_common(vcpu, msr_info);

		msr_info->data = 0;

		if (family == 0x15 &&
		    (model >= 0x2 && model < 0x20))
			msr_info->data = 0x1E;
		}
		break;
A
Avi Kivity 已提交
3554
	default:
3555
		return kvm_get_msr_common(vcpu, msr_info);
A
Avi Kivity 已提交
3556 3557 3558 3559
	}
	return 0;
}

A
Avi Kivity 已提交
3560
static int rdmsr_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
3561
{
3562
	u32 ecx = kvm_register_read(&svm->vcpu, VCPU_REGS_RCX);
3563
	struct msr_data msr_info;
A
Avi Kivity 已提交
3564

3565 3566 3567
	msr_info.index = ecx;
	msr_info.host_initiated = false;
	if (svm_get_msr(&svm->vcpu, &msr_info)) {
3568
		trace_kvm_msr_read_ex(ecx);
3569
		kvm_inject_gp(&svm->vcpu, 0);
3570
		return 1;
3571
	} else {
3572
		trace_kvm_msr_read(ecx, msr_info.data);
3573

3574 3575 3576 3577
		kvm_register_write(&svm->vcpu, VCPU_REGS_RAX,
				   msr_info.data & 0xffffffff);
		kvm_register_write(&svm->vcpu, VCPU_REGS_RDX,
				   msr_info.data >> 32);
3578
		svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
3579
		return kvm_skip_emulated_instruction(&svm->vcpu);
A
Avi Kivity 已提交
3580 3581 3582
	}
}

3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607
static int svm_set_vm_cr(struct kvm_vcpu *vcpu, u64 data)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	int svm_dis, chg_mask;

	if (data & ~SVM_VM_CR_VALID_MASK)
		return 1;

	chg_mask = SVM_VM_CR_VALID_MASK;

	if (svm->nested.vm_cr_msr & SVM_VM_CR_SVM_DIS_MASK)
		chg_mask &= ~(SVM_VM_CR_SVM_LOCK_MASK | SVM_VM_CR_SVM_DIS_MASK);

	svm->nested.vm_cr_msr &= ~chg_mask;
	svm->nested.vm_cr_msr |= (data & chg_mask);

	svm_dis = svm->nested.vm_cr_msr & SVM_VM_CR_SVM_DIS_MASK;

	/* check for svm_disable while efer.svme is set */
	if (svm_dis && (vcpu->arch.efer & EFER_SVME))
		return 1;

	return 0;
}

3608
static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
A
Avi Kivity 已提交
3609
{
3610 3611
	struct vcpu_svm *svm = to_svm(vcpu);

3612 3613
	u32 ecx = msr->index;
	u64 data = msr->data;
A
Avi Kivity 已提交
3614
	switch (ecx) {
3615
	case MSR_IA32_TSC:
3616
		kvm_write_tsc(vcpu, msr);
A
Avi Kivity 已提交
3617
		break;
B
Brian Gerst 已提交
3618
	case MSR_STAR:
3619
		svm->vmcb->save.star = data;
A
Avi Kivity 已提交
3620
		break;
3621
#ifdef CONFIG_X86_64
A
Avi Kivity 已提交
3622
	case MSR_LSTAR:
3623
		svm->vmcb->save.lstar = data;
A
Avi Kivity 已提交
3624 3625
		break;
	case MSR_CSTAR:
3626
		svm->vmcb->save.cstar = data;
A
Avi Kivity 已提交
3627 3628
		break;
	case MSR_KERNEL_GS_BASE:
3629
		svm->vmcb->save.kernel_gs_base = data;
A
Avi Kivity 已提交
3630 3631
		break;
	case MSR_SYSCALL_MASK:
3632
		svm->vmcb->save.sfmask = data;
A
Avi Kivity 已提交
3633 3634 3635
		break;
#endif
	case MSR_IA32_SYSENTER_CS:
3636
		svm->vmcb->save.sysenter_cs = data;
A
Avi Kivity 已提交
3637 3638
		break;
	case MSR_IA32_SYSENTER_EIP:
3639
		svm->sysenter_eip = data;
3640
		svm->vmcb->save.sysenter_eip = data;
A
Avi Kivity 已提交
3641 3642
		break;
	case MSR_IA32_SYSENTER_ESP:
3643
		svm->sysenter_esp = data;
3644
		svm->vmcb->save.sysenter_esp = data;
A
Avi Kivity 已提交
3645
		break;
P
Paolo Bonzini 已提交
3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657
	case MSR_TSC_AUX:
		if (!boot_cpu_has(X86_FEATURE_RDTSCP))
			return 1;

		/*
		 * This is rare, so we update the MSR here instead of using
		 * direct_access_msrs.  Doing that would require a rdmsr in
		 * svm_vcpu_put.
		 */
		svm->tsc_aux = data;
		wrmsrl(MSR_TSC_AUX, svm->tsc_aux);
		break;
3658
	case MSR_IA32_DEBUGCTLMSR:
3659
		if (!boot_cpu_has(X86_FEATURE_LBRV)) {
3660 3661
			vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTL 0x%llx, nop\n",
				    __func__, data);
3662 3663 3664 3665 3666 3667
			break;
		}
		if (data & DEBUGCTL_RESERVED_BITS)
			return 1;

		svm->vmcb->save.dbgctl = data;
3668
		mark_dirty(svm->vmcb, VMCB_LBR);
3669 3670 3671 3672
		if (data & (1ULL<<0))
			svm_enable_lbrv(svm);
		else
			svm_disable_lbrv(svm);
3673
		break;
A
Alexander Graf 已提交
3674
	case MSR_VM_HSAVE_PA:
3675
		svm->nested.hsave_msr = data;
3676
		break;
3677
	case MSR_VM_CR:
3678
		return svm_set_vm_cr(vcpu, data);
3679
	case MSR_VM_IGNNE:
3680
		vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data);
3681
		break;
3682 3683 3684 3685
	case MSR_IA32_APICBASE:
		if (kvm_vcpu_apicv_active(vcpu))
			avic_update_vapic_bar(to_svm(vcpu), data);
		/* Follow through */
A
Avi Kivity 已提交
3686
	default:
3687
		return kvm_set_msr_common(vcpu, msr);
A
Avi Kivity 已提交
3688 3689 3690 3691
	}
	return 0;
}

A
Avi Kivity 已提交
3692
static int wrmsr_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
3693
{
3694
	struct msr_data msr;
3695 3696
	u32 ecx = kvm_register_read(&svm->vcpu, VCPU_REGS_RCX);
	u64 data = kvm_read_edx_eax(&svm->vcpu);
3697

3698 3699 3700
	msr.data = data;
	msr.index = ecx;
	msr.host_initiated = false;
3701

3702
	svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
3703
	if (kvm_set_msr(&svm->vcpu, &msr)) {
3704
		trace_kvm_msr_write_ex(ecx, data);
3705
		kvm_inject_gp(&svm->vcpu, 0);
3706
		return 1;
3707 3708
	} else {
		trace_kvm_msr_write(ecx, data);
3709
		return kvm_skip_emulated_instruction(&svm->vcpu);
3710
	}
A
Avi Kivity 已提交
3711 3712
}

A
Avi Kivity 已提交
3713
static int msr_interception(struct vcpu_svm *svm)
A
Avi Kivity 已提交
3714
{
R
Rusty Russell 已提交
3715
	if (svm->vmcb->control.exit_info_1)
A
Avi Kivity 已提交
3716
		return wrmsr_interception(svm);
A
Avi Kivity 已提交
3717
	else
A
Avi Kivity 已提交
3718
		return rdmsr_interception(svm);
A
Avi Kivity 已提交
3719 3720
}

A
Avi Kivity 已提交
3721
static int interrupt_window_interception(struct vcpu_svm *svm)
3722
{
3723
	kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
3724
	svm_clear_vintr(svm);
3725
	svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
3726
	mark_dirty(svm->vmcb, VMCB_INTR);
3727
	++svm->vcpu.stat.irq_window_exits;
3728 3729 3730
	return 1;
}

3731 3732
static int pause_interception(struct vcpu_svm *svm)
{
3733 3734 3735 3736
	struct kvm_vcpu *vcpu = &svm->vcpu;
	bool in_kernel = (svm_get_cpl(vcpu) == 0);

	kvm_vcpu_on_spin(vcpu, in_kernel);
3737 3738 3739
	return 1;
}

3740 3741
static int nop_interception(struct vcpu_svm *svm)
{
3742
	return kvm_skip_emulated_instruction(&(svm->vcpu));
3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756
}

static int monitor_interception(struct vcpu_svm *svm)
{
	printk_once(KERN_WARNING "kvm: MONITOR instruction emulated as NOP!\n");
	return nop_interception(svm);
}

static int mwait_interception(struct vcpu_svm *svm)
{
	printk_once(KERN_WARNING "kvm: MWAIT instruction emulated as NOP!\n");
	return nop_interception(svm);
}

3757 3758 3759 3760 3761 3762 3763 3764 3765 3766 3767 3768
enum avic_ipi_failure_cause {
	AVIC_IPI_FAILURE_INVALID_INT_TYPE,
	AVIC_IPI_FAILURE_TARGET_NOT_RUNNING,
	AVIC_IPI_FAILURE_INVALID_TARGET,
	AVIC_IPI_FAILURE_INVALID_BACKING_PAGE,
};

static int avic_incomplete_ipi_interception(struct vcpu_svm *svm)
{
	u32 icrh = svm->vmcb->control.exit_info_1 >> 32;
	u32 icrl = svm->vmcb->control.exit_info_1;
	u32 id = svm->vmcb->control.exit_info_2 >> 32;
D
Dan Carpenter 已提交
3769
	u32 index = svm->vmcb->control.exit_info_2 & 0xFF;
3770 3771 3772 3773 3774 3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 3895 3896 3897 3898 3899 3900 3901 3902 3903 3904 3905 3906 3907 3908 3909 3910 3911 3912 3913 3914 3915 3916 3917 3918 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028
	struct kvm_lapic *apic = svm->vcpu.arch.apic;

	trace_kvm_avic_incomplete_ipi(svm->vcpu.vcpu_id, icrh, icrl, id, index);

	switch (id) {
	case AVIC_IPI_FAILURE_INVALID_INT_TYPE:
		/*
		 * AVIC hardware handles the generation of
		 * IPIs when the specified Message Type is Fixed
		 * (also known as fixed delivery mode) and
		 * the Trigger Mode is edge-triggered. The hardware
		 * also supports self and broadcast delivery modes
		 * specified via the Destination Shorthand(DSH)
		 * field of the ICRL. Logical and physical APIC ID
		 * formats are supported. All other IPI types cause
		 * a #VMEXIT, which needs to emulated.
		 */
		kvm_lapic_reg_write(apic, APIC_ICR2, icrh);
		kvm_lapic_reg_write(apic, APIC_ICR, icrl);
		break;
	case AVIC_IPI_FAILURE_TARGET_NOT_RUNNING: {
		int i;
		struct kvm_vcpu *vcpu;
		struct kvm *kvm = svm->vcpu.kvm;
		struct kvm_lapic *apic = svm->vcpu.arch.apic;

		/*
		 * At this point, we expect that the AVIC HW has already
		 * set the appropriate IRR bits on the valid target
		 * vcpus. So, we just need to kick the appropriate vcpu.
		 */
		kvm_for_each_vcpu(i, vcpu, kvm) {
			bool m = kvm_apic_match_dest(vcpu, apic,
						     icrl & KVM_APIC_SHORT_MASK,
						     GET_APIC_DEST_FIELD(icrh),
						     icrl & KVM_APIC_DEST_MASK);

			if (m && !avic_vcpu_is_running(vcpu))
				kvm_vcpu_wake_up(vcpu);
		}
		break;
	}
	case AVIC_IPI_FAILURE_INVALID_TARGET:
		break;
	case AVIC_IPI_FAILURE_INVALID_BACKING_PAGE:
		WARN_ONCE(1, "Invalid backing page\n");
		break;
	default:
		pr_err("Unknown IPI interception\n");
	}

	return 1;
}

static u32 *avic_get_logical_id_entry(struct kvm_vcpu *vcpu, u32 ldr, bool flat)
{
	struct kvm_arch *vm_data = &vcpu->kvm->arch;
	int index;
	u32 *logical_apic_id_table;
	int dlid = GET_APIC_LOGICAL_ID(ldr);

	if (!dlid)
		return NULL;

	if (flat) { /* flat */
		index = ffs(dlid) - 1;
		if (index > 7)
			return NULL;
	} else { /* cluster */
		int cluster = (dlid & 0xf0) >> 4;
		int apic = ffs(dlid & 0x0f) - 1;

		if ((apic < 0) || (apic > 7) ||
		    (cluster >= 0xf))
			return NULL;
		index = (cluster << 2) + apic;
	}

	logical_apic_id_table = (u32 *) page_address(vm_data->avic_logical_id_table_page);

	return &logical_apic_id_table[index];
}

static int avic_ldr_write(struct kvm_vcpu *vcpu, u8 g_physical_id, u32 ldr,
			  bool valid)
{
	bool flat;
	u32 *entry, new_entry;

	flat = kvm_lapic_get_reg(vcpu->arch.apic, APIC_DFR) == APIC_DFR_FLAT;
	entry = avic_get_logical_id_entry(vcpu, ldr, flat);
	if (!entry)
		return -EINVAL;

	new_entry = READ_ONCE(*entry);
	new_entry &= ~AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK;
	new_entry |= (g_physical_id & AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK);
	if (valid)
		new_entry |= AVIC_LOGICAL_ID_ENTRY_VALID_MASK;
	else
		new_entry &= ~AVIC_LOGICAL_ID_ENTRY_VALID_MASK;
	WRITE_ONCE(*entry, new_entry);

	return 0;
}

static int avic_handle_ldr_update(struct kvm_vcpu *vcpu)
{
	int ret;
	struct vcpu_svm *svm = to_svm(vcpu);
	u32 ldr = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LDR);

	if (!ldr)
		return 1;

	ret = avic_ldr_write(vcpu, vcpu->vcpu_id, ldr, true);
	if (ret && svm->ldr_reg) {
		avic_ldr_write(vcpu, 0, svm->ldr_reg, false);
		svm->ldr_reg = 0;
	} else {
		svm->ldr_reg = ldr;
	}
	return ret;
}

static int avic_handle_apic_id_update(struct kvm_vcpu *vcpu)
{
	u64 *old, *new;
	struct vcpu_svm *svm = to_svm(vcpu);
	u32 apic_id_reg = kvm_lapic_get_reg(vcpu->arch.apic, APIC_ID);
	u32 id = (apic_id_reg >> 24) & 0xff;

	if (vcpu->vcpu_id == id)
		return 0;

	old = avic_get_physical_id_entry(vcpu, vcpu->vcpu_id);
	new = avic_get_physical_id_entry(vcpu, id);
	if (!new || !old)
		return 1;

	/* We need to move physical_id_entry to new offset */
	*new = *old;
	*old = 0ULL;
	to_svm(vcpu)->avic_physical_id_cache = new;

	/*
	 * Also update the guest physical APIC ID in the logical
	 * APIC ID table entry if already setup the LDR.
	 */
	if (svm->ldr_reg)
		avic_handle_ldr_update(vcpu);

	return 0;
}

static int avic_handle_dfr_update(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	struct kvm_arch *vm_data = &vcpu->kvm->arch;
	u32 dfr = kvm_lapic_get_reg(vcpu->arch.apic, APIC_DFR);
	u32 mod = (dfr >> 28) & 0xf;

	/*
	 * We assume that all local APICs are using the same type.
	 * If this changes, we need to flush the AVIC logical
	 * APID id table.
	 */
	if (vm_data->ldr_mode == mod)
		return 0;

	clear_page(page_address(vm_data->avic_logical_id_table_page));
	vm_data->ldr_mode = mod;

	if (svm->ldr_reg)
		avic_handle_ldr_update(vcpu);
	return 0;
}

static int avic_unaccel_trap_write(struct vcpu_svm *svm)
{
	struct kvm_lapic *apic = svm->vcpu.arch.apic;
	u32 offset = svm->vmcb->control.exit_info_1 &
				AVIC_UNACCEL_ACCESS_OFFSET_MASK;

	switch (offset) {
	case APIC_ID:
		if (avic_handle_apic_id_update(&svm->vcpu))
			return 0;
		break;
	case APIC_LDR:
		if (avic_handle_ldr_update(&svm->vcpu))
			return 0;
		break;
	case APIC_DFR:
		avic_handle_dfr_update(&svm->vcpu);
		break;
	default:
		break;
	}

	kvm_lapic_reg_write(apic, offset, kvm_lapic_get_reg(apic, offset));

	return 1;
}

static bool is_avic_unaccelerated_access_trap(u32 offset)
{
	bool ret = false;

	switch (offset) {
	case APIC_ID:
	case APIC_EOI:
	case APIC_RRR:
	case APIC_LDR:
	case APIC_DFR:
	case APIC_SPIV:
	case APIC_ESR:
	case APIC_ICR:
	case APIC_LVTT:
	case APIC_LVTTHMR:
	case APIC_LVTPC:
	case APIC_LVT0:
	case APIC_LVT1:
	case APIC_LVTERR:
	case APIC_TMICT:
	case APIC_TDCR:
		ret = true;
		break;
	default:
		break;
	}
	return ret;
}

static int avic_unaccelerated_access_interception(struct vcpu_svm *svm)
{
	int ret = 0;
	u32 offset = svm->vmcb->control.exit_info_1 &
		     AVIC_UNACCEL_ACCESS_OFFSET_MASK;
	u32 vector = svm->vmcb->control.exit_info_2 &
		     AVIC_UNACCEL_ACCESS_VECTOR_MASK;
	bool write = (svm->vmcb->control.exit_info_1 >> 32) &
		     AVIC_UNACCEL_ACCESS_WRITE_MASK;
	bool trap = is_avic_unaccelerated_access_trap(offset);

	trace_kvm_avic_unaccelerated_access(svm->vcpu.vcpu_id, offset,
					    trap, write, vector);
	if (trap) {
		/* Handling Trap */
		WARN_ONCE(!write, "svm: Handling trap read.\n");
		ret = avic_unaccel_trap_write(svm);
	} else {
		/* Handling Fault */
		ret = (emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE);
	}

	return ret;
}

4029
static int (*const svm_exit_handlers[])(struct vcpu_svm *svm) = {
4030 4031 4032 4033
	[SVM_EXIT_READ_CR0]			= cr_interception,
	[SVM_EXIT_READ_CR3]			= cr_interception,
	[SVM_EXIT_READ_CR4]			= cr_interception,
	[SVM_EXIT_READ_CR8]			= cr_interception,
4034
	[SVM_EXIT_CR0_SEL_WRITE]		= cr_interception,
4035
	[SVM_EXIT_WRITE_CR0]			= cr_interception,
4036 4037
	[SVM_EXIT_WRITE_CR3]			= cr_interception,
	[SVM_EXIT_WRITE_CR4]			= cr_interception,
J
Joerg Roedel 已提交
4038
	[SVM_EXIT_WRITE_CR8]			= cr8_write_interception,
4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054
	[SVM_EXIT_READ_DR0]			= dr_interception,
	[SVM_EXIT_READ_DR1]			= dr_interception,
	[SVM_EXIT_READ_DR2]			= dr_interception,
	[SVM_EXIT_READ_DR3]			= dr_interception,
	[SVM_EXIT_READ_DR4]			= dr_interception,
	[SVM_EXIT_READ_DR5]			= dr_interception,
	[SVM_EXIT_READ_DR6]			= dr_interception,
	[SVM_EXIT_READ_DR7]			= dr_interception,
	[SVM_EXIT_WRITE_DR0]			= dr_interception,
	[SVM_EXIT_WRITE_DR1]			= dr_interception,
	[SVM_EXIT_WRITE_DR2]			= dr_interception,
	[SVM_EXIT_WRITE_DR3]			= dr_interception,
	[SVM_EXIT_WRITE_DR4]			= dr_interception,
	[SVM_EXIT_WRITE_DR5]			= dr_interception,
	[SVM_EXIT_WRITE_DR6]			= dr_interception,
	[SVM_EXIT_WRITE_DR7]			= dr_interception,
J
Jan Kiszka 已提交
4055 4056
	[SVM_EXIT_EXCP_BASE + DB_VECTOR]	= db_interception,
	[SVM_EXIT_EXCP_BASE + BP_VECTOR]	= bp_interception,
4057
	[SVM_EXIT_EXCP_BASE + UD_VECTOR]	= ud_interception,
J
Joerg Roedel 已提交
4058 4059
	[SVM_EXIT_EXCP_BASE + PF_VECTOR]	= pf_interception,
	[SVM_EXIT_EXCP_BASE + MC_VECTOR]	= mc_interception,
4060
	[SVM_EXIT_EXCP_BASE + AC_VECTOR]	= ac_interception,
J
Joerg Roedel 已提交
4061
	[SVM_EXIT_INTR]				= intr_interception,
4062
	[SVM_EXIT_NMI]				= nmi_interception,
A
Avi Kivity 已提交
4063 4064
	[SVM_EXIT_SMI]				= nop_on_interception,
	[SVM_EXIT_INIT]				= nop_on_interception,
4065
	[SVM_EXIT_VINTR]			= interrupt_window_interception,
A
Avi Kivity 已提交
4066
	[SVM_EXIT_RDPMC]			= rdpmc_interception,
A
Avi Kivity 已提交
4067
	[SVM_EXIT_CPUID]			= cpuid_interception,
4068
	[SVM_EXIT_IRET]                         = iret_interception,
4069
	[SVM_EXIT_INVD]                         = emulate_on_interception,
4070
	[SVM_EXIT_PAUSE]			= pause_interception,
A
Avi Kivity 已提交
4071
	[SVM_EXIT_HLT]				= halt_interception,
M
Marcelo Tosatti 已提交
4072
	[SVM_EXIT_INVLPG]			= invlpg_interception,
A
Alexander Graf 已提交
4073
	[SVM_EXIT_INVLPGA]			= invlpga_interception,
J
Joerg Roedel 已提交
4074
	[SVM_EXIT_IOIO]				= io_interception,
A
Avi Kivity 已提交
4075 4076
	[SVM_EXIT_MSR]				= msr_interception,
	[SVM_EXIT_TASK_SWITCH]			= task_switch_interception,
4077
	[SVM_EXIT_SHUTDOWN]			= shutdown_interception,
A
Alexander Graf 已提交
4078
	[SVM_EXIT_VMRUN]			= vmrun_interception,
4079
	[SVM_EXIT_VMMCALL]			= vmmcall_interception,
4080 4081
	[SVM_EXIT_VMLOAD]			= vmload_interception,
	[SVM_EXIT_VMSAVE]			= vmsave_interception,
4082 4083
	[SVM_EXIT_STGI]				= stgi_interception,
	[SVM_EXIT_CLGI]				= clgi_interception,
4084
	[SVM_EXIT_SKINIT]			= skinit_interception,
D
David Kaplan 已提交
4085
	[SVM_EXIT_WBINVD]                       = wbinvd_interception,
4086 4087
	[SVM_EXIT_MONITOR]			= monitor_interception,
	[SVM_EXIT_MWAIT]			= mwait_interception,
J
Joerg Roedel 已提交
4088
	[SVM_EXIT_XSETBV]			= xsetbv_interception,
4089
	[SVM_EXIT_NPF]				= pf_interception,
P
Paolo Bonzini 已提交
4090
	[SVM_EXIT_RSM]                          = emulate_on_interception,
4091 4092
	[SVM_EXIT_AVIC_INCOMPLETE_IPI]		= avic_incomplete_ipi_interception,
	[SVM_EXIT_AVIC_UNACCELERATED_ACCESS]	= avic_unaccelerated_access_interception,
A
Avi Kivity 已提交
4093 4094
};

4095
static void dump_vmcb(struct kvm_vcpu *vcpu)
4096 4097 4098 4099 4100 4101
{
	struct vcpu_svm *svm = to_svm(vcpu);
	struct vmcb_control_area *control = &svm->vmcb->control;
	struct vmcb_save_area *save = &svm->vmcb->save;

	pr_err("VMCB Control Area:\n");
4102 4103 4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123
	pr_err("%-20s%04x\n", "cr_read:", control->intercept_cr & 0xffff);
	pr_err("%-20s%04x\n", "cr_write:", control->intercept_cr >> 16);
	pr_err("%-20s%04x\n", "dr_read:", control->intercept_dr & 0xffff);
	pr_err("%-20s%04x\n", "dr_write:", control->intercept_dr >> 16);
	pr_err("%-20s%08x\n", "exceptions:", control->intercept_exceptions);
	pr_err("%-20s%016llx\n", "intercepts:", control->intercept);
	pr_err("%-20s%d\n", "pause filter count:", control->pause_filter_count);
	pr_err("%-20s%016llx\n", "iopm_base_pa:", control->iopm_base_pa);
	pr_err("%-20s%016llx\n", "msrpm_base_pa:", control->msrpm_base_pa);
	pr_err("%-20s%016llx\n", "tsc_offset:", control->tsc_offset);
	pr_err("%-20s%d\n", "asid:", control->asid);
	pr_err("%-20s%d\n", "tlb_ctl:", control->tlb_ctl);
	pr_err("%-20s%08x\n", "int_ctl:", control->int_ctl);
	pr_err("%-20s%08x\n", "int_vector:", control->int_vector);
	pr_err("%-20s%08x\n", "int_state:", control->int_state);
	pr_err("%-20s%08x\n", "exit_code:", control->exit_code);
	pr_err("%-20s%016llx\n", "exit_info1:", control->exit_info_1);
	pr_err("%-20s%016llx\n", "exit_info2:", control->exit_info_2);
	pr_err("%-20s%08x\n", "exit_int_info:", control->exit_int_info);
	pr_err("%-20s%08x\n", "exit_int_info_err:", control->exit_int_info_err);
	pr_err("%-20s%lld\n", "nested_ctl:", control->nested_ctl);
	pr_err("%-20s%016llx\n", "nested_cr3:", control->nested_cr3);
4124
	pr_err("%-20s%016llx\n", "avic_vapic_bar:", control->avic_vapic_bar);
4125 4126
	pr_err("%-20s%08x\n", "event_inj:", control->event_inj);
	pr_err("%-20s%08x\n", "event_inj_err:", control->event_inj_err);
4127
	pr_err("%-20s%lld\n", "virt_ext:", control->virt_ext);
4128
	pr_err("%-20s%016llx\n", "next_rip:", control->next_rip);
4129 4130 4131
	pr_err("%-20s%016llx\n", "avic_backing_page:", control->avic_backing_page);
	pr_err("%-20s%016llx\n", "avic_logical_id:", control->avic_logical_id);
	pr_err("%-20s%016llx\n", "avic_physical_id:", control->avic_physical_id);
4132
	pr_err("VMCB State Save Area:\n");
4133 4134 4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "es:",
	       save->es.selector, save->es.attrib,
	       save->es.limit, save->es.base);
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "cs:",
	       save->cs.selector, save->cs.attrib,
	       save->cs.limit, save->cs.base);
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "ss:",
	       save->ss.selector, save->ss.attrib,
	       save->ss.limit, save->ss.base);
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "ds:",
	       save->ds.selector, save->ds.attrib,
	       save->ds.limit, save->ds.base);
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "fs:",
	       save->fs.selector, save->fs.attrib,
	       save->fs.limit, save->fs.base);
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "gs:",
	       save->gs.selector, save->gs.attrib,
	       save->gs.limit, save->gs.base);
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "gdtr:",
	       save->gdtr.selector, save->gdtr.attrib,
	       save->gdtr.limit, save->gdtr.base);
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "ldtr:",
	       save->ldtr.selector, save->ldtr.attrib,
	       save->ldtr.limit, save->ldtr.base);
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "idtr:",
	       save->idtr.selector, save->idtr.attrib,
	       save->idtr.limit, save->idtr.base);
	pr_err("%-5s s: %04x a: %04x l: %08x b: %016llx\n",
	       "tr:",
	       save->tr.selector, save->tr.attrib,
	       save->tr.limit, save->tr.base);
4173 4174
	pr_err("cpl:            %d                efer:         %016llx\n",
		save->cpl, save->efer);
4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195 4196 4197 4198 4199 4200 4201
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "cr0:", save->cr0, "cr2:", save->cr2);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "cr3:", save->cr3, "cr4:", save->cr4);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "dr6:", save->dr6, "dr7:", save->dr7);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "rip:", save->rip, "rflags:", save->rflags);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "rsp:", save->rsp, "rax:", save->rax);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "star:", save->star, "lstar:", save->lstar);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "cstar:", save->cstar, "sfmask:", save->sfmask);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "kernel_gs_base:", save->kernel_gs_base,
	       "sysenter_cs:", save->sysenter_cs);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "sysenter_esp:", save->sysenter_esp,
	       "sysenter_eip:", save->sysenter_eip);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "gpat:", save->g_pat, "dbgctl:", save->dbgctl);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "br_from:", save->br_from, "br_to:", save->br_to);
	pr_err("%-15s %016llx %-13s %016llx\n",
	       "excp_from:", save->last_excp_from,
	       "excp_to:", save->last_excp_to);
4202 4203
}

4204 4205 4206 4207 4208 4209 4210 4211
static void svm_get_exit_info(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2)
{
	struct vmcb_control_area *control = &to_svm(vcpu)->vmcb->control;

	*info1 = control->exit_info_1;
	*info2 = control->exit_info_2;
}

A
Avi Kivity 已提交
4212
static int handle_exit(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4213
{
4214
	struct vcpu_svm *svm = to_svm(vcpu);
A
Avi Kivity 已提交
4215
	struct kvm_run *kvm_run = vcpu->run;
4216
	u32 exit_code = svm->vmcb->control.exit_code;
A
Avi Kivity 已提交
4217

4218 4219
	trace_kvm_exit(exit_code, vcpu, KVM_ISA_SVM);

4220
	if (!is_cr_intercept(svm, INTERCEPT_CR0_WRITE))
4221 4222 4223
		vcpu->arch.cr0 = svm->vmcb->save.cr0;
	if (npt_enabled)
		vcpu->arch.cr3 = svm->vmcb->save.cr3;
4224

4225 4226 4227 4228 4229 4230 4231
	if (unlikely(svm->nested.exit_required)) {
		nested_svm_vmexit(svm);
		svm->nested.exit_required = false;

		return 1;
	}

4232
	if (is_guest_mode(vcpu)) {
4233 4234
		int vmexit;

4235 4236 4237 4238
		trace_kvm_nested_vmexit(svm->vmcb->save.rip, exit_code,
					svm->vmcb->control.exit_info_1,
					svm->vmcb->control.exit_info_2,
					svm->vmcb->control.exit_int_info,
4239 4240
					svm->vmcb->control.exit_int_info_err,
					KVM_ISA_SVM);
4241

4242 4243 4244 4245 4246 4247
		vmexit = nested_svm_exit_special(svm);

		if (vmexit == NESTED_EXIT_CONTINUE)
			vmexit = nested_svm_exit_handled(svm);

		if (vmexit == NESTED_EXIT_DONE)
4248 4249 4250
			return 1;
	}

4251 4252
	svm_complete_interrupts(svm);

4253 4254 4255 4256
	if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
		kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
		kvm_run->fail_entry.hardware_entry_failure_reason
			= svm->vmcb->control.exit_code;
4257 4258
		pr_err("KVM: FAILED VMRUN WITH VMCB:\n");
		dump_vmcb(vcpu);
4259 4260 4261
		return 0;
	}

4262
	if (is_external_interrupt(svm->vmcb->control.exit_int_info) &&
4263
	    exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR &&
4264 4265
	    exit_code != SVM_EXIT_NPF && exit_code != SVM_EXIT_TASK_SWITCH &&
	    exit_code != SVM_EXIT_INTR && exit_code != SVM_EXIT_NMI)
4266
		printk(KERN_ERR "%s: unexpected exit_int_info 0x%x "
A
Avi Kivity 已提交
4267
		       "exit_code 0x%x\n",
4268
		       __func__, svm->vmcb->control.exit_int_info,
A
Avi Kivity 已提交
4269 4270
		       exit_code);

4271
	if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
J
Joe Perches 已提交
4272
	    || !svm_exit_handlers[exit_code]) {
4273
		WARN_ONCE(1, "svm: unexpected exit reason 0x%x\n", exit_code);
4274 4275
		kvm_queue_exception(vcpu, UD_VECTOR);
		return 1;
A
Avi Kivity 已提交
4276 4277
	}

A
Avi Kivity 已提交
4278
	return svm_exit_handlers[exit_code](svm);
A
Avi Kivity 已提交
4279 4280 4281 4282 4283 4284
}

static void reload_tss(struct kvm_vcpu *vcpu)
{
	int cpu = raw_smp_processor_id();

4285 4286
	struct svm_cpu_data *sd = per_cpu(svm_data, cpu);
	sd->tss_desc->type = 9; /* available 32/64-bit TSS */
A
Avi Kivity 已提交
4287 4288 4289
	load_TR_desc();
}

R
Rusty Russell 已提交
4290
static void pre_svm_run(struct vcpu_svm *svm)
A
Avi Kivity 已提交
4291 4292 4293
{
	int cpu = raw_smp_processor_id();

4294
	struct svm_cpu_data *sd = per_cpu(svm_data, cpu);
A
Avi Kivity 已提交
4295

4296
	/* FIXME: handle wraparound of asid_generation */
4297 4298
	if (svm->asid_generation != sd->asid_generation)
		new_asid(svm, sd);
A
Avi Kivity 已提交
4299 4300
}

4301 4302 4303 4304 4305 4306
static void svm_inject_nmi(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	svm->vmcb->control.event_inj = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI;
	vcpu->arch.hflags |= HF_NMI_MASK;
4307
	set_intercept(svm, INTERCEPT_IRET);
4308 4309
	++vcpu->stat.nmi_injections;
}
A
Avi Kivity 已提交
4310

4311
static inline void svm_inject_irq(struct vcpu_svm *svm, int irq)
A
Avi Kivity 已提交
4312 4313 4314
{
	struct vmcb_control_area *control;

4315
	/* The following fields are ignored when AVIC is enabled */
R
Rusty Russell 已提交
4316
	control = &svm->vmcb->control;
4317
	control->int_vector = irq;
A
Avi Kivity 已提交
4318 4319 4320
	control->int_ctl &= ~V_INTR_PRIO_MASK;
	control->int_ctl |= V_IRQ_MASK |
		((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
4321
	mark_dirty(svm->vmcb, VMCB_INTR);
A
Avi Kivity 已提交
4322 4323
}

4324
static void svm_set_irq(struct kvm_vcpu *vcpu)
E
Eddie Dong 已提交
4325 4326 4327
{
	struct vcpu_svm *svm = to_svm(vcpu);

4328
	BUG_ON(!(gif_set(svm)));
4329

4330 4331 4332
	trace_kvm_inj_virq(vcpu->arch.interrupt.nr);
	++vcpu->stat.irq_injections;

4333 4334
	svm->vmcb->control.event_inj = vcpu->arch.interrupt.nr |
		SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR;
E
Eddie Dong 已提交
4335 4336
}

4337 4338 4339 4340 4341
static inline bool svm_nested_virtualize_tpr(struct kvm_vcpu *vcpu)
{
	return is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK);
}

4342
static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
4343 4344 4345
{
	struct vcpu_svm *svm = to_svm(vcpu);

4346 4347
	if (svm_nested_virtualize_tpr(vcpu) ||
	    kvm_vcpu_apicv_active(vcpu))
4348 4349
		return;

4350 4351
	clr_cr_intercept(svm, INTERCEPT_CR8_WRITE);

4352
	if (irr == -1)
4353 4354
		return;

4355
	if (tpr >= irr)
4356
		set_cr_intercept(svm, INTERCEPT_CR8_WRITE);
4357
}
4358

4359 4360 4361 4362 4363
static void svm_set_virtual_x2apic_mode(struct kvm_vcpu *vcpu, bool set)
{
	return;
}

4364 4365
static bool svm_get_enable_apicv(void)
{
4366 4367 4368 4369 4370
	return avic;
}

static void svm_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr)
{
4371 4372
}

4373
static void svm_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr)
4374
{
4375 4376
}

4377
/* Note: Currently only used by Hyper-V. */
4378
static void svm_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu)
4379
{
4380 4381 4382 4383 4384 4385 4386 4387
	struct vcpu_svm *svm = to_svm(vcpu);
	struct vmcb *vmcb = svm->vmcb;

	if (!avic)
		return;

	vmcb->control.int_ctl &= ~AVIC_ENABLE_MASK;
	mark_dirty(vmcb, VMCB_INTR);
4388 4389
}

4390
static void svm_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)
4391 4392 4393 4394
{
	return;
}

4395 4396 4397 4398 4399 4400 4401
static void svm_deliver_avic_intr(struct kvm_vcpu *vcpu, int vec)
{
	kvm_lapic_set_irr(vec, vcpu->arch.apic);
	smp_mb__after_atomic();

	if (avic_vcpu_is_running(vcpu))
		wrmsrl(SVM_AVIC_DOORBELL,
4402
		       kvm_cpu_get_apicid(vcpu->cpu));
4403 4404 4405 4406
	else
		kvm_vcpu_wake_up(vcpu);
}

4407 4408 4409 4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609
static void svm_ir_list_del(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi)
{
	unsigned long flags;
	struct amd_svm_iommu_ir *cur;

	spin_lock_irqsave(&svm->ir_list_lock, flags);
	list_for_each_entry(cur, &svm->ir_list, node) {
		if (cur->data != pi->ir_data)
			continue;
		list_del(&cur->node);
		kfree(cur);
		break;
	}
	spin_unlock_irqrestore(&svm->ir_list_lock, flags);
}

static int svm_ir_list_add(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi)
{
	int ret = 0;
	unsigned long flags;
	struct amd_svm_iommu_ir *ir;

	/**
	 * In some cases, the existing irte is updaed and re-set,
	 * so we need to check here if it's already been * added
	 * to the ir_list.
	 */
	if (pi->ir_data && (pi->prev_ga_tag != 0)) {
		struct kvm *kvm = svm->vcpu.kvm;
		u32 vcpu_id = AVIC_GATAG_TO_VCPUID(pi->prev_ga_tag);
		struct kvm_vcpu *prev_vcpu = kvm_get_vcpu_by_id(kvm, vcpu_id);
		struct vcpu_svm *prev_svm;

		if (!prev_vcpu) {
			ret = -EINVAL;
			goto out;
		}

		prev_svm = to_svm(prev_vcpu);
		svm_ir_list_del(prev_svm, pi);
	}

	/**
	 * Allocating new amd_iommu_pi_data, which will get
	 * add to the per-vcpu ir_list.
	 */
	ir = kzalloc(sizeof(struct amd_svm_iommu_ir), GFP_KERNEL);
	if (!ir) {
		ret = -ENOMEM;
		goto out;
	}
	ir->data = pi->ir_data;

	spin_lock_irqsave(&svm->ir_list_lock, flags);
	list_add(&ir->node, &svm->ir_list);
	spin_unlock_irqrestore(&svm->ir_list_lock, flags);
out:
	return ret;
}

/**
 * Note:
 * The HW cannot support posting multicast/broadcast
 * interrupts to a vCPU. So, we still use legacy interrupt
 * remapping for these kind of interrupts.
 *
 * For lowest-priority interrupts, we only support
 * those with single CPU as the destination, e.g. user
 * configures the interrupts via /proc/irq or uses
 * irqbalance to make the interrupts single-CPU.
 */
static int
get_pi_vcpu_info(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
		 struct vcpu_data *vcpu_info, struct vcpu_svm **svm)
{
	struct kvm_lapic_irq irq;
	struct kvm_vcpu *vcpu = NULL;

	kvm_set_msi_irq(kvm, e, &irq);

	if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu)) {
		pr_debug("SVM: %s: use legacy intr remap mode for irq %u\n",
			 __func__, irq.vector);
		return -1;
	}

	pr_debug("SVM: %s: use GA mode for irq %u\n", __func__,
		 irq.vector);
	*svm = to_svm(vcpu);
	vcpu_info->pi_desc_addr = page_to_phys((*svm)->avic_backing_page);
	vcpu_info->vector = irq.vector;

	return 0;
}

/*
 * svm_update_pi_irte - set IRTE for Posted-Interrupts
 *
 * @kvm: kvm
 * @host_irq: host irq of the interrupt
 * @guest_irq: gsi of the interrupt
 * @set: set or unset PI
 * returns 0 on success, < 0 on failure
 */
static int svm_update_pi_irte(struct kvm *kvm, unsigned int host_irq,
			      uint32_t guest_irq, bool set)
{
	struct kvm_kernel_irq_routing_entry *e;
	struct kvm_irq_routing_table *irq_rt;
	int idx, ret = -EINVAL;

	if (!kvm_arch_has_assigned_device(kvm) ||
	    !irq_remapping_cap(IRQ_POSTING_CAP))
		return 0;

	pr_debug("SVM: %s: host_irq=%#x, guest_irq=%#x, set=%#x\n",
		 __func__, host_irq, guest_irq, set);

	idx = srcu_read_lock(&kvm->irq_srcu);
	irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
	WARN_ON(guest_irq >= irq_rt->nr_rt_entries);

	hlist_for_each_entry(e, &irq_rt->map[guest_irq], link) {
		struct vcpu_data vcpu_info;
		struct vcpu_svm *svm = NULL;

		if (e->type != KVM_IRQ_ROUTING_MSI)
			continue;

		/**
		 * Here, we setup with legacy mode in the following cases:
		 * 1. When cannot target interrupt to a specific vcpu.
		 * 2. Unsetting posted interrupt.
		 * 3. APIC virtialization is disabled for the vcpu.
		 */
		if (!get_pi_vcpu_info(kvm, e, &vcpu_info, &svm) && set &&
		    kvm_vcpu_apicv_active(&svm->vcpu)) {
			struct amd_iommu_pi_data pi;

			/* Try to enable guest_mode in IRTE */
			pi.base = page_to_phys(svm->avic_backing_page) & AVIC_HPA_MASK;
			pi.ga_tag = AVIC_GATAG(kvm->arch.avic_vm_id,
						     svm->vcpu.vcpu_id);
			pi.is_guest_mode = true;
			pi.vcpu_data = &vcpu_info;
			ret = irq_set_vcpu_affinity(host_irq, &pi);

			/**
			 * Here, we successfully setting up vcpu affinity in
			 * IOMMU guest mode. Now, we need to store the posted
			 * interrupt information in a per-vcpu ir_list so that
			 * we can reference to them directly when we update vcpu
			 * scheduling information in IOMMU irte.
			 */
			if (!ret && pi.is_guest_mode)
				svm_ir_list_add(svm, &pi);
		} else {
			/* Use legacy mode in IRTE */
			struct amd_iommu_pi_data pi;

			/**
			 * Here, pi is used to:
			 * - Tell IOMMU to use legacy mode for this interrupt.
			 * - Retrieve ga_tag of prior interrupt remapping data.
			 */
			pi.is_guest_mode = false;
			ret = irq_set_vcpu_affinity(host_irq, &pi);

			/**
			 * Check if the posted interrupt was previously
			 * setup with the guest_mode by checking if the ga_tag
			 * was cached. If so, we need to clean up the per-vcpu
			 * ir_list.
			 */
			if (!ret && pi.prev_ga_tag) {
				int id = AVIC_GATAG_TO_VCPUID(pi.prev_ga_tag);
				struct kvm_vcpu *vcpu;

				vcpu = kvm_get_vcpu_by_id(kvm, id);
				if (vcpu)
					svm_ir_list_del(to_svm(vcpu), &pi);
			}
		}

		if (!ret && svm) {
			trace_kvm_pi_irte_update(svm->vcpu.vcpu_id,
						 host_irq, e->gsi,
						 vcpu_info.vector,
						 vcpu_info.pi_desc_addr, set);
		}

		if (ret < 0) {
			pr_err("%s: failed to update PI IRTE\n", __func__);
			goto out;
		}
	}

	ret = 0;
out:
	srcu_read_unlock(&kvm->irq_srcu, idx);
	return ret;
}

4610 4611 4612 4613
static int svm_nmi_allowed(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	struct vmcb *vmcb = svm->vmcb;
J
Joerg Roedel 已提交
4614 4615 4616 4617 4618 4619
	int ret;
	ret = !(vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) &&
	      !(svm->vcpu.arch.hflags & HF_NMI_MASK);
	ret = ret && gif_set(svm) && nested_svm_nmi(svm);

	return ret;
4620 4621
}

J
Jan Kiszka 已提交
4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634
static bool svm_get_nmi_mask(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	return !!(svm->vcpu.arch.hflags & HF_NMI_MASK);
}

static void svm_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	if (masked) {
		svm->vcpu.arch.hflags |= HF_NMI_MASK;
4635
		set_intercept(svm, INTERCEPT_IRET);
J
Jan Kiszka 已提交
4636 4637
	} else {
		svm->vcpu.arch.hflags &= ~HF_NMI_MASK;
4638
		clr_intercept(svm, INTERCEPT_IRET);
J
Jan Kiszka 已提交
4639 4640 4641
	}
}

4642 4643 4644 4645
static int svm_interrupt_allowed(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	struct vmcb *vmcb = svm->vmcb;
4646 4647 4648 4649 4650 4651
	int ret;

	if (!gif_set(svm) ||
	     (vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK))
		return 0;

4652
	ret = !!(kvm_get_rflags(vcpu) & X86_EFLAGS_IF);
4653

4654
	if (is_guest_mode(vcpu))
4655 4656 4657
		return ret && !(svm->vcpu.arch.hflags & HF_VINTR_MASK);

	return ret;
4658 4659
}

4660
static void enable_irq_window(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4661
{
4662 4663
	struct vcpu_svm *svm = to_svm(vcpu);

4664 4665 4666
	if (kvm_vcpu_apicv_active(vcpu))
		return;

J
Joerg Roedel 已提交
4667 4668 4669 4670 4671 4672
	/*
	 * In case GIF=0 we can't rely on the CPU to tell us when GIF becomes
	 * 1, because that's a separate STGI/VMRUN intercept.  The next time we
	 * get that intercept, this function will be called again though and
	 * we'll get the vintr intercept.
	 */
4673
	if (gif_set(svm) && nested_svm_intr(svm)) {
4674 4675 4676
		svm_set_vintr(svm);
		svm_inject_irq(svm, 0x0);
	}
4677 4678
}

4679
static void enable_nmi_window(struct kvm_vcpu *vcpu)
4680
{
4681
	struct vcpu_svm *svm = to_svm(vcpu);
4682

4683 4684
	if ((svm->vcpu.arch.hflags & (HF_NMI_MASK | HF_IRET_MASK))
	    == HF_NMI_MASK)
4685
		return; /* IRET will cause a vm exit */
4686

4687 4688 4689 4690 4691 4692
	if ((svm->vcpu.arch.hflags & HF_GIF_MASK) == 0)
		return; /* STGI will cause a vm exit */

	if (svm->nested.exit_required)
		return; /* we're not going to run the guest yet */

J
Joerg Roedel 已提交
4693 4694 4695 4696
	/*
	 * Something prevents NMI from been injected. Single step over possible
	 * problem (IRET or exception injection or interrupt shadow)
	 */
4697
	svm->nmi_singlestep_guest_rflags = svm_get_rflags(vcpu);
J
Jan Kiszka 已提交
4698
	svm->nmi_singlestep = true;
4699
	svm->vmcb->save.rflags |= (X86_EFLAGS_TF | X86_EFLAGS_RF);
4700 4701
}

4702 4703 4704 4705 4706
static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
{
	return 0;
}

4707 4708
static void svm_flush_tlb(struct kvm_vcpu *vcpu)
{
4709 4710 4711 4712 4713 4714
	struct vcpu_svm *svm = to_svm(vcpu);

	if (static_cpu_has(X86_FEATURE_FLUSHBYASID))
		svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ASID;
	else
		svm->asid_generation--;
4715 4716
}

4717 4718 4719 4720
static void svm_prepare_guest_switch(struct kvm_vcpu *vcpu)
{
}

4721 4722 4723 4724
static inline void sync_cr8_to_lapic(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);

4725
	if (svm_nested_virtualize_tpr(vcpu))
4726 4727
		return;

4728
	if (!is_cr_intercept(svm, INTERCEPT_CR8_WRITE)) {
4729
		int cr8 = svm->vmcb->control.int_ctl & V_TPR_MASK;
4730
		kvm_set_cr8(vcpu, cr8);
4731 4732 4733
	}
}

4734 4735 4736 4737 4738
static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	u64 cr8;

4739 4740
	if (svm_nested_virtualize_tpr(vcpu) ||
	    kvm_vcpu_apicv_active(vcpu))
4741 4742
		return;

4743 4744 4745 4746 4747
	cr8 = kvm_get_cr8(vcpu);
	svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
	svm->vmcb->control.int_ctl |= cr8 & V_TPR_MASK;
}

4748 4749 4750 4751 4752
static void svm_complete_interrupts(struct vcpu_svm *svm)
{
	u8 vector;
	int type;
	u32 exitintinfo = svm->vmcb->control.exit_int_info;
4753 4754 4755
	unsigned int3_injected = svm->int3_injected;

	svm->int3_injected = 0;
4756

4757 4758 4759 4760 4761 4762
	/*
	 * If we've made progress since setting HF_IRET_MASK, we've
	 * executed an IRET and can allow NMI injection.
	 */
	if ((svm->vcpu.arch.hflags & HF_IRET_MASK)
	    && kvm_rip_read(&svm->vcpu) != svm->nmi_iret_rip) {
4763
		svm->vcpu.arch.hflags &= ~(HF_NMI_MASK | HF_IRET_MASK);
4764 4765
		kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
	}
4766

4767 4768 4769 4770 4771 4772 4773
	svm->vcpu.arch.nmi_injected = false;
	kvm_clear_exception_queue(&svm->vcpu);
	kvm_clear_interrupt_queue(&svm->vcpu);

	if (!(exitintinfo & SVM_EXITINTINFO_VALID))
		return;

4774 4775
	kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);

4776 4777 4778 4779 4780 4781 4782 4783
	vector = exitintinfo & SVM_EXITINTINFO_VEC_MASK;
	type = exitintinfo & SVM_EXITINTINFO_TYPE_MASK;

	switch (type) {
	case SVM_EXITINTINFO_TYPE_NMI:
		svm->vcpu.arch.nmi_injected = true;
		break;
	case SVM_EXITINTINFO_TYPE_EXEPT:
4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794
		/*
		 * In case of software exceptions, do not reinject the vector,
		 * but re-execute the instruction instead. Rewind RIP first
		 * if we emulated INT3 before.
		 */
		if (kvm_exception_is_soft(vector)) {
			if (vector == BP_VECTOR && int3_injected &&
			    kvm_is_linear_rip(&svm->vcpu, svm->int3_rip))
				kvm_rip_write(&svm->vcpu,
					      kvm_rip_read(&svm->vcpu) -
					      int3_injected);
4795
			break;
4796
		}
4797 4798
		if (exitintinfo & SVM_EXITINTINFO_VALID_ERR) {
			u32 err = svm->vmcb->control.exit_int_info_err;
4799
			kvm_requeue_exception_e(&svm->vcpu, vector, err);
4800 4801

		} else
4802
			kvm_requeue_exception(&svm->vcpu, vector);
4803 4804
		break;
	case SVM_EXITINTINFO_TYPE_INTR:
4805
		kvm_queue_interrupt(&svm->vcpu, vector, false);
4806 4807 4808 4809 4810 4811
		break;
	default:
		break;
	}
}

A
Avi Kivity 已提交
4812 4813 4814 4815 4816 4817 4818 4819 4820 4821 4822
static void svm_cancel_injection(struct kvm_vcpu *vcpu)
{
	struct vcpu_svm *svm = to_svm(vcpu);
	struct vmcb_control_area *control = &svm->vmcb->control;

	control->exit_int_info = control->event_inj;
	control->exit_int_info_err = control->event_inj_err;
	control->event_inj = 0;
	svm_complete_interrupts(svm);
}

A
Avi Kivity 已提交
4823
static void svm_vcpu_run(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4824
{
4825
	struct vcpu_svm *svm = to_svm(vcpu);
4826

4827 4828 4829 4830
	svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
	svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
	svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP];

4831 4832 4833 4834 4835 4836 4837
	/*
	 * A vmexit emulation is required before the vcpu can be executed
	 * again.
	 */
	if (unlikely(svm->nested.exit_required))
		return;

4838 4839 4840 4841 4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853
	/*
	 * Disable singlestep if we're injecting an interrupt/exception.
	 * We don't want our modified rflags to be pushed on the stack where
	 * we might not be able to easily reset them if we disabled NMI
	 * singlestep later.
	 */
	if (svm->nmi_singlestep && svm->vmcb->control.event_inj) {
		/*
		 * Event injection happens before external interrupts cause a
		 * vmexit and interrupts are disabled here, so smp_send_reschedule
		 * is enough to force an immediate vmexit.
		 */
		disable_nmi_singlestep(svm);
		smp_send_reschedule(vcpu->cpu);
	}

R
Rusty Russell 已提交
4854
	pre_svm_run(svm);
A
Avi Kivity 已提交
4855

4856 4857
	sync_lapic_to_cr8(vcpu);

4858
	svm->vmcb->save.cr2 = vcpu->arch.cr2;
A
Avi Kivity 已提交
4859

4860 4861 4862
	clgi();

	local_irq_enable();
4863

A
Avi Kivity 已提交
4864
	asm volatile (
A
Avi Kivity 已提交
4865 4866 4867 4868 4869 4870 4871
		"push %%" _ASM_BP "; \n\t"
		"mov %c[rbx](%[svm]), %%" _ASM_BX " \n\t"
		"mov %c[rcx](%[svm]), %%" _ASM_CX " \n\t"
		"mov %c[rdx](%[svm]), %%" _ASM_DX " \n\t"
		"mov %c[rsi](%[svm]), %%" _ASM_SI " \n\t"
		"mov %c[rdi](%[svm]), %%" _ASM_DI " \n\t"
		"mov %c[rbp](%[svm]), %%" _ASM_BP " \n\t"
4872
#ifdef CONFIG_X86_64
R
Rusty Russell 已提交
4873 4874 4875 4876 4877 4878 4879 4880
		"mov %c[r8](%[svm]),  %%r8  \n\t"
		"mov %c[r9](%[svm]),  %%r9  \n\t"
		"mov %c[r10](%[svm]), %%r10 \n\t"
		"mov %c[r11](%[svm]), %%r11 \n\t"
		"mov %c[r12](%[svm]), %%r12 \n\t"
		"mov %c[r13](%[svm]), %%r13 \n\t"
		"mov %c[r14](%[svm]), %%r14 \n\t"
		"mov %c[r15](%[svm]), %%r15 \n\t"
A
Avi Kivity 已提交
4881 4882 4883
#endif

		/* Enter guest mode */
A
Avi Kivity 已提交
4884 4885
		"push %%" _ASM_AX " \n\t"
		"mov %c[vmcb](%[svm]), %%" _ASM_AX " \n\t"
4886 4887 4888
		__ex(SVM_VMLOAD) "\n\t"
		__ex(SVM_VMRUN) "\n\t"
		__ex(SVM_VMSAVE) "\n\t"
A
Avi Kivity 已提交
4889
		"pop %%" _ASM_AX " \n\t"
A
Avi Kivity 已提交
4890 4891

		/* Save guest registers, load host registers */
A
Avi Kivity 已提交
4892 4893 4894 4895 4896 4897
		"mov %%" _ASM_BX ", %c[rbx](%[svm]) \n\t"
		"mov %%" _ASM_CX ", %c[rcx](%[svm]) \n\t"
		"mov %%" _ASM_DX ", %c[rdx](%[svm]) \n\t"
		"mov %%" _ASM_SI ", %c[rsi](%[svm]) \n\t"
		"mov %%" _ASM_DI ", %c[rdi](%[svm]) \n\t"
		"mov %%" _ASM_BP ", %c[rbp](%[svm]) \n\t"
4898
#ifdef CONFIG_X86_64
R
Rusty Russell 已提交
4899 4900 4901 4902 4903 4904 4905 4906
		"mov %%r8,  %c[r8](%[svm]) \n\t"
		"mov %%r9,  %c[r9](%[svm]) \n\t"
		"mov %%r10, %c[r10](%[svm]) \n\t"
		"mov %%r11, %c[r11](%[svm]) \n\t"
		"mov %%r12, %c[r12](%[svm]) \n\t"
		"mov %%r13, %c[r13](%[svm]) \n\t"
		"mov %%r14, %c[r14](%[svm]) \n\t"
		"mov %%r15, %c[r15](%[svm]) \n\t"
A
Avi Kivity 已提交
4907
#endif
A
Avi Kivity 已提交
4908
		"pop %%" _ASM_BP
A
Avi Kivity 已提交
4909
		:
R
Rusty Russell 已提交
4910
		: [svm]"a"(svm),
A
Avi Kivity 已提交
4911
		  [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
4912 4913 4914 4915 4916 4917
		  [rbx]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RBX])),
		  [rcx]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RCX])),
		  [rdx]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RDX])),
		  [rsi]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RSI])),
		  [rdi]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RDI])),
		  [rbp]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_RBP]))
4918
#ifdef CONFIG_X86_64
4919 4920 4921 4922 4923 4924 4925 4926
		  , [r8]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R8])),
		  [r9]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R9])),
		  [r10]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R10])),
		  [r11]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R11])),
		  [r12]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R12])),
		  [r13]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R13])),
		  [r14]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R14])),
		  [r15]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R15]))
A
Avi Kivity 已提交
4927
#endif
4928 4929
		: "cc", "memory"
#ifdef CONFIG_X86_64
A
Avi Kivity 已提交
4930
		, "rbx", "rcx", "rdx", "rsi", "rdi"
4931
		, "r8", "r9", "r10", "r11" , "r12", "r13", "r14", "r15"
A
Avi Kivity 已提交
4932 4933
#else
		, "ebx", "ecx", "edx", "esi", "edi"
4934 4935
#endif
		);
A
Avi Kivity 已提交
4936

4937 4938 4939
#ifdef CONFIG_X86_64
	wrmsrl(MSR_GS_BASE, svm->host.gs_base);
#else
4940
	loadsegment(fs, svm->host.fs);
4941 4942 4943
#ifndef CONFIG_X86_32_LAZY_GS
	loadsegment(gs, svm->host.gs);
#endif
4944
#endif
A
Avi Kivity 已提交
4945 4946 4947

	reload_tss(vcpu);

4948 4949
	local_irq_disable();

4950 4951 4952 4953 4954
	vcpu->arch.cr2 = svm->vmcb->save.cr2;
	vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
	vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
	vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;

4955 4956 4957 4958 4959 4960 4961 4962 4963 4964
	if (unlikely(svm->vmcb->control.exit_code == SVM_EXIT_NMI))
		kvm_before_handle_nmi(&svm->vcpu);

	stgi();

	/* Any pending NMI will happen here */

	if (unlikely(svm->vmcb->control.exit_code == SVM_EXIT_NMI))
		kvm_after_handle_nmi(&svm->vcpu);

4965 4966
	sync_cr8_to_lapic(vcpu);

4967
	svm->next_rip = 0;
4968

4969 4970
	svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;

G
Gleb Natapov 已提交
4971 4972
	/* if exit due to PF check for async PF */
	if (svm->vmcb->control.exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR)
4973
		svm->vcpu.arch.apf.host_apf_reason = kvm_read_and_reset_pf_reason();
G
Gleb Natapov 已提交
4974

A
Avi Kivity 已提交
4975 4976 4977 4978
	if (npt_enabled) {
		vcpu->arch.regs_avail &= ~(1 << VCPU_EXREG_PDPTR);
		vcpu->arch.regs_dirty &= ~(1 << VCPU_EXREG_PDPTR);
	}
4979 4980 4981 4982 4983 4984 4985 4986

	/*
	 * We need to handle MC intercepts here before the vcpu has a chance to
	 * change the physical cpu
	 */
	if (unlikely(svm->vmcb->control.exit_code ==
		     SVM_EXIT_EXCP_BASE + MC_VECTOR))
		svm_handle_mce(svm);
4987 4988

	mark_all_clean(svm->vmcb);
A
Avi Kivity 已提交
4989
}
4990
STACK_FRAME_NON_STANDARD(svm_vcpu_run);
A
Avi Kivity 已提交
4991 4992 4993

static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
{
4994 4995 4996
	struct vcpu_svm *svm = to_svm(vcpu);

	svm->vmcb->save.cr3 = root;
4997
	mark_dirty(svm->vmcb, VMCB_CR);
4998
	svm_flush_tlb(vcpu);
A
Avi Kivity 已提交
4999 5000
}

5001 5002 5003 5004 5005
static void set_tdp_cr3(struct kvm_vcpu *vcpu, unsigned long root)
{
	struct vcpu_svm *svm = to_svm(vcpu);

	svm->vmcb->control.nested_cr3 = root;
5006
	mark_dirty(svm->vmcb, VMCB_NPT);
5007 5008

	/* Also sync guest cr3 here in case we live migrate */
5009
	svm->vmcb->save.cr3 = kvm_read_cr3(vcpu);
5010
	mark_dirty(svm->vmcb, VMCB_CR);
5011

5012
	svm_flush_tlb(vcpu);
5013 5014
}

A
Avi Kivity 已提交
5015 5016
static int is_disabled(void)
{
5017 5018 5019 5020 5021 5022
	u64 vm_cr;

	rdmsrl(MSR_VM_CR, vm_cr);
	if (vm_cr & (1 << SVM_VM_CR_SVM_DISABLE))
		return 1;

A
Avi Kivity 已提交
5023 5024 5025
	return 0;
}

I
Ingo Molnar 已提交
5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036
static void
svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
{
	/*
	 * Patch in the VMMCALL instruction:
	 */
	hypercall[0] = 0x0f;
	hypercall[1] = 0x01;
	hypercall[2] = 0xd9;
}

Y
Yang, Sheng 已提交
5037 5038 5039 5040 5041
static void svm_check_processor_compat(void *rtn)
{
	*(int *)rtn = 0;
}

5042 5043 5044 5045 5046
static bool svm_cpu_has_accelerated_tpr(void)
{
	return false;
}

5047 5048 5049 5050 5051
static bool svm_has_high_real_mode_segbase(void)
{
	return true;
}

5052 5053 5054 5055 5056
static u64 svm_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
{
	return 0;
}

5057 5058
static void svm_cpuid_update(struct kvm_vcpu *vcpu)
{
5059 5060 5061
	struct vcpu_svm *svm = to_svm(vcpu);

	/* Update nrips enabled cache */
5062
	svm->nrips_enabled = !!guest_cpuid_has(&svm->vcpu, X86_FEATURE_NRIPS);
5063 5064 5065 5066

	if (!kvm_vcpu_apicv_active(vcpu))
		return;

5067
	guest_cpuid_clear(vcpu, X86_FEATURE_X2APIC);
5068 5069
}

5070 5071
static void svm_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry)
{
5072
	switch (func) {
5073 5074 5075 5076
	case 0x1:
		if (avic)
			entry->ecx &= ~bit(X86_FEATURE_X2APIC);
		break;
5077 5078 5079 5080
	case 0x80000001:
		if (nested)
			entry->ecx |= (1 << 2); /* Set SVM bit */
		break;
5081 5082 5083 5084 5085
	case 0x8000000A:
		entry->eax = 1; /* SVM revision 1 */
		entry->ebx = 8; /* Lets support 8 ASIDs in case we add proper
				   ASID emulation to nested SVM */
		entry->ecx = 0; /* Reserved */
5086 5087 5088 5089
		entry->edx = 0; /* Per default do not support any
				   additional features */

		/* Support next_rip if host supports it */
5090
		if (boot_cpu_has(X86_FEATURE_NRIPS))
5091
			entry->edx |= SVM_FEATURE_NRIP;
5092

5093 5094 5095 5096
		/* Support NPT for the guest if enabled */
		if (npt_enabled)
			entry->edx |= SVM_FEATURE_NPT;

5097 5098
		break;
	}
5099 5100
}

5101
static int svm_get_lpage_level(void)
5102
{
5103
	return PT_PDPE_LEVEL;
5104 5105
}

5106 5107
static bool svm_rdtscp_supported(void)
{
P
Paolo Bonzini 已提交
5108
	return boot_cpu_has(X86_FEATURE_RDTSCP);
5109 5110
}

5111 5112 5113 5114 5115
static bool svm_invpcid_supported(void)
{
	return false;
}

5116 5117 5118 5119 5120
static bool svm_mpx_supported(void)
{
	return false;
}

5121 5122 5123 5124 5125
static bool svm_xsaves_supported(void)
{
	return false;
}

5126 5127 5128 5129 5130
static bool svm_has_wbinvd_exit(void)
{
	return true;
}

5131
#define PRE_EX(exit)  { .exit_code = (exit), \
5132
			.stage = X86_ICPT_PRE_EXCEPT, }
5133
#define POST_EX(exit) { .exit_code = (exit), \
5134
			.stage = X86_ICPT_POST_EXCEPT, }
5135
#define POST_MEM(exit) { .exit_code = (exit), \
5136
			.stage = X86_ICPT_POST_MEMACCESS, }
5137

5138
static const struct __x86_intercept {
5139 5140 5141 5142 5143 5144 5145 5146
	u32 exit_code;
	enum x86_intercept_stage stage;
} x86_intercept_map[] = {
	[x86_intercept_cr_read]		= POST_EX(SVM_EXIT_READ_CR0),
	[x86_intercept_cr_write]	= POST_EX(SVM_EXIT_WRITE_CR0),
	[x86_intercept_clts]		= POST_EX(SVM_EXIT_WRITE_CR0),
	[x86_intercept_lmsw]		= POST_EX(SVM_EXIT_WRITE_CR0),
	[x86_intercept_smsw]		= POST_EX(SVM_EXIT_READ_CR0),
5147 5148
	[x86_intercept_dr_read]		= POST_EX(SVM_EXIT_READ_DR0),
	[x86_intercept_dr_write]	= POST_EX(SVM_EXIT_WRITE_DR0),
5149 5150 5151 5152 5153 5154 5155 5156
	[x86_intercept_sldt]		= POST_EX(SVM_EXIT_LDTR_READ),
	[x86_intercept_str]		= POST_EX(SVM_EXIT_TR_READ),
	[x86_intercept_lldt]		= POST_EX(SVM_EXIT_LDTR_WRITE),
	[x86_intercept_ltr]		= POST_EX(SVM_EXIT_TR_WRITE),
	[x86_intercept_sgdt]		= POST_EX(SVM_EXIT_GDTR_READ),
	[x86_intercept_sidt]		= POST_EX(SVM_EXIT_IDTR_READ),
	[x86_intercept_lgdt]		= POST_EX(SVM_EXIT_GDTR_WRITE),
	[x86_intercept_lidt]		= POST_EX(SVM_EXIT_IDTR_WRITE),
5157 5158 5159 5160 5161 5162 5163 5164
	[x86_intercept_vmrun]		= POST_EX(SVM_EXIT_VMRUN),
	[x86_intercept_vmmcall]		= POST_EX(SVM_EXIT_VMMCALL),
	[x86_intercept_vmload]		= POST_EX(SVM_EXIT_VMLOAD),
	[x86_intercept_vmsave]		= POST_EX(SVM_EXIT_VMSAVE),
	[x86_intercept_stgi]		= POST_EX(SVM_EXIT_STGI),
	[x86_intercept_clgi]		= POST_EX(SVM_EXIT_CLGI),
	[x86_intercept_skinit]		= POST_EX(SVM_EXIT_SKINIT),
	[x86_intercept_invlpga]		= POST_EX(SVM_EXIT_INVLPGA),
5165 5166 5167
	[x86_intercept_rdtscp]		= POST_EX(SVM_EXIT_RDTSCP),
	[x86_intercept_monitor]		= POST_MEM(SVM_EXIT_MONITOR),
	[x86_intercept_mwait]		= POST_EX(SVM_EXIT_MWAIT),
5168 5169 5170 5171 5172 5173 5174 5175 5176
	[x86_intercept_invlpg]		= POST_EX(SVM_EXIT_INVLPG),
	[x86_intercept_invd]		= POST_EX(SVM_EXIT_INVD),
	[x86_intercept_wbinvd]		= POST_EX(SVM_EXIT_WBINVD),
	[x86_intercept_wrmsr]		= POST_EX(SVM_EXIT_MSR),
	[x86_intercept_rdtsc]		= POST_EX(SVM_EXIT_RDTSC),
	[x86_intercept_rdmsr]		= POST_EX(SVM_EXIT_MSR),
	[x86_intercept_rdpmc]		= POST_EX(SVM_EXIT_RDPMC),
	[x86_intercept_cpuid]		= PRE_EX(SVM_EXIT_CPUID),
	[x86_intercept_rsm]		= PRE_EX(SVM_EXIT_RSM),
5177 5178 5179 5180 5181 5182 5183
	[x86_intercept_pause]		= PRE_EX(SVM_EXIT_PAUSE),
	[x86_intercept_pushf]		= PRE_EX(SVM_EXIT_PUSHF),
	[x86_intercept_popf]		= PRE_EX(SVM_EXIT_POPF),
	[x86_intercept_intn]		= PRE_EX(SVM_EXIT_SWINT),
	[x86_intercept_iret]		= PRE_EX(SVM_EXIT_IRET),
	[x86_intercept_icebp]		= PRE_EX(SVM_EXIT_ICEBP),
	[x86_intercept_hlt]		= POST_EX(SVM_EXIT_HLT),
5184 5185 5186 5187
	[x86_intercept_in]		= POST_EX(SVM_EXIT_IOIO),
	[x86_intercept_ins]		= POST_EX(SVM_EXIT_IOIO),
	[x86_intercept_out]		= POST_EX(SVM_EXIT_IOIO),
	[x86_intercept_outs]		= POST_EX(SVM_EXIT_IOIO),
5188 5189
};

5190
#undef PRE_EX
5191
#undef POST_EX
5192
#undef POST_MEM
5193

5194 5195 5196 5197
static int svm_check_intercept(struct kvm_vcpu *vcpu,
			       struct x86_instruction_info *info,
			       enum x86_intercept_stage stage)
{
5198 5199 5200 5201 5202 5203 5204 5205 5206 5207
	struct vcpu_svm *svm = to_svm(vcpu);
	int vmexit, ret = X86EMUL_CONTINUE;
	struct __x86_intercept icpt_info;
	struct vmcb *vmcb = svm->vmcb;

	if (info->intercept >= ARRAY_SIZE(x86_intercept_map))
		goto out;

	icpt_info = x86_intercept_map[info->intercept];

5208
	if (stage != icpt_info.stage)
5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222
		goto out;

	switch (icpt_info.exit_code) {
	case SVM_EXIT_READ_CR0:
		if (info->intercept == x86_intercept_cr_read)
			icpt_info.exit_code += info->modrm_reg;
		break;
	case SVM_EXIT_WRITE_CR0: {
		unsigned long cr0, val;
		u64 intercept;

		if (info->intercept == x86_intercept_cr_write)
			icpt_info.exit_code += info->modrm_reg;

5223 5224
		if (icpt_info.exit_code != SVM_EXIT_WRITE_CR0 ||
		    info->intercept == x86_intercept_clts)
5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247
			break;

		intercept = svm->nested.intercept;

		if (!(intercept & (1ULL << INTERCEPT_SELECTIVE_CR0)))
			break;

		cr0 = vcpu->arch.cr0 & ~SVM_CR0_SELECTIVE_MASK;
		val = info->src_val  & ~SVM_CR0_SELECTIVE_MASK;

		if (info->intercept == x86_intercept_lmsw) {
			cr0 &= 0xfUL;
			val &= 0xfUL;
			/* lmsw can't clear PE - catch this here */
			if (cr0 & X86_CR0_PE)
				val |= X86_CR0_PE;
		}

		if (cr0 ^ val)
			icpt_info.exit_code = SVM_EXIT_CR0_SEL_WRITE;

		break;
	}
5248 5249 5250 5251
	case SVM_EXIT_READ_DR0:
	case SVM_EXIT_WRITE_DR0:
		icpt_info.exit_code += info->modrm_reg;
		break;
5252 5253 5254 5255 5256 5257
	case SVM_EXIT_MSR:
		if (info->intercept == x86_intercept_wrmsr)
			vmcb->control.exit_info_1 = 1;
		else
			vmcb->control.exit_info_1 = 0;
		break;
5258 5259 5260 5261 5262 5263 5264
	case SVM_EXIT_PAUSE:
		/*
		 * We get this for NOP only, but pause
		 * is rep not, check this here
		 */
		if (info->rep_prefix != REPE_PREFIX)
			goto out;
5265 5266 5267 5268 5269 5270
	case SVM_EXIT_IOIO: {
		u64 exit_info;
		u32 bytes;

		if (info->intercept == x86_intercept_in ||
		    info->intercept == x86_intercept_ins) {
5271 5272
			exit_info = ((info->src_val & 0xffff) << 16) |
				SVM_IOIO_TYPE_MASK;
5273
			bytes = info->dst_bytes;
5274
		} else {
5275
			exit_info = (info->dst_val & 0xffff) << 16;
5276
			bytes = info->src_bytes;
5277 5278 5279 5280 5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293 5294 5295 5296
		}

		if (info->intercept == x86_intercept_outs ||
		    info->intercept == x86_intercept_ins)
			exit_info |= SVM_IOIO_STR_MASK;

		if (info->rep_prefix)
			exit_info |= SVM_IOIO_REP_MASK;

		bytes = min(bytes, 4u);

		exit_info |= bytes << SVM_IOIO_SIZE_SHIFT;

		exit_info |= (u32)info->ad_bytes << (SVM_IOIO_ASIZE_SHIFT - 1);

		vmcb->control.exit_info_1 = exit_info;
		vmcb->control.exit_info_2 = info->next_rip;

		break;
	}
5297 5298 5299 5300
	default:
		break;
	}

5301 5302 5303
	/* TODO: Advertise NRIPS to guest hypervisor unconditionally */
	if (static_cpu_has(X86_FEATURE_NRIPS))
		vmcb->control.next_rip  = info->next_rip;
5304 5305 5306 5307 5308 5309 5310 5311
	vmcb->control.exit_code = icpt_info.exit_code;
	vmexit = nested_svm_exit_handled(svm);

	ret = (vmexit == NESTED_EXIT_DONE) ? X86EMUL_INTERCEPTED
					   : X86EMUL_CONTINUE;

out:
	return ret;
5312 5313
}

5314 5315 5316
static void svm_handle_external_intr(struct kvm_vcpu *vcpu)
{
	local_irq_enable();
P
Paolo Bonzini 已提交
5317 5318 5319 5320 5321 5322
	/*
	 * We must have an instruction with interrupts enabled, so
	 * the timer interrupt isn't delayed by the interrupt shadow.
	 */
	asm("nop");
	local_irq_disable();
5323 5324
}

5325 5326 5327 5328
static void svm_sched_in(struct kvm_vcpu *vcpu, int cpu)
{
}

5329 5330 5331 5332 5333 5334 5335 5336 5337
static inline void avic_post_state_restore(struct kvm_vcpu *vcpu)
{
	if (avic_handle_apic_id_update(vcpu) != 0)
		return;
	if (avic_handle_dfr_update(vcpu) != 0)
		return;
	avic_handle_ldr_update(vcpu);
}

5338 5339 5340 5341 5342 5343
static void svm_setup_mce(struct kvm_vcpu *vcpu)
{
	/* [63:9] are reserved. */
	vcpu->arch.mcg_cap &= 0x1ff;
}

5344
static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
A
Avi Kivity 已提交
5345 5346 5347 5348
	.cpu_has_kvm_support = has_svm,
	.disabled_by_bios = is_disabled,
	.hardware_setup = svm_hardware_setup,
	.hardware_unsetup = svm_hardware_unsetup,
Y
Yang, Sheng 已提交
5349
	.check_processor_compatibility = svm_check_processor_compat,
A
Avi Kivity 已提交
5350 5351
	.hardware_enable = svm_hardware_enable,
	.hardware_disable = svm_hardware_disable,
5352
	.cpu_has_accelerated_tpr = svm_cpu_has_accelerated_tpr,
5353
	.cpu_has_high_real_mode_segbase = svm_has_high_real_mode_segbase,
A
Avi Kivity 已提交
5354 5355 5356

	.vcpu_create = svm_create_vcpu,
	.vcpu_free = svm_free_vcpu,
5357
	.vcpu_reset = svm_vcpu_reset,
A
Avi Kivity 已提交
5358

5359 5360 5361
	.vm_init = avic_vm_init,
	.vm_destroy = avic_vm_destroy,

5362
	.prepare_guest_switch = svm_prepare_guest_switch,
A
Avi Kivity 已提交
5363 5364
	.vcpu_load = svm_vcpu_load,
	.vcpu_put = svm_vcpu_put,
5365 5366
	.vcpu_blocking = svm_vcpu_blocking,
	.vcpu_unblocking = svm_vcpu_unblocking,
A
Avi Kivity 已提交
5367

5368
	.update_bp_intercept = update_bp_intercept,
A
Avi Kivity 已提交
5369 5370 5371 5372 5373
	.get_msr = svm_get_msr,
	.set_msr = svm_set_msr,
	.get_segment_base = svm_get_segment_base,
	.get_segment = svm_get_segment,
	.set_segment = svm_set_segment,
5374
	.get_cpl = svm_get_cpl,
5375
	.get_cs_db_l_bits = kvm_get_cs_db_l_bits,
5376
	.decache_cr0_guest_bits = svm_decache_cr0_guest_bits,
5377
	.decache_cr3 = svm_decache_cr3,
5378
	.decache_cr4_guest_bits = svm_decache_cr4_guest_bits,
A
Avi Kivity 已提交
5379 5380 5381 5382 5383 5384 5385 5386
	.set_cr0 = svm_set_cr0,
	.set_cr3 = svm_set_cr3,
	.set_cr4 = svm_set_cr4,
	.set_efer = svm_set_efer,
	.get_idt = svm_get_idt,
	.set_idt = svm_set_idt,
	.get_gdt = svm_get_gdt,
	.set_gdt = svm_set_gdt,
J
Jan Kiszka 已提交
5387 5388
	.get_dr6 = svm_get_dr6,
	.set_dr6 = svm_set_dr6,
5389
	.set_dr7 = svm_set_dr7,
5390
	.sync_dirty_debug_regs = svm_sync_dirty_debug_regs,
A
Avi Kivity 已提交
5391
	.cache_reg = svm_cache_reg,
A
Avi Kivity 已提交
5392 5393
	.get_rflags = svm_get_rflags,
	.set_rflags = svm_set_rflags,
5394 5395 5396

	.get_pkru = svm_get_pkru,

A
Avi Kivity 已提交
5397 5398 5399
	.tlb_flush = svm_flush_tlb,

	.run = svm_vcpu_run,
5400
	.handle_exit = handle_exit,
A
Avi Kivity 已提交
5401
	.skip_emulated_instruction = skip_emulated_instruction,
5402 5403
	.set_interrupt_shadow = svm_set_interrupt_shadow,
	.get_interrupt_shadow = svm_get_interrupt_shadow,
I
Ingo Molnar 已提交
5404
	.patch_hypercall = svm_patch_hypercall,
E
Eddie Dong 已提交
5405
	.set_irq = svm_set_irq,
5406
	.set_nmi = svm_inject_nmi,
5407
	.queue_exception = svm_queue_exception,
A
Avi Kivity 已提交
5408
	.cancel_injection = svm_cancel_injection,
5409
	.interrupt_allowed = svm_interrupt_allowed,
5410
	.nmi_allowed = svm_nmi_allowed,
J
Jan Kiszka 已提交
5411 5412
	.get_nmi_mask = svm_get_nmi_mask,
	.set_nmi_mask = svm_set_nmi_mask,
5413 5414 5415
	.enable_nmi_window = enable_nmi_window,
	.enable_irq_window = enable_irq_window,
	.update_cr8_intercept = update_cr8_intercept,
5416
	.set_virtual_x2apic_mode = svm_set_virtual_x2apic_mode,
5417 5418
	.get_enable_apicv = svm_get_enable_apicv,
	.refresh_apicv_exec_ctrl = svm_refresh_apicv_exec_ctrl,
5419
	.load_eoi_exitmap = svm_load_eoi_exitmap,
5420 5421
	.hwapic_irr_update = svm_hwapic_irr_update,
	.hwapic_isr_update = svm_hwapic_isr_update,
5422
	.apicv_post_state_restore = avic_post_state_restore,
5423 5424

	.set_tss_addr = svm_set_tss_addr,
5425
	.get_tdp_level = get_npt_level,
5426
	.get_mt_mask = svm_get_mt_mask,
5427

5428 5429
	.get_exit_info = svm_get_exit_info,

5430
	.get_lpage_level = svm_get_lpage_level,
5431 5432

	.cpuid_update = svm_cpuid_update,
5433 5434

	.rdtscp_supported = svm_rdtscp_supported,
5435
	.invpcid_supported = svm_invpcid_supported,
5436
	.mpx_supported = svm_mpx_supported,
5437
	.xsaves_supported = svm_xsaves_supported,
5438 5439

	.set_supported_cpuid = svm_set_supported_cpuid,
5440 5441

	.has_wbinvd_exit = svm_has_wbinvd_exit,
5442 5443

	.write_tsc_offset = svm_write_tsc_offset,
5444 5445

	.set_tdp_cr3 = set_tdp_cr3,
5446 5447

	.check_intercept = svm_check_intercept,
5448
	.handle_external_intr = svm_handle_external_intr,
5449 5450

	.sched_in = svm_sched_in,
5451 5452

	.pmu_ops = &amd_pmu_ops,
5453
	.deliver_posted_interrupt = svm_deliver_avic_intr,
5454
	.update_pi_irte = svm_update_pi_irte,
5455
	.setup_mce = svm_setup_mce,
A
Avi Kivity 已提交
5456 5457 5458 5459
};

static int __init svm_init(void)
{
5460
	return kvm_init(&svm_x86_ops, sizeof(struct vcpu_svm),
5461
			__alignof__(struct vcpu_svm), THIS_MODULE);
A
Avi Kivity 已提交
5462 5463 5464 5465
}

static void __exit svm_exit(void)
{
5466
	kvm_exit();
A
Avi Kivity 已提交
5467 5468 5469 5470
}

module_init(svm_init)
module_exit(svm_exit)