exynos4.dtsi 12.0 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
/*
 * Samsung's Exynos4 SoC series common device tree source
 *
 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 * Copyright (c) 2010-2011 Linaro Ltd.
 *		www.linaro.org
 *
 * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
 * SoCs from Exynos4 series can include this file and provide values for SoCs
 * specfic bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
 * nodes can be added to this file.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

22
#include "skeleton.dtsi"
23 24 25 26 27 28 29 30

/ {
	interrupt-parent = <&gic>;

	aliases {
		spi0 = &spi_0;
		spi1 = &spi_1;
		spi2 = &spi_2;
31 32 33 34 35 36 37 38
		i2c0 = &i2c_0;
		i2c1 = &i2c_1;
		i2c2 = &i2c_2;
		i2c3 = &i2c_3;
		i2c4 = &i2c_4;
		i2c5 = &i2c_5;
		i2c6 = &i2c_6;
		i2c7 = &i2c_7;
39 40 41 42 43 44
		csis0 = &csis_0;
		csis1 = &csis_1;
		fimc0 = &fimc_0;
		fimc1 = &fimc_1;
		fimc2 = &fimc_2;
		fimc3 = &fimc_3;
45 46
	};

47 48 49 50 51
	chipid@10000000 {
		compatible = "samsung,exynos4210-chipid";
		reg = <0x10000000 0x100>;
	};

52 53 54 55 56 57
	mipi_phy: video-phy@10020710 {
		compatible = "samsung,s5pv210-mipi-video-phy";
		reg = <0x10020710 8>;
		#phy-cells = <1>;
	};

58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
	pd_mfc: mfc-power-domain@10023C40 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C40 0x20>;
	};

	pd_g3d: g3d-power-domain@10023C60 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C60 0x20>;
	};

	pd_lcd0: lcd0-power-domain@10023C80 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C80 0x20>;
	};

	pd_tv: tv-power-domain@10023C20 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C20 0x20>;
	};

	pd_cam: cam-power-domain@10023C00 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C00 0x20>;
	};

	pd_gps: gps-power-domain@10023CE0 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023CE0 0x20>;
86 87
	};

88
	gic: interrupt-controller@10490000 {
89 90 91 92 93 94
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x10490000 0x1000>, <0x10480000 0x100>;
	};

95
	combiner: interrupt-controller@10440000 {
96 97 98 99 100 101
		compatible = "samsung,exynos4210-combiner";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0x10440000 0x1000>;
	};

102
	sys_reg: syscon@10010000 {
103 104 105 106
		compatible = "samsung,exynos4-sysreg", "syscon";
		reg = <0x10010000 0x400>;
	};

107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169
	camera {
		compatible = "samsung,fimc", "simple-bus";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		clock_cam: clock-controller {
			 #clock-cells = <1>;
		};

		fimc_0: fimc@11800000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11800000 0x1000>;
			interrupts = <0 84 0>;
			clocks = <&clock 256>, <&clock 128>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_1: fimc@11810000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11810000 0x1000>;
			interrupts = <0 85 0>;
			clocks = <&clock 257>, <&clock 129>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_2: fimc@11820000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11820000 0x1000>;
			interrupts = <0 86 0>;
			clocks = <&clock 258>, <&clock 130>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_3: fimc@11830000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11830000 0x1000>;
			interrupts = <0 87 0>;
			clocks = <&clock 259>, <&clock 131>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		csis_0: csis@11880000 {
			compatible = "samsung,exynos4210-csis";
			reg = <0x11880000 0x4000>;
			interrupts = <0 78 0>;
			clocks = <&clock 260>, <&clock 134>;
			clock-names = "csis", "sclk_csis";
			bus-width = <4>;
			samsung,power-domain = <&pd_cam>;
170 171
			phys = <&mipi_phy 0>;
			phy-names = "csis";
172 173 174 175 176 177 178 179 180 181 182 183 184
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		csis_1: csis@11890000 {
			compatible = "samsung,exynos4210-csis";
			reg = <0x11890000 0x4000>;
			interrupts = <0 80 0>;
			clocks = <&clock 261>, <&clock 135>;
			clock-names = "csis", "sclk_csis";
			bus-width = <2>;
			samsung,power-domain = <&pd_cam>;
185 186
			phys = <&mipi_phy 2>;
			phy-names = "csis";
187 188 189 190 191 192
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

193 194 195 196
	watchdog@10060000 {
		compatible = "samsung,s3c2410-wdt";
		reg = <0x10060000 0x100>;
		interrupts = <0 43 0>;
197 198
		clocks = <&clock 345>;
		clock-names = "watchdog";
199
		status = "disabled";
200 201 202 203 204 205
	};

	rtc@10070000 {
		compatible = "samsung,s3c6410-rtc";
		reg = <0x10070000 0x100>;
		interrupts = <0 44 0>, <0 45 0>;
206 207
		clocks = <&clock 346>;
		clock-names = "rtc";
208
		status = "disabled";
209 210 211 212 213 214
	};

	keypad@100A0000 {
		compatible = "samsung,s5pv210-keypad";
		reg = <0x100A0000 0x100>;
		interrupts = <0 109 0>;
215 216
		clocks = <&clock 347>;
		clock-names = "keypad";
217
		status = "disabled";
218 219 220 221 222 223
	};

	sdhci@12510000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12510000 0x100>;
		interrupts = <0 73 0>;
224 225
		clocks = <&clock 297>, <&clock 145>;
		clock-names = "hsmmc", "mmc_busclk.2";
226
		status = "disabled";
227 228 229 230 231 232
	};

	sdhci@12520000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12520000 0x100>;
		interrupts = <0 74 0>;
233 234
		clocks = <&clock 298>, <&clock 146>;
		clock-names = "hsmmc", "mmc_busclk.2";
235
		status = "disabled";
236 237 238 239 240 241
	};

	sdhci@12530000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12530000 0x100>;
		interrupts = <0 75 0>;
242 243
		clocks = <&clock 299>, <&clock 147>;
		clock-names = "hsmmc", "mmc_busclk.2";
244
		status = "disabled";
245 246 247 248 249 250
	};

	sdhci@12540000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12540000 0x100>;
		interrupts = <0 76 0>;
251 252
		clocks = <&clock 300>, <&clock 148>;
		clock-names = "hsmmc", "mmc_busclk.2";
253
		status = "disabled";
254 255
	};

256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273
	ehci@12580000 {
		compatible = "samsung,exynos4210-ehci";
		reg = <0x12580000 0x100>;
		interrupts = <0 70 0>;
		clocks = <&clock 304>;
		clock-names = "usbhost";
		status = "disabled";
	};

	ohci@12590000 {
		compatible = "samsung,exynos4210-ohci";
		reg = <0x12590000 0x100>;
		interrupts = <0 70 0>;
		clocks = <&clock 304>;
		clock-names = "usbhost";
		status = "disabled";
	};

274 275 276 277 278
	mfc: codec@13400000 {
		compatible = "samsung,mfc-v5";
		reg = <0x13400000 0x10000>;
		interrupts = <0 94 0>;
		samsung,power-domain = <&pd_mfc>;
279 280
		clocks = <&clock 273>;
		clock-names = "mfc";
281 282 283
		status = "disabled";
	};

284 285 286 287
	serial@13800000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13800000 0x100>;
		interrupts = <0 52 0>;
288 289
		clocks = <&clock 312>, <&clock 151>;
		clock-names = "uart", "clk_uart_baud0";
290
		status = "disabled";
291 292 293 294 295 296
	};

	serial@13810000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13810000 0x100>;
		interrupts = <0 53 0>;
297 298
		clocks = <&clock 313>, <&clock 152>;
		clock-names = "uart", "clk_uart_baud0";
299
		status = "disabled";
300 301 302 303 304 305
	};

	serial@13820000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13820000 0x100>;
		interrupts = <0 54 0>;
306 307
		clocks = <&clock 314>, <&clock 153>;
		clock-names = "uart", "clk_uart_baud0";
308
		status = "disabled";
309 310 311 312 313 314
	};

	serial@13830000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13830000 0x100>;
		interrupts = <0 55 0>;
315 316
		clocks = <&clock 315>, <&clock 154>;
		clock-names = "uart", "clk_uart_baud0";
317
		status = "disabled";
318 319
	};

320
	i2c_0: i2c@13860000 {
321 322
		#address-cells = <1>;
		#size-cells = <0>;
323 324 325
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13860000 0x100>;
		interrupts = <0 58 0>;
326 327
		clocks = <&clock 317>;
		clock-names = "i2c";
328 329
		pinctrl-names = "default";
		pinctrl-0 = <&i2c0_bus>;
330
		status = "disabled";
331 332
	};

333
	i2c_1: i2c@13870000 {
334 335
		#address-cells = <1>;
		#size-cells = <0>;
336 337 338
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13870000 0x100>;
		interrupts = <0 59 0>;
339 340
		clocks = <&clock 318>;
		clock-names = "i2c";
341 342
		pinctrl-names = "default";
		pinctrl-0 = <&i2c1_bus>;
343
		status = "disabled";
344 345
	};

346
	i2c_2: i2c@13880000 {
347 348
		#address-cells = <1>;
		#size-cells = <0>;
349 350 351
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13880000 0x100>;
		interrupts = <0 60 0>;
352 353
		clocks = <&clock 319>;
		clock-names = "i2c";
354
		status = "disabled";
355 356
	};

357
	i2c_3: i2c@13890000 {
358 359
		#address-cells = <1>;
		#size-cells = <0>;
360 361 362
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13890000 0x100>;
		interrupts = <0 61 0>;
363 364
		clocks = <&clock 320>;
		clock-names = "i2c";
365
		status = "disabled";
366 367
	};

368
	i2c_4: i2c@138A0000 {
369 370
		#address-cells = <1>;
		#size-cells = <0>;
371 372 373
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138A0000 0x100>;
		interrupts = <0 62 0>;
374 375
		clocks = <&clock 321>;
		clock-names = "i2c";
376
		status = "disabled";
377 378
	};

379
	i2c_5: i2c@138B0000 {
380 381
		#address-cells = <1>;
		#size-cells = <0>;
382 383 384
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138B0000 0x100>;
		interrupts = <0 63 0>;
385 386
		clocks = <&clock 322>;
		clock-names = "i2c";
387
		status = "disabled";
388 389
	};

390
	i2c_6: i2c@138C0000 {
391 392
		#address-cells = <1>;
		#size-cells = <0>;
393 394 395
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138C0000 0x100>;
		interrupts = <0 64 0>;
396 397
		clocks = <&clock 323>;
		clock-names = "i2c";
398
		status = "disabled";
399 400
	};

401
	i2c_7: i2c@138D0000 {
402 403
		#address-cells = <1>;
		#size-cells = <0>;
404 405 406
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138D0000 0x100>;
		interrupts = <0 65 0>;
407 408
		clocks = <&clock 324>;
		clock-names = "i2c";
409
		status = "disabled";
410 411 412 413 414 415
	};

	spi_0: spi@13920000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13920000 0x100>;
		interrupts = <0 66 0>;
416 417
		dmas = <&pdma0 7>, <&pdma0 6>;
		dma-names = "tx", "rx";
418 419
		#address-cells = <1>;
		#size-cells = <0>;
420 421
		clocks = <&clock 327>, <&clock 159>;
		clock-names = "spi", "spi_busclk0";
422 423
		pinctrl-names = "default";
		pinctrl-0 = <&spi0_bus>;
424
		status = "disabled";
425 426 427 428 429 430
	};

	spi_1: spi@13930000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13930000 0x100>;
		interrupts = <0 67 0>;
431 432
		dmas = <&pdma1 7>, <&pdma1 6>;
		dma-names = "tx", "rx";
433 434
		#address-cells = <1>;
		#size-cells = <0>;
435 436
		clocks = <&clock 328>, <&clock 160>;
		clock-names = "spi", "spi_busclk0";
437 438
		pinctrl-names = "default";
		pinctrl-0 = <&spi1_bus>;
439
		status = "disabled";
440 441 442 443 444 445
	};

	spi_2: spi@13940000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13940000 0x100>;
		interrupts = <0 68 0>;
446 447
		dmas = <&pdma0 9>, <&pdma0 8>;
		dma-names = "tx", "rx";
448 449
		#address-cells = <1>;
		#size-cells = <0>;
450 451
		clocks = <&clock 329>, <&clock 161>;
		clock-names = "spi", "spi_busclk0";
452 453
		pinctrl-names = "default";
		pinctrl-0 = <&spi2_bus>;
454
		status = "disabled";
455 456
	};

457 458 459 460
	pwm@139D0000 {
		compatible = "samsung,exynos4210-pwm";
		reg = <0x139D0000 0x1000>;
		interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
461 462
		clocks = <&clock 336>;
		clock-names = "timers";
463 464 465 466
		#pwm-cells = <2>;
		status = "disabled";
	};

467 468 469 470 471 472 473 474 475 476 477
	amba {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "arm,amba-bus";
		interrupt-parent = <&gic>;
		ranges;

		pdma0: pdma@12680000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12680000 0x1000>;
			interrupts = <0 35 0>;
478 479
			clocks = <&clock 292>;
			clock-names = "apb_pclk";
480 481 482
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
483 484 485 486 487 488
		};

		pdma1: pdma@12690000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12690000 0x1000>;
			interrupts = <0 36 0>;
489 490
			clocks = <&clock 293>;
			clock-names = "apb_pclk";
491 492 493
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
494
		};
495 496 497 498 499

		mdma1: mdma@12850000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12850000 0x1000>;
			interrupts = <0 34 0>;
500 501
			clocks = <&clock 279>;
			clock-names = "apb_pclk";
502 503 504
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
505
		};
506
	};
507 508 509 510 511 512 513 514 515 516 517 518

	fimd: fimd@11c00000 {
		compatible = "samsung,exynos4210-fimd";
		interrupt-parent = <&combiner>;
		reg = <0x11c00000 0x20000>;
		interrupt-names = "fifo", "vsync", "lcd_sys";
		interrupts = <11 0>, <11 1>, <11 2>;
		clocks = <&clock 140>, <&clock 283>;
		clock-names = "sclk_fimd", "fimd";
		samsung,power-domain = <&pd_lcd0>;
		status = "disabled";
	};
519
};