“466e6227e6a54d9b94b50972612fe8bf0450f786”上不存在“arch/arm/mach-at91/board-csb337.c”
mtd_dataflash.c 25.1 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
/*
 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
 *
 * Largely derived from at91_dataflash.c:
 *  Copyright (C) 2003-2005 SAN People (Pty) Ltd
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/device.h>
17
#include <linux/mutex.h>
18 19
#include <linux/err.h>

20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>

#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>


/*
 * DataFlash is a kind of SPI flash.  Most AT45 chips have two buffers in
 * each chip, which may be used for double buffered I/O; but this driver
 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
 *
 * Sometimes DataFlash is packaged in MMC-format cards, although the
 * MMC stack can't use SPI (yet), or distinguish between MMC and DataFlash
 * protocols during enumeration.
 */

#define CONFIG_DATAFLASH_WRITE_VERIFY

/* reads can bypass the buffers */
#define OP_READ_CONTINUOUS	0xE8
#define OP_READ_PAGE		0xD2

/* group B requests can run even while status reports "busy" */
#define OP_READ_STATUS		0xD7	/* group B */

/* move data between host and buffer */
#define OP_READ_BUFFER1		0xD4	/* group B */
#define OP_READ_BUFFER2		0xD6	/* group B */
#define OP_WRITE_BUFFER1	0x84	/* group B */
#define OP_WRITE_BUFFER2	0x87	/* group B */

/* erasing flash */
#define OP_ERASE_PAGE		0x81
#define OP_ERASE_BLOCK		0x50

/* move data between buffer and flash */
#define OP_TRANSFER_BUF1	0x53
#define OP_TRANSFER_BUF2	0x55
#define OP_MREAD_BUFFER1	0xD4
#define OP_MREAD_BUFFER2	0xD6
#define OP_MWERASE_BUFFER1	0x83
#define OP_MWERASE_BUFFER2	0x86
#define OP_MWRITE_BUFFER1	0x88	/* sector must be pre-erased */
#define OP_MWRITE_BUFFER2	0x89	/* sector must be pre-erased */

/* write to buffer, then write-erase to flash */
#define OP_PROGRAM_VIA_BUF1	0x82
#define OP_PROGRAM_VIA_BUF2	0x85

/* compare buffer to flash */
#define OP_COMPARE_BUF1		0x60
#define OP_COMPARE_BUF2		0x61

/* read flash to buffer, then write-erase to flash */
#define OP_REWRITE_VIA_BUF1	0x58
#define OP_REWRITE_VIA_BUF2	0x59

/* newer chips report JEDEC manufacturer and device IDs; chip
 * serial number and OTP bits; and per-sector writeprotect.
 */
#define OP_READ_ID		0x9F
#define OP_READ_SECURITY	0x77
D
David Brownell 已提交
83 84
#define OP_WRITE_SECURITY_REVC	0x9A
#define OP_WRITE_SECURITY	0x9B	/* revision D */
85 86 87


struct dataflash {
88
	uint8_t			command[4];
89 90 91 92 93 94 95
	char			name[24];

	unsigned		partitioned:1;

	unsigned short		page_offset;	/* offset in flash address */
	unsigned int		page_size;	/* of bytes per page */

96
	struct mutex		lock;
97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152
	struct spi_device	*spi;

	struct mtd_info		mtd;
};

#ifdef CONFIG_MTD_PARTITIONS
#define	mtd_has_partitions()	(1)
#else
#define	mtd_has_partitions()	(0)
#endif

/* ......................................................................... */

/*
 * Return the status of the DataFlash device.
 */
static inline int dataflash_status(struct spi_device *spi)
{
	/* NOTE:  at45db321c over 25 MHz wants to write
	 * a dummy byte after the opcode...
	 */
	return spi_w8r8(spi, OP_READ_STATUS);
}

/*
 * Poll the DataFlash device until it is READY.
 * This usually takes 5-20 msec or so; more for sector erase.
 */
static int dataflash_waitready(struct spi_device *spi)
{
	int	status;

	for (;;) {
		status = dataflash_status(spi);
		if (status < 0) {
			DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n",
					spi->dev.bus_id, status);
			status = 0;
		}

		if (status & (1 << 7))	/* RDY/nBSY */
			return status;

		msleep(3);
	}
}

/* ......................................................................... */

/*
 * Erase pages of flash.
 */
static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
{
	struct dataflash	*priv = (struct dataflash *)mtd->priv;
	struct spi_device	*spi = priv->spi;
153
	struct spi_transfer	x = { .tx_dma = 0, };
154 155
	struct spi_message	msg;
	unsigned		blocksize = priv->page_size << 3;
156
	uint8_t			*command;
157 158 159 160 161 162 163 164 165 166 167

	DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%x len 0x%x\n",
			spi->dev.bus_id,
			instr->addr, instr->len);

	/* Sanity checks */
	if ((instr->addr + instr->len) > mtd->size
			|| (instr->len % priv->page_size) != 0
			|| (instr->addr % priv->page_size) != 0)
		return -EINVAL;

168 169 170 171 172
	spi_message_init(&msg);

	x.tx_buf = command = priv->command;
	x.len = 4;
	spi_message_add_tail(&x, &msg);
173

174
	mutex_lock(&priv->lock);
175 176 177 178 179 180 181 182 183
	while (instr->len > 0) {
		unsigned int	pageaddr;
		int		status;
		int		do_block;

		/* Calculate flash page address; use block erase (for speed) if
		 * we're at a block boundary and need to erase the whole block.
		 */
		pageaddr = instr->addr / priv->page_size;
184
		do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
185 186 187
		pageaddr = pageaddr << priv->page_offset;

		command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
188 189
		command[1] = (uint8_t)(pageaddr >> 16);
		command[2] = (uint8_t)(pageaddr >> 8);
190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216
		command[3] = 0;

		DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n",
			do_block ? "block" : "page",
			command[0], command[1], command[2], command[3],
			pageaddr);

		status = spi_sync(spi, &msg);
		(void) dataflash_waitready(spi);

		if (status < 0) {
			printk(KERN_ERR "%s: erase %x, err %d\n",
				spi->dev.bus_id, pageaddr, status);
			/* REVISIT:  can retry instr->retries times; or
			 * giveup and instr->fail_addr = instr->addr;
			 */
			continue;
		}

		if (do_block) {
			instr->addr += blocksize;
			instr->len -= blocksize;
		} else {
			instr->addr += priv->page_size;
			instr->len -= priv->page_size;
		}
	}
217
	mutex_unlock(&priv->lock);
218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239

	/* Inform MTD subsystem that erase is complete */
	instr->state = MTD_ERASE_DONE;
	mtd_erase_callback(instr);

	return 0;
}

/*
 * Read from the DataFlash device.
 *   from   : Start offset in flash device
 *   len    : Amount to read
 *   retlen : About of data actually read
 *   buf    : Buffer containing the data
 */
static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
			       size_t *retlen, u_char *buf)
{
	struct dataflash	*priv = (struct dataflash *)mtd->priv;
	struct spi_transfer	x[2] = { { .tx_dma = 0, }, };
	struct spi_message	msg;
	unsigned int		addr;
240
	uint8_t			*command;
241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262
	int			status;

	DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n",
		priv->spi->dev.bus_id, (unsigned)from, (unsigned)(from + len));

	*retlen = 0;

	/* Sanity checks */
	if (!len)
		return 0;
	if (from + len > mtd->size)
		return -EINVAL;

	/* Calculate flash page/byte address */
	addr = (((unsigned)from / priv->page_size) << priv->page_offset)
		+ ((unsigned)from % priv->page_size);

	command = priv->command;

	DEBUG(MTD_DEBUG_LEVEL3, "READ: (%x) %x %x %x\n",
		command[0], command[1], command[2], command[3]);

263 264
	spi_message_init(&msg);

265 266
	x[0].tx_buf = command;
	x[0].len = 8;
267 268
	spi_message_add_tail(&x[0], &msg);

269 270
	x[1].rx_buf = buf;
	x[1].len = len;
271
	spi_message_add_tail(&x[1], &msg);
272

273
	mutex_lock(&priv->lock);
274 275 276 277 278 279

	/* Continuous read, max clock = f(car) which may be less than
	 * the peak rate available.  Some chips support commands with
	 * fewer "don't care" bytes.  Both buffers stay unchanged.
	 */
	command[0] = OP_READ_CONTINUOUS;
280 281 282
	command[1] = (uint8_t)(addr >> 16);
	command[2] = (uint8_t)(addr >> 8);
	command[3] = (uint8_t)(addr >> 0);
283 284 285
	/* plus 4 "don't care" bytes */

	status = spi_sync(priv->spi, &msg);
286
	mutex_unlock(&priv->lock);
287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316

	if (status >= 0) {
		*retlen = msg.actual_length - 8;
		status = 0;
	} else
		DEBUG(MTD_DEBUG_LEVEL1, "%s: read %x..%x --> %d\n",
			priv->spi->dev.bus_id,
			(unsigned)from, (unsigned)(from + len),
			status);
	return status;
}

/*
 * Write to the DataFlash device.
 *   to     : Start offset in flash device
 *   len    : Amount to write
 *   retlen : Amount of data actually written
 *   buf    : Buffer containing the data
 */
static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
				size_t * retlen, const u_char * buf)
{
	struct dataflash	*priv = (struct dataflash *)mtd->priv;
	struct spi_device	*spi = priv->spi;
	struct spi_transfer	x[2] = { { .tx_dma = 0, }, };
	struct spi_message	msg;
	unsigned int		pageaddr, addr, offset, writelen;
	size_t			remaining = len;
	u_char			*writebuf = (u_char *) buf;
	int			status = -EINVAL;
317
	uint8_t			*command;
318 319 320 321 322 323 324 325 326 327 328 329

	DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n",
		spi->dev.bus_id, (unsigned)to, (unsigned)(to + len));

	*retlen = 0;

	/* Sanity checks */
	if (!len)
		return 0;
	if ((to + len) > mtd->size)
		return -EINVAL;

330 331
	spi_message_init(&msg);

332 333
	x[0].tx_buf = command = priv->command;
	x[0].len = 4;
334
	spi_message_add_tail(&x[0], &msg);
335 336 337 338 339 340 341 342

	pageaddr = ((unsigned)to / priv->page_size);
	offset = ((unsigned)to % priv->page_size);
	if (offset + len > priv->page_size)
		writelen = priv->page_size - offset;
	else
		writelen = len;

343
	mutex_lock(&priv->lock);
344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395
	while (remaining > 0) {
		DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n",
			pageaddr, offset, writelen);

		/* REVISIT:
		 * (a) each page in a sector must be rewritten at least
		 *     once every 10K sibling erase/program operations.
		 * (b) for pages that are already erased, we could
		 *     use WRITE+MWRITE not PROGRAM for ~30% speedup.
		 * (c) WRITE to buffer could be done while waiting for
		 *     a previous MWRITE/MWERASE to complete ...
		 * (d) error handling here seems to be mostly missing.
		 *
		 * Two persistent bits per page, plus a per-sector counter,
		 * could support (a) and (b) ... we might consider using
		 * the second half of sector zero, which is just one block,
		 * to track that state.  (On AT91, that sector should also
		 * support boot-from-DataFlash.)
		 */

		addr = pageaddr << priv->page_offset;

		/* (1) Maybe transfer partial page to Buffer1 */
		if (writelen != priv->page_size) {
			command[0] = OP_TRANSFER_BUF1;
			command[1] = (addr & 0x00FF0000) >> 16;
			command[2] = (addr & 0x0000FF00) >> 8;
			command[3] = 0;

			DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n",
				command[0], command[1], command[2], command[3]);

			status = spi_sync(spi, &msg);
			if (status < 0)
				DEBUG(MTD_DEBUG_LEVEL1, "%s: xfer %u -> %d \n",
					spi->dev.bus_id, addr, status);

			(void) dataflash_waitready(priv->spi);
		}

		/* (2) Program full page via Buffer1 */
		addr += offset;
		command[0] = OP_PROGRAM_VIA_BUF1;
		command[1] = (addr & 0x00FF0000) >> 16;
		command[2] = (addr & 0x0000FF00) >> 8;
		command[3] = (addr & 0x000000FF);

		DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n",
			command[0], command[1], command[2], command[3]);

		x[1].tx_buf = writebuf;
		x[1].len = writelen;
396
		spi_message_add_tail(x + 1, &msg);
397
		status = spi_sync(spi, &msg);
398
		spi_transfer_del(x + 1);
399 400 401 402 403 404
		if (status < 0)
			DEBUG(MTD_DEBUG_LEVEL1, "%s: pgm %u/%u -> %d \n",
				spi->dev.bus_id, addr, writelen, status);

		(void) dataflash_waitready(priv->spi);

405

406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425
#ifdef	CONFIG_DATAFLASH_WRITE_VERIFY

		/* (3) Compare to Buffer1 */
		addr = pageaddr << priv->page_offset;
		command[0] = OP_COMPARE_BUF1;
		command[1] = (addr & 0x00FF0000) >> 16;
		command[2] = (addr & 0x0000FF00) >> 8;
		command[3] = 0;

		DEBUG(MTD_DEBUG_LEVEL3, "COMPARE: (%x) %x %x %x\n",
			command[0], command[1], command[2], command[3]);

		status = spi_sync(spi, &msg);
		if (status < 0)
			DEBUG(MTD_DEBUG_LEVEL1, "%s: compare %u -> %d \n",
				spi->dev.bus_id, addr, status);

		status = dataflash_waitready(priv->spi);

		/* Check result of the compare operation */
426
		if (status & (1 << 6)) {
427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447
			printk(KERN_ERR "%s: compare page %u, err %d\n",
				spi->dev.bus_id, pageaddr, status);
			remaining = 0;
			status = -EIO;
			break;
		} else
			status = 0;

#endif	/* CONFIG_DATAFLASH_WRITE_VERIFY */

		remaining = remaining - writelen;
		pageaddr++;
		offset = 0;
		writebuf += writelen;
		*retlen += writelen;

		if (remaining > priv->page_size)
			writelen = priv->page_size;
		else
			writelen = remaining;
	}
448
	mutex_unlock(&priv->lock);
449 450 451 452 453 454

	return status;
}

/* ......................................................................... */

D
David Brownell 已提交
455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620
#ifdef CONFIG_MTD_DATAFLASH_OTP

static int dataflash_get_otp_info(struct mtd_info *mtd,
		struct otp_info *info, size_t len)
{
	/* Report both blocks as identical:  bytes 0..64, locked.
	 * Unless the user block changed from all-ones, we can't
	 * tell whether it's still writable; so we assume it isn't.
	 */
	info->start = 0;
	info->length = 64;
	info->locked = 1;
	return sizeof(*info);
}

static ssize_t otp_read(struct spi_device *spi, unsigned base,
		uint8_t *buf, loff_t off, size_t len)
{
	struct spi_message	m;
	size_t			l;
	uint8_t			*scratch;
	struct spi_transfer	t;
	int			status;

	if (off > 64)
		return -EINVAL;

	if ((off + len) > 64)
		len = 64 - off;
	if (len == 0)
		return len;

	spi_message_init(&m);

	l = 4 + base + off + len;
	scratch = kzalloc(l, GFP_KERNEL);
	if (!scratch)
		return -ENOMEM;

	/* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
	 * IN:  ignore 4 bytes, data bytes 0..N (max 127)
	 */
	scratch[0] = OP_READ_SECURITY;

	memset(&t, 0, sizeof t);
	t.tx_buf = scratch;
	t.rx_buf = scratch;
	t.len = l;
	spi_message_add_tail(&t, &m);

	dataflash_waitready(spi);

	status = spi_sync(spi, &m);
	if (status >= 0) {
		memcpy(buf, scratch + 4 + base + off, len);
		status = len;
	}

	kfree(scratch);
	return status;
}

static int dataflash_read_fact_otp(struct mtd_info *mtd,
		loff_t from, size_t len, size_t *retlen, u_char *buf)
{
	struct dataflash	*priv = (struct dataflash *)mtd->priv;
	int			status;

	/* 64 bytes, from 0..63 ... start at 64 on-chip */
	mutex_lock(&priv->lock);
	status = otp_read(priv->spi, 64, buf, from, len);
	mutex_unlock(&priv->lock);

	if (status < 0)
		return status;
	*retlen = status;
	return 0;
}

static int dataflash_read_user_otp(struct mtd_info *mtd,
		loff_t from, size_t len, size_t *retlen, u_char *buf)
{
	struct dataflash	*priv = (struct dataflash *)mtd->priv;
	int			status;

	/* 64 bytes, from 0..63 ... start at 0 on-chip */
	mutex_lock(&priv->lock);
	status = otp_read(priv->spi, 0, buf, from, len);
	mutex_unlock(&priv->lock);

	if (status < 0)
		return status;
	*retlen = status;
	return 0;
}

static int dataflash_write_user_otp(struct mtd_info *mtd,
		loff_t from, size_t len, size_t *retlen, u_char *buf)
{
	struct spi_message	m;
	const size_t		l = 4 + 64;
	uint8_t			*scratch;
	struct spi_transfer	t;
	struct dataflash	*priv = (struct dataflash *)mtd->priv;
	int			status;

	if (len > 64)
		return -EINVAL;

	/* Strictly speaking, we *could* truncate the write ... but
	 * let's not do that for the only write that's ever possible.
	 */
	if ((from + len) > 64)
		return -EINVAL;

	/* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
	 * IN:  ignore all
	 */
	scratch = kzalloc(l, GFP_KERNEL);
	if (!scratch)
		return -ENOMEM;
	scratch[0] = OP_WRITE_SECURITY;
	memcpy(scratch + 4 + from, buf, len);

	spi_message_init(&m);

	memset(&t, 0, sizeof t);
	t.tx_buf = scratch;
	t.len = l;
	spi_message_add_tail(&t, &m);

	/* Write the OTP bits, if they've not yet been written.
	 * This modifies SRAM buffer1.
	 */
	mutex_lock(&priv->lock);
	dataflash_waitready(priv->spi);
	status = spi_sync(priv->spi, &m);
	mutex_unlock(&priv->lock);

	kfree(scratch);

	if (status >= 0) {
		status = 0;
		*retlen = len;
	}
	return status;
}

static char *otp_setup(struct mtd_info *device, char revision)
{
	device->get_fact_prot_info = dataflash_get_otp_info;
	device->read_fact_prot_reg = dataflash_read_fact_otp;
	device->get_user_prot_info = dataflash_get_otp_info;
	device->read_user_prot_reg = dataflash_read_user_otp;

	/* rev c parts (at45db321c and at45db1281 only!) use a
	 * different write procedure; not (yet?) implemented.
	 */
	if (revision > 'c')
		device->write_user_prot_reg = dataflash_write_user_otp;

	return ", OTP";
}

#else

621
static char *otp_setup(struct mtd_info *device, char revision)
D
David Brownell 已提交
622 623 624 625 626 627 628 629
{
	return " (OTP)";
}

#endif

/* ......................................................................... */

630 631 632 633
/*
 * Register DataFlash device with MTD subsystem.
 */
static int __devinit
D
David Brownell 已提交
634 635
add_dataflash_otp(struct spi_device *spi, char *name,
		int nr_pages, int pagesize, int pageoffset, char revision)
636 637 638 639
{
	struct dataflash		*priv;
	struct mtd_info			*device;
	struct flash_platform_data	*pdata = spi->dev.platform_data;
D
David Brownell 已提交
640
	char				*otp_tag = "";
641

642
	priv = kzalloc(sizeof *priv, GFP_KERNEL);
643 644 645
	if (!priv)
		return -ENOMEM;

646
	mutex_init(&priv->lock);
647 648 649 650 651 652 653 654 655 656 657 658 659
	priv->spi = spi;
	priv->page_size = pagesize;
	priv->page_offset = pageoffset;

	/* name must be usable with cmdlinepart */
	sprintf(priv->name, "spi%d.%d-%s",
			spi->master->bus_num, spi->chip_select,
			name);

	device = &priv->mtd;
	device->name = (pdata && pdata->name) ? pdata->name : priv->name;
	device->size = nr_pages * pagesize;
	device->erasesize = pagesize;
660
	device->writesize = pagesize;
661 662
	device->owner = THIS_MODULE;
	device->type = MTD_DATAFLASH;
663
	device->flags = MTD_WRITEABLE;
664 665 666 667 668
	device->erase = dataflash_erase;
	device->read = dataflash_read;
	device->write = dataflash_write;
	device->priv = priv;

D
David Brownell 已提交
669 670 671 672 673 674
	if (revision >= 'c')
		otp_tag = otp_setup(device, revision);

	dev_info(&spi->dev, "%s (%d KBytes) pagesize %d bytes%s\n",
			name, DIV_ROUND_UP(device->size, 1024),
			pagesize, otp_tag);
675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695
	dev_set_drvdata(&spi->dev, priv);

	if (mtd_has_partitions()) {
		struct mtd_partition	*parts;
		int			nr_parts = 0;

#ifdef CONFIG_MTD_CMDLINE_PARTS
		static const char *part_probes[] = { "cmdlinepart", NULL, };

		nr_parts = parse_mtd_partitions(device, part_probes, &parts, 0);
#endif

		if (nr_parts <= 0 && pdata && pdata->parts) {
			parts = pdata->parts;
			nr_parts = pdata->nr_parts;
		}

		if (nr_parts > 0) {
			priv->partitioned = 1;
			return add_mtd_partitions(device, parts, nr_parts);
		}
D
David Brownell 已提交
696
	} else if (pdata && pdata->nr_parts)
697 698 699 700 701 702
		dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
				pdata->nr_parts, device->name);

	return add_mtd_device(device) == 1 ? -ENODEV : 0;
}

D
David Brownell 已提交
703 704 705 706 707 708 709 710
static inline int __devinit
add_dataflash(struct spi_device *spi, char *name,
		int nr_pages, int pagesize, int pageoffset)
{
	return add_dataflash_otp(spi, name, nr_pages, pagesize,
			pageoffset, 0);
}

711 712 713
struct flash_info {
	char		*name;

714 715
	/* JEDEC id has a high byte of zero plus three data bytes:
	 * the manufacturer id, then a two byte device id.
716
	 */
717
	uint32_t	jedec_id;
718

719
	/* The size listed here is what works with OP_ERASE_PAGE. */
720
	unsigned	nr_pages;
721 722
	uint16_t	pagesize;
	uint16_t	pageoffset;
723

724
	uint16_t	flags;
725 726
#define SUP_POW2PS	0x0002		/* supports 2^N byte pages */
#define IS_POW2PS	0x0001		/* uses 2^N byte pages */
727 728 729 730
};

static struct flash_info __devinitdata dataflash_data [] = {

731 732 733 734 735 736 737 738 739 740
	/*
	 * NOTE:  chips with SUP_POW2PS (rev D and up) need two entries,
	 * one with IS_POW2PS and the other without.  The entry with the
	 * non-2^N byte page size can't name exact chip revisions without
	 * losing backwards compatibility for cmdlinepart.
	 *
	 * These newer chips also support 128-byte security registers (with
	 * 64 bytes one-time-programmable) and software write-protection.
	 */
	{ "AT45DB011B",  0x1f2200, 512, 264, 9, SUP_POW2PS},
741 742
	{ "at45db011d",  0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},

743
	{ "AT45DB021B",  0x1f2300, 1024, 264, 9, SUP_POW2PS},
744 745
	{ "at45db021d",  0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},

746
	{ "AT45DB041x",  0x1f2400, 2048, 264, 9, SUP_POW2PS},
747 748
	{ "at45db041d",  0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},

749
	{ "AT45DB081B",  0x1f2500, 4096, 264, 9, SUP_POW2PS},
750 751
	{ "at45db081d",  0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},

752
	{ "AT45DB161x",  0x1f2600, 4096, 528, 10, SUP_POW2PS},
753 754
	{ "at45db161d",  0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},

755
	{ "AT45DB321x",  0x1f2700, 8192, 528, 10, 0},		/* rev C */
756

757
	{ "AT45DB321x",  0x1f2701, 8192, 528, 10, SUP_POW2PS},
758 759
	{ "at45db321d",  0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},

760 761
	{ "AT45DB642x",  0x1f2800, 8192, 1056, 11, SUP_POW2PS},
	{ "at45db642d",  0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
762 763 764 765 766
};

static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
{
	int			tmp;
767 768 769
	uint8_t			code = OP_READ_ID;
	uint8_t			id[3];
	uint32_t		jedec;
770 771 772 773 774 775
	struct flash_info	*info;
	int status;

	/* JEDEC also defines an optional "extended device information"
	 * string for after vendor-specific data, after the three bytes
	 * we use here.  Supporting some chips might require using it.
776 777 778 779
	 *
	 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
	 * That's not an error; only rev C and newer chips handle it, and
	 * only Atmel sells these chips.
780 781 782 783 784
	 */
	tmp = spi_write_then_read(spi, &code, 1, id, 3);
	if (tmp < 0) {
		DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
			spi->dev.bus_id, tmp);
785
		return ERR_PTR(tmp);
786
	}
787 788 789
	if (id[0] != 0x1f)
		return NULL;

790 791 792 793 794 795 796 797 798 799
	jedec = id[0];
	jedec = jedec << 8;
	jedec |= id[1];
	jedec = jedec << 8;
	jedec |= id[2];

	for (tmp = 0, info = dataflash_data;
			tmp < ARRAY_SIZE(dataflash_data);
			tmp++, info++) {
		if (info->jedec_id == jedec) {
800 801 802 803 804
			DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n",
				dev_name(&spi->dev),
				(info->flags & SUP_POW2PS)
					? ", binary pagesize" : ""
				);
805 806
			if (info->flags & SUP_POW2PS) {
				status = dataflash_status(spi);
807 808 809 810 811 812 813 814 815 816 817 818 819
				if (status < 0) {
					DEBUG(MTD_DEBUG_LEVEL1,
						"%s: status error %d\n",
						dev_name(&spi->dev), status);
					return ERR_PTR(status);
				}
				if (status & 0x1) {
					if (info->flags & IS_POW2PS)
						return info;
				} else {
					if (!(info->flags & IS_POW2PS))
						return info;
				}
820 821 822
			}
		}
	}
823 824 825 826 827 828 829 830

	/*
	 * Treat other chips as errors ... we won't know the right page
	 * size (it might be binary) even when we can tell which density
	 * class is involved (legacy chip id scheme).
	 */
	dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
	return ERR_PTR(-ENODEV);
831 832
}

833 834 835 836 837 838 839 840 841 842 843 844 845 846
/*
 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
 * or else the ID code embedded in the status bits:
 *
 *   Device      Density         ID code          #Pages PageSize  Offset
 *   AT45DB011B  1Mbit   (128K)  xx0011xx (0x0c)    512    264      9
 *   AT45DB021B  2Mbit   (256K)  xx0101xx (0x14)   1024    264      9
 *   AT45DB041B  4Mbit   (512K)  xx0111xx (0x1c)   2048    264      9
 *   AT45DB081B  8Mbit   (1M)    xx1001xx (0x24)   4096    264      9
 *   AT45DB0161B 16Mbit  (2M)    xx1011xx (0x2c)   4096    528     10
 *   AT45DB0321B 32Mbit  (4M)    xx1101xx (0x34)   8192    528     10
 *   AT45DB0642  64Mbit  (8M)    xx111xxx (0x3c)   8192   1056     11
 *   AT45DB1282  128Mbit (16M)   xx0100xx (0x10)  16384   1056     11
 */
847 848 849
static int __devinit dataflash_probe(struct spi_device *spi)
{
	int status;
850 851 852 853 854 855
	struct flash_info	*info;

	/*
	 * Try to detect dataflash by JEDEC ID.
	 * If it succeeds we know we have either a C or D part.
	 * D will support power of 2 pagesize option.
D
David Brownell 已提交
856 857
	 * Both support the security register, though with different
	 * write procedures.
858 859
	 */
	info = jedec_probe(spi);
860 861
	if (IS_ERR(info))
		return PTR_ERR(info);
862
	if (info != NULL)
D
David Brownell 已提交
863 864 865
		return add_dataflash_otp(spi, info->name, info->nr_pages,
				info->pagesize, info->pageoffset,
				(info->flags & SUP_POW2PS) ? 'd' : 'c');
866

867 868 869 870
	/*
	 * Older chips support only legacy commands, identifing
	 * capacity using bits in the status byte.
	 */
871 872 873 874
	status = dataflash_status(spi);
	if (status <= 0 || status == 0xff) {
		DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n",
				spi->dev.bus_id, status);
875
		if (status == 0 || status == 0xff)
876 877 878 879 880 881 882 883 884 885 886 887 888
			status = -ENODEV;
		return status;
	}

	/* if there's a device there, assume it's dataflash.
	 * board setup should have set spi->max_speed_max to
	 * match f(car) for continuous reads, mode 0 or 3.
	 */
	switch (status & 0x3c) {
	case 0x0c:	/* 0 0 1 1 x x */
		status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
		break;
	case 0x14:	/* 0 1 0 1 x x */
889
		status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
890 891
		break;
	case 0x1c:	/* 0 1 1 1 x x */
892
		status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
893 894 895 896 897
		break;
	case 0x24:	/* 1 0 0 1 x x */
		status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
		break;
	case 0x2c:	/* 1 0 1 1 x x */
898
		status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965
		break;
	case 0x34:	/* 1 1 0 1 x x */
		status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
		break;
	case 0x38:	/* 1 1 1 x x x */
	case 0x3c:
		status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
		break;
	/* obsolete AT45DB1282 not (yet?) supported */
	default:
		DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n",
				spi->dev.bus_id, status & 0x3c);
		status = -ENODEV;
	}

	if (status < 0)
		DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n",
				spi->dev.bus_id, status);

	return status;
}

static int __devexit dataflash_remove(struct spi_device *spi)
{
	struct dataflash	*flash = dev_get_drvdata(&spi->dev);
	int			status;

	DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", spi->dev.bus_id);

	if (mtd_has_partitions() && flash->partitioned)
		status = del_mtd_partitions(&flash->mtd);
	else
		status = del_mtd_device(&flash->mtd);
	if (status == 0)
		kfree(flash);
	return status;
}

static struct spi_driver dataflash_driver = {
	.driver = {
		.name		= "mtd_dataflash",
		.bus		= &spi_bus_type,
		.owner		= THIS_MODULE,
	},

	.probe		= dataflash_probe,
	.remove		= __devexit_p(dataflash_remove),

	/* FIXME:  investigate suspend and resume... */
};

static int __init dataflash_init(void)
{
	return spi_register_driver(&dataflash_driver);
}
module_init(dataflash_init);

static void __exit dataflash_exit(void)
{
	spi_unregister_driver(&dataflash_driver);
}
module_exit(dataflash_exit);


MODULE_LICENSE("GPL");
MODULE_AUTHOR("Andrew Victor, David Brownell");
MODULE_DESCRIPTION("MTD DataFlash driver");