tmio_mmc_pio.c 30.2 KB
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/*
 * linux/drivers/mmc/host/tmio_mmc_pio.c
 *
 * Copyright (C) 2011 Guennadi Liakhovetski
 * Copyright (C) 2007 Ian Molton
 * Copyright (C) 2004 Ian Molton
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Driver for the MMC / SD / SDIO IP found in:
 *
 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
 *
 * This driver draws mainly on scattered spec sheets, Reverse engineering
 * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
 * support). (Further 4 bit support from a later datasheet).
 *
 * TODO:
 *   Investigate using a workqueue for PIO transfers
 *   Eliminate FIXMEs
 *   SDIO support
 *   Better Power management
 *   Handle MMC errors better
 *   double buffer support
 *
 */

#include <linux/delay.h>
#include <linux/device.h>
#include <linux/highmem.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/mfd/tmio.h>
#include <linux/mmc/host.h>
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#include <linux/mmc/mmc.h>
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#include <linux/mmc/slot-gpio.h>
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#include <linux/mmc/tmio.h>
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#include <linux/module.h>
#include <linux/pagemap.h>
#include <linux/platform_device.h>
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#include <linux/pm_qos.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/scatterlist.h>
#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include "tmio_mmc.h"

void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
{
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	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
	sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
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}

void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
{
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	host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
	sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
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}

static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
{
	sd_ctrl_write32(host, CTL_STATUS, ~i);
}

static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
{
	host->sg_len = data->sg_len;
	host->sg_ptr = data->sg;
	host->sg_orig = data->sg;
	host->sg_off = 0;
}

static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
{
	host->sg_ptr = sg_next(host->sg_ptr);
	host->sg_off = 0;
	return --host->sg_len;
}

#ifdef CONFIG_MMC_DEBUG

#define STATUS_TO_TEXT(a, status, i) \
	do { \
		if (status & TMIO_STAT_##a) { \
			if (i++) \
				printk(" | "); \
			printk(#a); \
		} \
	} while (0)

static void pr_debug_status(u32 status)
{
	int i = 0;
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	pr_debug("status: %08x = ", status);
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	STATUS_TO_TEXT(CARD_REMOVE, status, i);
	STATUS_TO_TEXT(CARD_INSERT, status, i);
	STATUS_TO_TEXT(SIGSTATE, status, i);
	STATUS_TO_TEXT(WRPROTECT, status, i);
	STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
	STATUS_TO_TEXT(CARD_INSERT_A, status, i);
	STATUS_TO_TEXT(SIGSTATE_A, status, i);
	STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
	STATUS_TO_TEXT(STOPBIT_ERR, status, i);
	STATUS_TO_TEXT(ILL_FUNC, status, i);
	STATUS_TO_TEXT(CMD_BUSY, status, i);
	STATUS_TO_TEXT(CMDRESPEND, status, i);
	STATUS_TO_TEXT(DATAEND, status, i);
	STATUS_TO_TEXT(CRCFAIL, status, i);
	STATUS_TO_TEXT(DATATIMEOUT, status, i);
	STATUS_TO_TEXT(CMDTIMEOUT, status, i);
	STATUS_TO_TEXT(RXOVERFLOW, status, i);
	STATUS_TO_TEXT(TXUNDERRUN, status, i);
	STATUS_TO_TEXT(RXRDY, status, i);
	STATUS_TO_TEXT(TXRQ, status, i);
	STATUS_TO_TEXT(ILL_ACCESS, status, i);
	printk("\n");
}

#else
#define pr_debug_status(s)  do { } while (0)
#endif

static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	if (enable) {
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		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
					~TMIO_SDIO_STAT_IOIRQ;
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		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
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		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
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	} else {
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		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
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		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
	}
}

static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
{
	u32 clk = 0, clock;

	if (new_clock) {
		for (clock = host->mmc->f_min, clk = 0x80000080;
			new_clock >= (clock<<1); clk >>= 1)
			clock <<= 1;
		clk |= 0x100;
	}

	if (host->set_clk_div)
		host->set_clk_div(host->pdev, (clk>>22) & 1);

	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
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	msleep(10);
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}

static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
{
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	/* implicit BUG_ON(!res) */
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	if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
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		sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
		msleep(10);
	}
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	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
	msleep(10);
}

static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
{
	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
	msleep(10);
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	/* implicit BUG_ON(!res) */
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	if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
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		sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
		msleep(10);
	}
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}

static void tmio_mmc_reset(struct tmio_mmc_host *host)
{
	/* FIXME - should we set stop clock reg here */
	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
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	/* implicit BUG_ON(!res) */
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	if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
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		sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
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	msleep(10);
	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
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	if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
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		sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
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	msleep(10);
}

static void tmio_mmc_reset_work(struct work_struct *work)
{
	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
						  delayed_reset_work.work);
	struct mmc_request *mrq;
	unsigned long flags;

	spin_lock_irqsave(&host->lock, flags);
	mrq = host->mrq;

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	/*
	 * is request already finished? Since we use a non-blocking
	 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
	 * us, so, have to check for IS_ERR(host->mrq)
	 */
	if (IS_ERR_OR_NULL(mrq)
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	    || time_is_after_jiffies(host->last_req_ts +
		msecs_to_jiffies(2000))) {
		spin_unlock_irqrestore(&host->lock, flags);
		return;
	}

	dev_warn(&host->pdev->dev,
		"timeout waiting for hardware interrupt (CMD%u)\n",
		mrq->cmd->opcode);

	if (host->data)
		host->data->error = -ETIMEDOUT;
	else if (host->cmd)
		host->cmd->error = -ETIMEDOUT;
	else
		mrq->cmd->error = -ETIMEDOUT;

	host->cmd = NULL;
	host->data = NULL;
	host->force_pio = false;

	spin_unlock_irqrestore(&host->lock, flags);

	tmio_mmc_reset(host);

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	/* Ready for new calls */
	host->mrq = NULL;

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	tmio_mmc_abort_dma(host);
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	mmc_request_done(host->mmc, mrq);
}

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/* called with host->lock held, interrupts disabled */
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static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
{
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	struct mmc_request *mrq;
	unsigned long flags;
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	spin_lock_irqsave(&host->lock, flags);

	mrq = host->mrq;
	if (IS_ERR_OR_NULL(mrq)) {
		spin_unlock_irqrestore(&host->lock, flags);
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		return;
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	}
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	host->cmd = NULL;
	host->data = NULL;
	host->force_pio = false;

	cancel_delayed_work(&host->delayed_reset_work);

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	host->mrq = NULL;
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	spin_unlock_irqrestore(&host->lock, flags);
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	if (mrq->cmd->error || (mrq->data && mrq->data->error))
		tmio_mmc_abort_dma(host);

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	mmc_request_done(host->mmc, mrq);
}

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static void tmio_mmc_done_work(struct work_struct *work)
{
	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
						  done);
	tmio_mmc_finish_request(host);
}

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/* These are the bitmasks the tmio chip requires to implement the MMC response
 * types. Note that R1 and R6 are the same in this scheme. */
#define APP_CMD        0x0040
#define RESP_NONE      0x0300
#define RESP_R1        0x0400
#define RESP_R1B       0x0500
#define RESP_R2        0x0600
#define RESP_R3        0x0700
#define DATA_PRESENT   0x0800
#define TRANSFER_READ  0x1000
#define TRANSFER_MULTI 0x2000
#define SECURITY_CMD   0x4000

static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
{
	struct mmc_data *data = host->data;
	int c = cmd->opcode;
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	u32 irq_mask = TMIO_MASK_CMD;
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	/* CMD12 is handled by hardware */
	if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
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		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
		return 0;
	}

	switch (mmc_resp_type(cmd)) {
	case MMC_RSP_NONE: c |= RESP_NONE; break;
	case MMC_RSP_R1:   c |= RESP_R1;   break;
	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
	case MMC_RSP_R2:   c |= RESP_R2;   break;
	case MMC_RSP_R3:   c |= RESP_R3;   break;
	default:
		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
		return -EINVAL;
	}

	host->cmd = cmd;

/* FIXME - this seems to be ok commented out but the spec suggest this bit
 *         should be set when issuing app commands.
 *	if(cmd->flags & MMC_FLAG_ACMD)
 *		c |= APP_CMD;
 */
	if (data) {
		c |= DATA_PRESENT;
		if (data->blocks > 1) {
			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
			c |= TRANSFER_MULTI;
		}
		if (data->flags & MMC_DATA_READ)
			c |= TRANSFER_READ;
	}

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	if (!host->native_hotplug)
		irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
	tmio_mmc_enable_mmc_irqs(host, irq_mask);
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	/* Fire off the command */
	sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
	sd_ctrl_write16(host, CTL_SD_CMD, c);

	return 0;
}

/*
 * This chip always returns (at least?) as much data as you ask for.
 * I'm unsure what happens if you ask for less than a block. This should be
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 * looked into to ensure that a funny length read doesn't hose the controller.
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 */
static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
{
	struct mmc_data *data = host->data;
	void *sg_virt;
	unsigned short *buf;
	unsigned int count;
	unsigned long flags;

	if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
		pr_err("PIO IRQ in DMA mode!\n");
		return;
	} else if (!data) {
		pr_debug("Spurious PIO IRQ\n");
		return;
	}

	sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
	buf = (unsigned short *)(sg_virt + host->sg_off);

	count = host->sg_ptr->length - host->sg_off;
	if (count > data->blksz)
		count = data->blksz;

	pr_debug("count: %08x offset: %08x flags %08x\n",
		 count, host->sg_off, data->flags);

	/* Transfer the data */
	if (data->flags & MMC_DATA_READ)
		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
	else
		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);

	host->sg_off += count;

	tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);

	if (host->sg_off == host->sg_ptr->length)
		tmio_mmc_next_sg(host);

	return;
}

static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
{
	if (host->sg_ptr == &host->bounce_sg) {
		unsigned long flags;
		void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
		memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
		tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
	}
}

/* needs to be called with host->lock held */
void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
{
	struct mmc_data *data = host->data;
	struct mmc_command *stop;

	host->data = NULL;

	if (!data) {
		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
		return;
	}
	stop = data->stop;

	/* FIXME - return correct transfer count on errors */
	if (!data->error)
		data->bytes_xfered = data->blocks * data->blksz;
	else
		data->bytes_xfered = 0;

	pr_debug("Completed data request\n");

	/*
	 * FIXME: other drivers allow an optional stop command of any given type
	 *        which we dont do, as the chip can auto generate them.
	 *        Perhaps we can be smarter about when to use auto CMD12 and
	 *        only issue the auto request when we know this is the desired
	 *        stop command, allowing fallback to the stop command the
	 *        upper layers expect. For now, we do what works.
	 */

	if (data->flags & MMC_DATA_READ) {
		if (host->chan_rx && !host->force_pio)
			tmio_mmc_check_bounce_buffer(host);
		dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
			host->mrq);
	} else {
		dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
			host->mrq);
	}

	if (stop) {
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		if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
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			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
		else
			BUG();
	}

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	schedule_work(&host->done);
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}

static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
{
	struct mmc_data *data;
	spin_lock(&host->lock);
	data = host->data;

	if (!data)
		goto out;

	if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
		/*
		 * Has all data been written out yet? Testing on SuperH showed,
		 * that in most cases the first interrupt comes already with the
		 * BUSY status bit clear, but on some operations, like mount or
		 * in the beginning of a write / sync / umount, there is one
		 * DATAEND interrupt with the BUSY bit set, in this cases
		 * waiting for one more interrupt fixes the problem.
		 */
		if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
			tasklet_schedule(&host->dma_complete);
		}
	} else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
		tasklet_schedule(&host->dma_complete);
	} else {
		tmio_mmc_do_data_irq(host);
		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
	}
out:
	spin_unlock(&host->lock);
}

static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
	unsigned int stat)
{
	struct mmc_command *cmd = host->cmd;
	int i, addr;

	spin_lock(&host->lock);

	if (!host->cmd) {
		pr_debug("Spurious CMD irq\n");
		goto out;
	}

	host->cmd = NULL;

	/* This controller is sicker than the PXA one. Not only do we need to
	 * drop the top 8 bits of the first response word, we also need to
	 * modify the order of the response for short response command types.
	 */

	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
		cmd->resp[i] = sd_ctrl_read32(host, addr);

	if (cmd->flags &  MMC_RSP_136) {
		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
		cmd->resp[3] <<= 8;
	} else if (cmd->flags & MMC_RSP_R3) {
		cmd->resp[0] = cmd->resp[3];
	}

	if (stat & TMIO_STAT_CMDTIMEOUT)
		cmd->error = -ETIMEDOUT;
	else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
		cmd->error = -EILSEQ;

	/* If there is data to handle we enable data IRQs here, and
	 * we will ultimatley finish the request in the data_end handler.
	 * If theres no data or we encountered an error, finish now.
	 */
	if (host->data && !cmd->error) {
		if (host->data->flags & MMC_DATA_READ) {
			if (host->force_pio || !host->chan_rx)
				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
			else
				tasklet_schedule(&host->dma_issue);
		} else {
			if (host->force_pio || !host->chan_tx)
				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
			else
				tasklet_schedule(&host->dma_issue);
		}
	} else {
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		schedule_work(&host->done);
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	}

out:
	spin_unlock(&host->lock);
}

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static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
				       int *ireg, int *status)
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{
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	*status = sd_ctrl_read32(host, CTL_STATUS);
	*ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
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	pr_debug_status(*status);
	pr_debug_status(*ireg);
}
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static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
				      int ireg, int status)
{
	struct mmc_host *mmc = host->mmc;
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	/* Card insert / remove attempts */
	if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
			TMIO_STAT_CARD_REMOVE);
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		if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
		     ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
		    !work_pending(&mmc->detect.work))
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			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
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		return true;
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	}

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	return false;
}

irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
{
	unsigned int ireg, status;
	struct tmio_mmc_host *host = devid;
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	tmio_mmc_card_irq_status(host, &ireg, &status);
	__tmio_mmc_card_detect_irq(host, ireg, status);

	return IRQ_HANDLED;
}
EXPORT_SYMBOL(tmio_mmc_card_detect_irq);

static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
				 int ireg, int status)
{
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	/* Command completion */
	if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
		tmio_mmc_ack_mmc_irqs(host,
			     TMIO_STAT_CMDRESPEND |
			     TMIO_STAT_CMDTIMEOUT);
		tmio_mmc_cmd_irq(host, status);
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		return true;
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	}
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	/* Data transfer */
	if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
		tmio_mmc_pio_irq(host);
609
		return true;
610
	}
611

612 613 614 615
	/* Data transfer completion */
	if (ireg & TMIO_STAT_DATAEND) {
		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
		tmio_mmc_data_irq(host);
616
		return true;
617
	}
618

619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669
	return false;
}

irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
{
	unsigned int ireg, status;
	struct tmio_mmc_host *host = devid;

	tmio_mmc_card_irq_status(host, &ireg, &status);
	__tmio_mmc_sdcard_irq(host, ireg, status);

	return IRQ_HANDLED;
}
EXPORT_SYMBOL(tmio_mmc_sdcard_irq);

irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
{
	struct tmio_mmc_host *host = devid;
	struct mmc_host *mmc = host->mmc;
	struct tmio_mmc_data *pdata = host->pdata;
	unsigned int ireg, status;

	if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
		return IRQ_HANDLED;

	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;

	sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL);

	if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
		mmc_signal_sdio_irq(mmc);

	return IRQ_HANDLED;
}
EXPORT_SYMBOL(tmio_mmc_sdio_irq);

irqreturn_t tmio_mmc_irq(int irq, void *devid)
{
	struct tmio_mmc_host *host = devid;
	unsigned int ireg, status;

	pr_debug("MMC IRQ begin\n");

	tmio_mmc_card_irq_status(host, &ireg, &status);
	if (__tmio_mmc_card_detect_irq(host, ireg, status))
		return IRQ_HANDLED;
	if (__tmio_mmc_sdcard_irq(host, ireg, status))
		return IRQ_HANDLED;

	tmio_mmc_sdio_irq(irq, devid);
670 671 672

	return IRQ_HANDLED;
}
673
EXPORT_SYMBOL(tmio_mmc_irq);
674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709

static int tmio_mmc_start_data(struct tmio_mmc_host *host,
	struct mmc_data *data)
{
	struct tmio_mmc_data *pdata = host->pdata;

	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
		 data->blksz, data->blocks);

	/* Some hardware cannot perform 2 byte requests in 4 bit mode */
	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
		int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;

		if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
			pr_err("%s: %d byte block unsupported in 4 bit mode\n",
			       mmc_hostname(host->mmc), data->blksz);
			return -EINVAL;
		}
	}

	tmio_mmc_init_sg(host, data);
	host->data = data;

	/* Set transfer length / blocksize */
	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
	sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);

	tmio_mmc_start_dma(host, data);

	return 0;
}

/* Process requests from the MMC layer */
static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
710
	unsigned long flags;
711 712
	int ret;

713 714 715
	spin_lock_irqsave(&host->lock, flags);

	if (host->mrq) {
716
		pr_debug("request not null\n");
717 718 719 720 721 722 723
		if (IS_ERR(host->mrq)) {
			spin_unlock_irqrestore(&host->lock, flags);
			mrq->cmd->error = -EAGAIN;
			mmc_request_done(mmc, mrq);
			return;
		}
	}
724 725 726 727 728

	host->last_req_ts = jiffies;
	wmb();
	host->mrq = mrq;

729 730
	spin_unlock_irqrestore(&host->lock, flags);

731 732 733 734 735 736 737 738 739 740 741 742 743 744 745
	if (mrq->data) {
		ret = tmio_mmc_start_data(host, mrq->data);
		if (ret)
			goto fail;
	}

	ret = tmio_mmc_start_command(host, mrq->cmd);
	if (!ret) {
		schedule_delayed_work(&host->delayed_reset_work,
				      msecs_to_jiffies(2000));
		return;
	}

fail:
	host->force_pio = false;
746
	host->mrq = NULL;
747 748 749 750
	mrq->cmd->error = ret;
	mmc_request_done(mmc, mrq);
}

751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766
static int tmio_mmc_clk_update(struct mmc_host *mmc)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
	struct tmio_mmc_data *pdata = host->pdata;
	int ret;

	if (!pdata->clk_enable)
		return -ENOTSUPP;

	ret = pdata->clk_enable(host->pdev, &mmc->f_max);
	if (!ret)
		mmc->f_min = mmc->f_max / 512;

	return ret;
}

767
static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
768 769
{
	struct mmc_host *mmc = host->mmc;
770 771 772
	int ret = 0;

	/* .set_ios() is returning void, so, no chance to report an error */
773

774 775 776
	if (host->set_pwr)
		host->set_pwr(host->pdev, 1);

777 778 779 780 781 782 783 784 785 786 787 788 789 790 791
	if (!IS_ERR(mmc->supply.vmmc)) {
		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
		/*
		 * Attention: empiric value. With a b43 WiFi SDIO card this
		 * delay proved necessary for reliable card-insertion probing.
		 * 100us were not enough. Is this the same 140us delay, as in
		 * tmio_mmc_set_ios()?
		 */
		udelay(200);
	}
	/*
	 * It seems, VccQ should be switched on after Vcc, this is also what the
	 * omap_hsmmc.c driver does.
	 */
	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
792
		ret = regulator_enable(mmc->supply.vqmmc);
793 794
		udelay(200);
	}
795 796 797 798

	if (ret < 0)
		dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
			ret);
799 800 801 802 803 804 805 806 807
}

static void tmio_mmc_power_off(struct tmio_mmc_host *host)
{
	struct mmc_host *mmc = host->mmc;

	if (!IS_ERR(mmc->supply.vqmmc))
		regulator_disable(mmc->supply.vqmmc);

808
	if (!IS_ERR(mmc->supply.vmmc))
809
		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
810 811 812

	if (host->set_pwr)
		host->set_pwr(host->pdev, 0);
813 814
}

815 816 817 818 819 820 821 822 823
/* Set MMC clock / power.
 * Note: This controller uses a simple divider scheme therefore it cannot
 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
 * slowest setting.
 */
static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
824
	struct device *dev = &host->pdev->dev;
825 826
	unsigned long flags;

827 828
	mutex_lock(&host->ios_lock);

829 830 831
	spin_lock_irqsave(&host->lock, flags);
	if (host->mrq) {
		if (IS_ERR(host->mrq)) {
832
			dev_dbg(dev,
833 834 835 836 837
				"%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
				current->comm, task_pid_nr(current),
				ios->clock, ios->power_mode);
			host->mrq = ERR_PTR(-EINTR);
		} else {
838
			dev_dbg(dev,
839 840 841 842 843
				"%s.%d: CMD%u active since %lu, now %lu!\n",
				current->comm, task_pid_nr(current),
				host->mrq->cmd->opcode, host->last_req_ts, jiffies);
		}
		spin_unlock_irqrestore(&host->lock, flags);
844 845

		mutex_unlock(&host->ios_lock);
846 847 848 849 850 851
		return;
	}

	host->mrq = ERR_PTR(-EBUSY);

	spin_unlock_irqrestore(&host->lock, flags);
852

853
	/*
854
	 * host->power toggles between false and true in both cases - either
855 856 857
	 * or not the controller can be runtime-suspended during inactivity.
	 * But if the controller has to be kept on, the runtime-pm usage_count
	 * is kept positive, so no suspending actually takes place.
858 859
	 */
	if (ios->power_mode == MMC_POWER_ON && ios->clock) {
860
		if (host->power != TMIO_MMC_ON_RUN) {
861
			tmio_mmc_clk_update(mmc);
862
			pm_runtime_get_sync(dev);
863 864 865 866
			if (host->resuming) {
				tmio_mmc_reset(host);
				host->resuming = false;
			}
867
		}
868 869
		if (host->power == TMIO_MMC_OFF_STOP)
			tmio_mmc_reset(host);
870
		tmio_mmc_set_clock(host, ios->clock);
871
		if (host->power == TMIO_MMC_OFF_STOP)
872 873
			/* power up SD card and the bus */
			tmio_mmc_power_on(host, ios->vdd);
874
		host->power = TMIO_MMC_ON_RUN;
875 876
		/* start bus clock */
		tmio_mmc_clk_start(host);
877
	} else if (ios->power_mode != MMC_POWER_UP) {
878 879 880 881 882
		struct tmio_mmc_data *pdata = host->pdata;
		unsigned int old_power = host->power;

		if (old_power != TMIO_MMC_OFF_STOP) {
			if (ios->power_mode == MMC_POWER_OFF) {
883
				tmio_mmc_power_off(host);
884 885 886 887 888 889 890
				host->power = TMIO_MMC_OFF_STOP;
			} else {
				host->power = TMIO_MMC_ON_STOP;
			}
		}

		if (old_power == TMIO_MMC_ON_RUN) {
891
			tmio_mmc_clk_stop(host);
892
			pm_runtime_put(dev);
893 894
			if (pdata->clk_disable)
				pdata->clk_disable(host->pdev);
895
		}
896 897
	}

898
	if (host->power != TMIO_MMC_OFF_STOP) {
899 900 901 902 903 904 905 906
		switch (ios->bus_width) {
		case MMC_BUS_WIDTH_1:
			sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
		break;
		case MMC_BUS_WIDTH_4:
			sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
		break;
		}
907 908 909 910
	}

	/* Let things settle. delay taken from winCE driver */
	udelay(140);
911 912 913 914 915 916
	if (PTR_ERR(host->mrq) == -EINTR)
		dev_dbg(&host->pdev->dev,
			"%s.%d: IOS interrupted: clk %u, mode %u",
			current->comm, task_pid_nr(current),
			ios->clock, ios->power_mode);
	host->mrq = NULL;
917 918

	mutex_unlock(&host->ios_lock);
919 920 921 922 923 924
}

static int tmio_mmc_get_ro(struct mmc_host *mmc)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
	struct tmio_mmc_data *pdata = host->pdata;
925 926 927
	int ret = mmc_gpio_get_ro(mmc);
	if (ret >= 0)
		return ret;
928

929 930
	return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
		 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
931 932 933 934 935 936
}

static const struct mmc_host_ops tmio_mmc_ops = {
	.request	= tmio_mmc_request,
	.set_ios	= tmio_mmc_set_ios,
	.get_ro         = tmio_mmc_get_ro,
937
	.get_cd		= mmc_gpio_get_cd,
938 939 940
	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
};

941
static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
942 943 944 945 946 947
{
	struct tmio_mmc_data *pdata = host->pdata;
	struct mmc_host *mmc = host->mmc;

	mmc_regulator_get_supply(mmc);

948
	/* use ocr_mask if no regulator */
949
	if (!mmc->ocr_avail)
950 951 952 953 954 955 956 957 958 959
		mmc->ocr_avail =  pdata->ocr_mask;

	/*
	 * try again.
	 * There is possibility that regulator has not been probed
	 */
	if (!mmc->ocr_avail)
		return -EPROBE_DEFER;

	return 0;
960 961
}

962 963 964 965 966 967 968 969 970 971 972
static void tmio_mmc_of_parse(struct platform_device *pdev,
			      struct tmio_mmc_data *pdata)
{
	const struct device_node *np = pdev->dev.of_node;
	if (!np)
		return;

	if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
		pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
}

B
Bill Pemberton 已提交
973
int tmio_mmc_host_probe(struct tmio_mmc_host **host,
974 975 976 977 978 979 980 981 982
				  struct platform_device *pdev,
				  struct tmio_mmc_data *pdata)
{
	struct tmio_mmc_host *_host;
	struct mmc_host *mmc;
	struct resource *res_ctl;
	int ret;
	u32 irq_mask = TMIO_MASK_CMD;

983 984
	tmio_mmc_of_parse(pdev, pdata);

985 986 987
	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
		pdata->write16_hook = NULL;

988 989 990 991 992 993 994 995
	res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res_ctl)
		return -EINVAL;

	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
	if (!mmc)
		return -ENOMEM;

996 997 998
	ret = mmc_of_parse(mmc);
	if (ret < 0)
		goto host_free;
999

1000
	pdata->dev = &pdev->dev;
1001 1002 1003 1004 1005 1006
	_host = mmc_priv(mmc);
	_host->pdata = pdata;
	_host->mmc = mmc;
	_host->pdev = pdev;
	platform_set_drvdata(pdev, mmc);

1007
	_host->set_pwr = pdata->set_pwr;
1008 1009
	_host->set_clk_div = pdata->set_clk_div;

1010 1011 1012 1013
	ret = tmio_mmc_init_ocr(_host);
	if (ret < 0)
		goto host_free;

1014 1015 1016 1017 1018 1019 1020
	_host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
	if (!_host->ctl) {
		ret = -ENOMEM;
		goto host_free;
	}

	mmc->ops = &tmio_mmc_ops;
1021
	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1022
	mmc->caps2 |= pdata->capabilities2;
1023 1024 1025 1026 1027 1028 1029
	mmc->max_segs = 32;
	mmc->max_blk_size = 512;
	mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
		mmc->max_segs;
	mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
	mmc->max_seg_size = mmc->max_req_size;

1030
	_host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1031
				  mmc->caps & MMC_CAP_NEEDS_POLL ||
1032 1033
				  mmc->caps & MMC_CAP_NONREMOVABLE ||
				  mmc->slot.cd_irq >= 0);
1034

1035
	_host->power = TMIO_MMC_OFF_STOP;
1036 1037 1038 1039 1040
	pm_runtime_enable(&pdev->dev);
	ret = pm_runtime_resume(&pdev->dev);
	if (ret < 0)
		goto pm_disable;

1041 1042 1043 1044 1045
	if (tmio_mmc_clk_update(mmc) < 0) {
		mmc->f_max = pdata->hclk;
		mmc->f_min = mmc->f_max / 512;
	}

1046 1047 1048 1049 1050 1051 1052
	/*
	 * There are 4 different scenarios for the card detection:
	 *  1) an external gpio irq handles the cd (best for power savings)
	 *  2) internal sdhi irq handles the cd
	 *  3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL
	 *  4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE
	 *
1053 1054 1055
	 *  While we increment the runtime PM counter for all scenarios when
	 *  the mmc core activates us by calling an appropriate set_ios(), we
	 *  must additionally ensure that in case 2) the tmio mmc hardware stays
1056 1057
	 *  powered on during runtime for the card detection to work.
	 */
1058
	if (_host->native_hotplug)
1059 1060
		pm_runtime_get_noresume(&pdev->dev);

1061 1062 1063
	tmio_mmc_clk_stop(_host);
	tmio_mmc_reset(_host);

S
Simon Horman 已提交
1064
	_host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
1065
	tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076

	/* Unmask the IRQs we want to know about */
	if (!_host->chan_rx)
		irq_mask |= TMIO_MASK_READOP;
	if (!_host->chan_tx)
		irq_mask |= TMIO_MASK_WRITEOP;
	if (!_host->native_hotplug)
		irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);

	_host->sdcard_irq_mask &= ~irq_mask;

1077 1078 1079 1080
	if (pdata->flags & TMIO_MMC_SDIO_IRQ)
		tmio_mmc_enable_sdio_irq(mmc, 0);

	spin_lock_init(&_host->lock);
1081
	mutex_init(&_host->ios_lock);
1082 1083 1084

	/* Init delayed work for request timeouts */
	INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1085
	INIT_WORK(&_host->done, tmio_mmc_done_work);
1086 1087 1088 1089

	/* See if we also get DMA */
	tmio_mmc_request_dma(_host, pdata);

1090 1091 1092 1093 1094 1095 1096
	ret = mmc_add_host(mmc);
	if (pdata->clk_disable)
		pdata->clk_disable(pdev);
	if (ret < 0) {
		tmio_mmc_host_remove(_host);
		return ret;
	}
1097

1098 1099
	dev_pm_qos_expose_latency_limit(&pdev->dev, 100);

1100
	if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1101
		ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1102 1103 1104 1105 1106 1107
		if (ret < 0) {
			tmio_mmc_host_remove(_host);
			return ret;
		}
	}

1108 1109 1110 1111
	*host = _host;

	return 0;

1112 1113
pm_disable:
	pm_runtime_disable(&pdev->dev);
1114 1115 1116 1117 1118 1119 1120 1121 1122 1123
	iounmap(_host->ctl);
host_free:
	mmc_free_host(mmc);

	return ret;
}
EXPORT_SYMBOL(tmio_mmc_host_probe);

void tmio_mmc_host_remove(struct tmio_mmc_host *host)
{
1124
	struct platform_device *pdev = host->pdev;
1125 1126
	struct mmc_host *mmc = host->mmc;

1127
	if (!host->native_hotplug)
1128 1129
		pm_runtime_get_sync(&pdev->dev);

1130 1131
	dev_pm_qos_hide_latency_limit(&pdev->dev);

1132
	mmc_remove_host(mmc);
1133
	cancel_work_sync(&host->done);
1134 1135
	cancel_delayed_work_sync(&host->delayed_reset_work);
	tmio_mmc_release_dma(host);
1136 1137 1138

	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);
1139 1140

	iounmap(host->ctl);
1141
	mmc_free_host(mmc);
1142 1143 1144
}
EXPORT_SYMBOL(tmio_mmc_host_remove);

1145 1146 1147 1148 1149 1150
#ifdef CONFIG_PM
int tmio_mmc_host_suspend(struct device *dev)
{
	struct mmc_host *mmc = dev_get_drvdata(dev);
	struct tmio_mmc_host *host = mmc_priv(mmc);

1151 1152
	tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
	return 0;
1153 1154 1155 1156 1157 1158 1159 1160
}
EXPORT_SYMBOL(tmio_mmc_host_suspend);

int tmio_mmc_host_resume(struct device *dev)
{
	struct mmc_host *mmc = dev_get_drvdata(dev);
	struct tmio_mmc_host *host = mmc_priv(mmc);

1161
	tmio_mmc_enable_dma(host, true);
1162

1163
	/* The MMC core will perform the complete set up */
1164
	host->resuming = true;
1165
	return 0;
1166 1167 1168 1169 1170
}
EXPORT_SYMBOL(tmio_mmc_host_resume);

#endif	/* CONFIG_PM */

1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181
int tmio_mmc_host_runtime_suspend(struct device *dev)
{
	return 0;
}
EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);

int tmio_mmc_host_runtime_resume(struct device *dev)
{
	struct mmc_host *mmc = dev_get_drvdata(dev);
	struct tmio_mmc_host *host = mmc_priv(mmc);

1182
	tmio_mmc_enable_dma(host, true);
1183 1184 1185 1186 1187

	return 0;
}
EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);

1188
MODULE_LICENSE("GPL v2");