stmpe.c 32.6 KB
Newer Older
1
/*
2 3
 * ST Microelectronics MFD: stmpe's driver
 *
4 5 6 7 8 9
 * Copyright (C) ST-Ericsson SA 2010
 *
 * License Terms: GNU General Public License, version 2
 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
 */

10
#include <linux/err.h>
11
#include <linux/gpio.h>
S
Samuel Ortiz 已提交
12
#include <linux/export.h>
13 14 15
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
16
#include <linux/irqdomain.h>
17
#include <linux/of.h>
18
#include <linux/of_gpio.h>
19
#include <linux/pm.h>
20 21
#include <linux/slab.h>
#include <linux/mfd/core.h>
22
#include <linux/delay.h>
23
#include <linux/regulator/consumer.h>
24 25
#include "stmpe.h"

26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46
/**
 * struct stmpe_platform_data - STMPE platform data
 * @id: device id to distinguish between multiple STMPEs on the same board
 * @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*)
 * @irq_trigger: IRQ trigger to use for the interrupt to the host
 * @autosleep: bool to enable/disable stmpe autosleep
 * @autosleep_timeout: inactivity timeout in milliseconds for autosleep
 * @irq_over_gpio: true if gpio is used to get irq
 * @irq_gpio: gpio number over which irq will be requested (significant only if
 *	      irq_over_gpio is true)
 */
struct stmpe_platform_data {
	int id;
	unsigned int blocks;
	unsigned int irq_trigger;
	bool autosleep;
	bool irq_over_gpio;
	int irq_gpio;
	int autosleep_timeout;
};

47 48 49 50 51 52 53 54 55 56 57 58 59 60
static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
{
	return stmpe->variant->enable(stmpe, blocks, true);
}

static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
{
	return stmpe->variant->enable(stmpe, blocks, false);
}

static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
{
	int ret;

61
	ret = stmpe->ci->read_byte(stmpe, reg);
62
	if (ret < 0)
63
		dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
64 65 66 67 68 69 70 71 72 73 74 75

	dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);

	return ret;
}

static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
{
	int ret;

	dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);

76
	ret = stmpe->ci->write_byte(stmpe, reg, val);
77
	if (ret < 0)
78
		dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101

	return ret;
}

static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
{
	int ret;

	ret = __stmpe_reg_read(stmpe, reg);
	if (ret < 0)
		return ret;

	ret &= ~mask;
	ret |= val;

	return __stmpe_reg_write(stmpe, reg, ret);
}

static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
			      u8 *values)
{
	int ret;

102
	ret = stmpe->ci->read_block(stmpe, reg, length, values);
103
	if (ret < 0)
104
		dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
105 106 107 108 109 110 111 112 113 114 115 116 117 118 119

	dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
	stmpe_dump_bytes("stmpe rd: ", values, length);

	return ret;
}

static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
			const u8 *values)
{
	int ret;

	dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
	stmpe_dump_bytes("stmpe wr: ", values, length);

120
	ret = stmpe->ci->write_block(stmpe, reg, length, values);
121
	if (ret < 0)
122
		dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254

	return ret;
}

/**
 * stmpe_enable - enable blocks on an STMPE device
 * @stmpe:	Device to work on
 * @blocks:	Mask of blocks (enum stmpe_block values) to enable
 */
int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
{
	int ret;

	mutex_lock(&stmpe->lock);
	ret = __stmpe_enable(stmpe, blocks);
	mutex_unlock(&stmpe->lock);

	return ret;
}
EXPORT_SYMBOL_GPL(stmpe_enable);

/**
 * stmpe_disable - disable blocks on an STMPE device
 * @stmpe:	Device to work on
 * @blocks:	Mask of blocks (enum stmpe_block values) to enable
 */
int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
{
	int ret;

	mutex_lock(&stmpe->lock);
	ret = __stmpe_disable(stmpe, blocks);
	mutex_unlock(&stmpe->lock);

	return ret;
}
EXPORT_SYMBOL_GPL(stmpe_disable);

/**
 * stmpe_reg_read() - read a single STMPE register
 * @stmpe:	Device to read from
 * @reg:	Register to read
 */
int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
{
	int ret;

	mutex_lock(&stmpe->lock);
	ret = __stmpe_reg_read(stmpe, reg);
	mutex_unlock(&stmpe->lock);

	return ret;
}
EXPORT_SYMBOL_GPL(stmpe_reg_read);

/**
 * stmpe_reg_write() - write a single STMPE register
 * @stmpe:	Device to write to
 * @reg:	Register to write
 * @val:	Value to write
 */
int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
{
	int ret;

	mutex_lock(&stmpe->lock);
	ret = __stmpe_reg_write(stmpe, reg, val);
	mutex_unlock(&stmpe->lock);

	return ret;
}
EXPORT_SYMBOL_GPL(stmpe_reg_write);

/**
 * stmpe_set_bits() - set the value of a bitfield in a STMPE register
 * @stmpe:	Device to write to
 * @reg:	Register to write
 * @mask:	Mask of bits to set
 * @val:	Value to set
 */
int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
{
	int ret;

	mutex_lock(&stmpe->lock);
	ret = __stmpe_set_bits(stmpe, reg, mask, val);
	mutex_unlock(&stmpe->lock);

	return ret;
}
EXPORT_SYMBOL_GPL(stmpe_set_bits);

/**
 * stmpe_block_read() - read multiple STMPE registers
 * @stmpe:	Device to read from
 * @reg:	First register
 * @length:	Number of registers
 * @values:	Buffer to write to
 */
int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
{
	int ret;

	mutex_lock(&stmpe->lock);
	ret = __stmpe_block_read(stmpe, reg, length, values);
	mutex_unlock(&stmpe->lock);

	return ret;
}
EXPORT_SYMBOL_GPL(stmpe_block_read);

/**
 * stmpe_block_write() - write multiple STMPE registers
 * @stmpe:	Device to write to
 * @reg:	First register
 * @length:	Number of registers
 * @values:	Values to write
 */
int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
		      const u8 *values)
{
	int ret;

	mutex_lock(&stmpe->lock);
	ret = __stmpe_block_write(stmpe, reg, length, values);
	mutex_unlock(&stmpe->lock);

	return ret;
}
EXPORT_SYMBOL_GPL(stmpe_block_write);

/**
O
Om Prakash 已提交
255
 * stmpe_set_altfunc()- set the alternate function for STMPE pins
256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272
 * @stmpe:	Device to configure
 * @pins:	Bitmask of pins to affect
 * @block:	block to enable alternate functions for
 *
 * @pins is assumed to have a bit set for each of the bits whose alternate
 * function is to be changed, numbered according to the GPIOXY numbers.
 *
 * If the GPIO module is not enabled, this function automatically enables it in
 * order to perform the change.
 */
int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
{
	struct stmpe_variant_info *variant = stmpe->variant;
	u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
	int af_bits = variant->af_bits;
	int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
	int mask = (1 << af_bits) - 1;
273
	u8 regs[8];
274 275 276 277
	int af, afperreg, ret;

	if (!variant->get_altfunc)
		return 0;
278

279
	afperreg = 8 / af_bits;
280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321
	mutex_lock(&stmpe->lock);

	ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
	if (ret < 0)
		goto out;

	ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
	if (ret < 0)
		goto out;

	af = variant->get_altfunc(stmpe, block);

	while (pins) {
		int pin = __ffs(pins);
		int regoffset = numregs - (pin / afperreg) - 1;
		int pos = (pin % afperreg) * (8 / afperreg);

		regs[regoffset] &= ~(mask << pos);
		regs[regoffset] |= af << pos;

		pins &= ~(1 << pin);
	}

	ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);

out:
	mutex_unlock(&stmpe->lock);
	return ret;
}
EXPORT_SYMBOL_GPL(stmpe_set_altfunc);

/*
 * GPIO (all variants)
 */

static struct resource stmpe_gpio_resources[] = {
	/* Start and end filled dynamically */
	{
		.flags	= IORESOURCE_IRQ,
	},
};

322
static const struct mfd_cell stmpe_gpio_cell = {
323
	.name		= "stmpe-gpio",
324
	.of_compatible	= "st,stmpe-gpio",
325 326 327 328
	.resources	= stmpe_gpio_resources,
	.num_resources	= ARRAY_SIZE(stmpe_gpio_resources),
};

329
static const struct mfd_cell stmpe_gpio_cell_noirq = {
330
	.name		= "stmpe-gpio",
331
	.of_compatible	= "st,stmpe-gpio",
332 333 334
	/* gpio cell resources consist of an irq only so no resources here */
};

335 336 337 338 339 340 341 342 343 344 345 346 347 348 349
/*
 * Keypad (1601, 2401, 2403)
 */

static struct resource stmpe_keypad_resources[] = {
	{
		.name	= "KEYPAD",
		.flags	= IORESOURCE_IRQ,
	},
	{
		.name	= "KEYPAD_OVER",
		.flags	= IORESOURCE_IRQ,
	},
};

350
static const struct mfd_cell stmpe_keypad_cell = {
351
	.name		= "stmpe-keypad",
352
	.of_compatible  = "st,stmpe-keypad",
353 354 355 356
	.resources	= stmpe_keypad_resources,
	.num_resources	= ARRAY_SIZE(stmpe_keypad_resources),
};

357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381
/*
 * PWM (1601, 2401, 2403)
 */
static struct resource stmpe_pwm_resources[] = {
	{
		.name	= "PWM0",
		.flags	= IORESOURCE_IRQ,
	},
	{
		.name	= "PWM1",
		.flags	= IORESOURCE_IRQ,
	},
	{
		.name	= "PWM2",
		.flags	= IORESOURCE_IRQ,
	},
};

static const struct mfd_cell stmpe_pwm_cell = {
	.name		= "stmpe-pwm",
	.of_compatible  = "st,stmpe-pwm",
	.resources	= stmpe_pwm_resources,
	.num_resources	= ARRAY_SIZE(stmpe_pwm_resources),
};

382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404
/*
 * STMPE801
 */
static const u8 stmpe801_regs[] = {
	[STMPE_IDX_CHIP_ID]	= STMPE801_REG_CHIP_ID,
	[STMPE_IDX_ICR_LSB]	= STMPE801_REG_SYS_CTRL,
	[STMPE_IDX_GPMR_LSB]	= STMPE801_REG_GPIO_MP_STA,
	[STMPE_IDX_GPSR_LSB]	= STMPE801_REG_GPIO_SET_PIN,
	[STMPE_IDX_GPCR_LSB]	= STMPE801_REG_GPIO_SET_PIN,
	[STMPE_IDX_GPDR_LSB]	= STMPE801_REG_GPIO_DIR,
	[STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN,
	[STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA,

};

static struct stmpe_variant_block stmpe801_blocks[] = {
	{
		.cell	= &stmpe_gpio_cell,
		.irq	= 0,
		.block	= STMPE_BLOCK_GPIO,
	},
};

405 406 407 408 409 410 411
static struct stmpe_variant_block stmpe801_blocks_noirq[] = {
	{
		.cell	= &stmpe_gpio_cell_noirq,
		.block	= STMPE_BLOCK_GPIO,
	},
};

412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432
static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks,
			   bool enable)
{
	if (blocks & STMPE_BLOCK_GPIO)
		return 0;
	else
		return -EINVAL;
}

static struct stmpe_variant_info stmpe801 = {
	.name		= "stmpe801",
	.id_val		= STMPE801_ID,
	.id_mask	= 0xffff,
	.num_gpios	= 8,
	.regs		= stmpe801_regs,
	.blocks		= stmpe801_blocks,
	.num_blocks	= ARRAY_SIZE(stmpe801_blocks),
	.num_irqs	= STMPE801_NR_INTERNAL_IRQS,
	.enable		= stmpe801_enable,
};

433 434 435 436 437 438 439 440 441 442 443
static struct stmpe_variant_info stmpe801_noirq = {
	.name		= "stmpe801",
	.id_val		= STMPE801_ID,
	.id_mask	= 0xffff,
	.num_gpios	= 8,
	.regs		= stmpe801_regs,
	.blocks		= stmpe801_blocks_noirq,
	.num_blocks	= ARRAY_SIZE(stmpe801_blocks_noirq),
	.enable		= stmpe801_enable,
};

444
/*
445
 * Touchscreen (STMPE811 or STMPE610)
446 447 448 449 450 451 452 453 454 455 456 457 458
 */

static struct resource stmpe_ts_resources[] = {
	{
		.name	= "TOUCH_DET",
		.flags	= IORESOURCE_IRQ,
	},
	{
		.name	= "FIFO_TH",
		.flags	= IORESOURCE_IRQ,
	},
};

459
static const struct mfd_cell stmpe_ts_cell = {
460
	.name		= "stmpe-ts",
461
	.of_compatible	= "st,stmpe-ts",
462 463 464 465 466
	.resources	= stmpe_ts_resources,
	.num_resources	= ARRAY_SIZE(stmpe_ts_resources),
};

/*
467
 * STMPE811 or STMPE610
468 469 470 471
 */

static const u8 stmpe811_regs[] = {
	[STMPE_IDX_CHIP_ID]	= STMPE811_REG_CHIP_ID,
472 473
	[STMPE_IDX_SYS_CTRL]	= STMPE811_REG_SYS_CTRL,
	[STMPE_IDX_SYS_CTRL2]	= STMPE811_REG_SYS_CTRL2,
474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515
	[STMPE_IDX_ICR_LSB]	= STMPE811_REG_INT_CTRL,
	[STMPE_IDX_IER_LSB]	= STMPE811_REG_INT_EN,
	[STMPE_IDX_ISR_MSB]	= STMPE811_REG_INT_STA,
	[STMPE_IDX_GPMR_LSB]	= STMPE811_REG_GPIO_MP_STA,
	[STMPE_IDX_GPSR_LSB]	= STMPE811_REG_GPIO_SET_PIN,
	[STMPE_IDX_GPCR_LSB]	= STMPE811_REG_GPIO_CLR_PIN,
	[STMPE_IDX_GPDR_LSB]	= STMPE811_REG_GPIO_DIR,
	[STMPE_IDX_GPRER_LSB]	= STMPE811_REG_GPIO_RE,
	[STMPE_IDX_GPFER_LSB]	= STMPE811_REG_GPIO_FE,
	[STMPE_IDX_GPAFR_U_MSB]	= STMPE811_REG_GPIO_AF,
	[STMPE_IDX_IEGPIOR_LSB]	= STMPE811_REG_GPIO_INT_EN,
	[STMPE_IDX_ISGPIOR_MSB]	= STMPE811_REG_GPIO_INT_STA,
	[STMPE_IDX_GPEDR_MSB]	= STMPE811_REG_GPIO_ED,
};

static struct stmpe_variant_block stmpe811_blocks[] = {
	{
		.cell	= &stmpe_gpio_cell,
		.irq	= STMPE811_IRQ_GPIOC,
		.block	= STMPE_BLOCK_GPIO,
	},
	{
		.cell	= &stmpe_ts_cell,
		.irq	= STMPE811_IRQ_TOUCH_DET,
		.block	= STMPE_BLOCK_TOUCHSCREEN,
	},
};

static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
			   bool enable)
{
	unsigned int mask = 0;

	if (blocks & STMPE_BLOCK_GPIO)
		mask |= STMPE811_SYS_CTRL2_GPIO_OFF;

	if (blocks & STMPE_BLOCK_ADC)
		mask |= STMPE811_SYS_CTRL2_ADC_OFF;

	if (blocks & STMPE_BLOCK_TOUCHSCREEN)
		mask |= STMPE811_SYS_CTRL2_TSC_OFF;

516
	return __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL2], mask,
517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539
				enable ? 0 : mask);
}

static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
{
	/* 0 for touchscreen, 1 for GPIO */
	return block != STMPE_BLOCK_TOUCHSCREEN;
}

static struct stmpe_variant_info stmpe811 = {
	.name		= "stmpe811",
	.id_val		= 0x0811,
	.id_mask	= 0xffff,
	.num_gpios	= 8,
	.af_bits	= 1,
	.regs		= stmpe811_regs,
	.blocks		= stmpe811_blocks,
	.num_blocks	= ARRAY_SIZE(stmpe811_blocks),
	.num_irqs	= STMPE811_NR_INTERNAL_IRQS,
	.enable		= stmpe811_enable,
	.get_altfunc	= stmpe811_get_altfunc,
};

540 541 542 543 544 545 546 547 548 549 550 551 552 553 554
/* Similar to 811, except number of gpios */
static struct stmpe_variant_info stmpe610 = {
	.name		= "stmpe610",
	.id_val		= 0x0811,
	.id_mask	= 0xffff,
	.num_gpios	= 6,
	.af_bits	= 1,
	.regs		= stmpe811_regs,
	.blocks		= stmpe811_blocks,
	.num_blocks	= ARRAY_SIZE(stmpe811_blocks),
	.num_irqs	= STMPE811_NR_INTERNAL_IRQS,
	.enable		= stmpe811_enable,
	.get_altfunc	= stmpe811_get_altfunc,
};

555 556 557 558 559 560
/*
 * STMPE1601
 */

static const u8 stmpe1601_regs[] = {
	[STMPE_IDX_CHIP_ID]	= STMPE1601_REG_CHIP_ID,
561 562
	[STMPE_IDX_SYS_CTRL]	= STMPE1601_REG_SYS_CTRL,
	[STMPE_IDX_SYS_CTRL2]	= STMPE1601_REG_SYS_CTRL2,
563 564 565 566 567 568 569 570 571
	[STMPE_IDX_ICR_LSB]	= STMPE1601_REG_ICR_LSB,
	[STMPE_IDX_IER_LSB]	= STMPE1601_REG_IER_LSB,
	[STMPE_IDX_ISR_MSB]	= STMPE1601_REG_ISR_MSB,
	[STMPE_IDX_GPMR_LSB]	= STMPE1601_REG_GPIO_MP_LSB,
	[STMPE_IDX_GPSR_LSB]	= STMPE1601_REG_GPIO_SET_LSB,
	[STMPE_IDX_GPCR_LSB]	= STMPE1601_REG_GPIO_CLR_LSB,
	[STMPE_IDX_GPDR_LSB]	= STMPE1601_REG_GPIO_SET_DIR_LSB,
	[STMPE_IDX_GPRER_LSB]	= STMPE1601_REG_GPIO_RE_LSB,
	[STMPE_IDX_GPFER_LSB]	= STMPE1601_REG_GPIO_FE_LSB,
572
	[STMPE_IDX_GPPUR_LSB]	= STMPE1601_REG_GPIO_PU_LSB,
573 574 575 576 577 578 579 580 581
	[STMPE_IDX_GPAFR_U_MSB]	= STMPE1601_REG_GPIO_AF_U_MSB,
	[STMPE_IDX_IEGPIOR_LSB]	= STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
	[STMPE_IDX_ISGPIOR_MSB]	= STMPE1601_REG_INT_STA_GPIO_MSB,
	[STMPE_IDX_GPEDR_MSB]	= STMPE1601_REG_GPIO_ED_MSB,
};

static struct stmpe_variant_block stmpe1601_blocks[] = {
	{
		.cell	= &stmpe_gpio_cell,
582
		.irq	= STMPE1601_IRQ_GPIOC,
583 584 585 586
		.block	= STMPE_BLOCK_GPIO,
	},
	{
		.cell	= &stmpe_keypad_cell,
587
		.irq	= STMPE1601_IRQ_KEYPAD,
588 589
		.block	= STMPE_BLOCK_KEYPAD,
	},
590 591 592 593 594
	{
		.cell	= &stmpe_pwm_cell,
		.irq	= STMPE1601_IRQ_PWM0,
		.block	= STMPE_BLOCK_PWM,
	},
595 596
};

597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646
/* supported autosleep timeout delay (in msecs) */
static const int stmpe_autosleep_delay[] = {
	4, 16, 32, 64, 128, 256, 512, 1024,
};

static int stmpe_round_timeout(int timeout)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
		if (stmpe_autosleep_delay[i] >= timeout)
			return i;
	}

	/*
	 * requests for delays longer than supported should not return the
	 * longest supported delay
	 */
	return -EINVAL;
}

static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
{
	int ret;

	if (!stmpe->variant->enable_autosleep)
		return -ENOSYS;

	mutex_lock(&stmpe->lock);
	ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
	mutex_unlock(&stmpe->lock);

	return ret;
}

/*
 * Both stmpe 1601/2403 support same layout for autosleep
 */
static int stmpe1601_autosleep(struct stmpe *stmpe,
		int autosleep_timeout)
{
	int ret, timeout;

	/* choose the best available timeout */
	timeout = stmpe_round_timeout(autosleep_timeout);
	if (timeout < 0) {
		dev_err(stmpe->dev, "invalid timeout\n");
		return timeout;
	}

647
	ret = __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL2],
648 649 650 651 652
			STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
			timeout);
	if (ret < 0)
		return ret;

653
	return __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL2],
654 655 656 657
			STPME1601_AUTOSLEEP_ENABLE,
			STPME1601_AUTOSLEEP_ENABLE);
}

658 659 660 661 662 663 664
static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
			    bool enable)
{
	unsigned int mask = 0;

	if (blocks & STMPE_BLOCK_GPIO)
		mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
665 666
	else
		mask &= ~STMPE1601_SYS_CTRL_ENABLE_GPIO;
667 668 669

	if (blocks & STMPE_BLOCK_KEYPAD)
		mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
670 671 672 673 674 675 676
	else
		mask &= ~STMPE1601_SYS_CTRL_ENABLE_KPC;

	if (blocks & STMPE_BLOCK_PWM)
		mask |= STMPE1601_SYS_CTRL_ENABLE_SPWM;
	else
		mask &= ~STMPE1601_SYS_CTRL_ENABLE_SPWM;
677

678
	return __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL], mask,
679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708
				enable ? mask : 0);
}

static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
{
	switch (block) {
	case STMPE_BLOCK_PWM:
		return 2;

	case STMPE_BLOCK_KEYPAD:
		return 1;

	case STMPE_BLOCK_GPIO:
	default:
		return 0;
	}
}

static struct stmpe_variant_info stmpe1601 = {
	.name		= "stmpe1601",
	.id_val		= 0x0210,
	.id_mask	= 0xfff0,	/* at least 0x0210 and 0x0212 */
	.num_gpios	= 16,
	.af_bits	= 2,
	.regs		= stmpe1601_regs,
	.blocks		= stmpe1601_blocks,
	.num_blocks	= ARRAY_SIZE(stmpe1601_blocks),
	.num_irqs	= STMPE1601_NR_INTERNAL_IRQS,
	.enable		= stmpe1601_enable,
	.get_altfunc	= stmpe1601_get_altfunc,
709
	.enable_autosleep	= stmpe1601_autosleep,
710 711
};

712 713 714 715 716
/*
 * STMPE1801
 */
static const u8 stmpe1801_regs[] = {
	[STMPE_IDX_CHIP_ID]	= STMPE1801_REG_CHIP_ID,
717
	[STMPE_IDX_SYS_CTRL]	= STMPE1801_REG_SYS_CTRL,
718 719 720 721 722 723 724 725 726
	[STMPE_IDX_ICR_LSB]	= STMPE1801_REG_INT_CTRL_LOW,
	[STMPE_IDX_IER_LSB]	= STMPE1801_REG_INT_EN_MASK_LOW,
	[STMPE_IDX_ISR_LSB]	= STMPE1801_REG_INT_STA_LOW,
	[STMPE_IDX_GPMR_LSB]	= STMPE1801_REG_GPIO_MP_LOW,
	[STMPE_IDX_GPSR_LSB]	= STMPE1801_REG_GPIO_SET_LOW,
	[STMPE_IDX_GPCR_LSB]	= STMPE1801_REG_GPIO_CLR_LOW,
	[STMPE_IDX_GPDR_LSB]	= STMPE1801_REG_GPIO_SET_DIR_LOW,
	[STMPE_IDX_GPRER_LSB]	= STMPE1801_REG_GPIO_RE_LOW,
	[STMPE_IDX_GPFER_LSB]	= STMPE1801_REG_GPIO_FE_LOW,
727
	[STMPE_IDX_GPPUR_LSB]	= STMPE1801_REG_GPIO_PULL_UP_LOW,
728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758
	[STMPE_IDX_IEGPIOR_LSB]	= STMPE1801_REG_INT_EN_GPIO_MASK_LOW,
	[STMPE_IDX_ISGPIOR_LSB]	= STMPE1801_REG_INT_STA_GPIO_LOW,
};

static struct stmpe_variant_block stmpe1801_blocks[] = {
	{
		.cell	= &stmpe_gpio_cell,
		.irq	= STMPE1801_IRQ_GPIOC,
		.block	= STMPE_BLOCK_GPIO,
	},
	{
		.cell	= &stmpe_keypad_cell,
		.irq	= STMPE1801_IRQ_KEYPAD,
		.block	= STMPE_BLOCK_KEYPAD,
	},
};

static int stmpe1801_enable(struct stmpe *stmpe, unsigned int blocks,
			    bool enable)
{
	unsigned int mask = 0;
	if (blocks & STMPE_BLOCK_GPIO)
		mask |= STMPE1801_MSK_INT_EN_GPIO;

	if (blocks & STMPE_BLOCK_KEYPAD)
		mask |= STMPE1801_MSK_INT_EN_KPC;

	return __stmpe_set_bits(stmpe, STMPE1801_REG_INT_EN_MASK_LOW, mask,
				enable ? mask : 0);
}

759
static int stmpe_reset(struct stmpe *stmpe)
760
{
761
	u16 id_val = stmpe->variant->id_val;
762 763
	unsigned long timeout;
	int ret = 0;
764 765 766 767 768 769 770 771
	u8 reset_bit;

	if (id_val == STMPE811_ID)
		/* STMPE801 and STMPE610 use bit 1 of SYS_CTRL register */
		reset_bit = STMPE811_SYS_CTRL_RESET;
	else
		/* all other STMPE variant use bit 7 of SYS_CTRL register */
		reset_bit = STMPE_SYS_CTRL_RESET;
772

773
	ret = __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL],
774
			       reset_bit, reset_bit);
775 776 777 778 779
	if (ret < 0)
		return ret;

	timeout = jiffies + msecs_to_jiffies(100);
	while (time_before(jiffies, timeout)) {
780
		ret = __stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL]);
781 782
		if (ret < 0)
			return ret;
783
		if (!(ret & reset_bit))
784 785
			return 0;
		usleep_range(100, 200);
786
	}
787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804
	return -EIO;
}

static struct stmpe_variant_info stmpe1801 = {
	.name		= "stmpe1801",
	.id_val		= STMPE1801_ID,
	.id_mask	= 0xfff0,
	.num_gpios	= 18,
	.af_bits	= 0,
	.regs		= stmpe1801_regs,
	.blocks		= stmpe1801_blocks,
	.num_blocks	= ARRAY_SIZE(stmpe1801_blocks),
	.num_irqs	= STMPE1801_NR_INTERNAL_IRQS,
	.enable		= stmpe1801_enable,
	/* stmpe1801 do not have any gpio alternate function */
	.get_altfunc	= NULL,
};

805 806 807 808 809 810
/*
 * STMPE24XX
 */

static const u8 stmpe24xx_regs[] = {
	[STMPE_IDX_CHIP_ID]	= STMPE24XX_REG_CHIP_ID,
811 812
	[STMPE_IDX_SYS_CTRL]	= STMPE24XX_REG_SYS_CTRL,
	[STMPE_IDX_SYS_CTRL2]	= STMPE24XX_REG_SYS_CTRL2,
813 814 815 816 817 818 819 820 821
	[STMPE_IDX_ICR_LSB]	= STMPE24XX_REG_ICR_LSB,
	[STMPE_IDX_IER_LSB]	= STMPE24XX_REG_IER_LSB,
	[STMPE_IDX_ISR_MSB]	= STMPE24XX_REG_ISR_MSB,
	[STMPE_IDX_GPMR_LSB]	= STMPE24XX_REG_GPMR_LSB,
	[STMPE_IDX_GPSR_LSB]	= STMPE24XX_REG_GPSR_LSB,
	[STMPE_IDX_GPCR_LSB]	= STMPE24XX_REG_GPCR_LSB,
	[STMPE_IDX_GPDR_LSB]	= STMPE24XX_REG_GPDR_LSB,
	[STMPE_IDX_GPRER_LSB]	= STMPE24XX_REG_GPRER_LSB,
	[STMPE_IDX_GPFER_LSB]	= STMPE24XX_REG_GPFER_LSB,
822 823
	[STMPE_IDX_GPPUR_LSB]	= STMPE24XX_REG_GPPUR_LSB,
	[STMPE_IDX_GPPDR_LSB]	= STMPE24XX_REG_GPPDR_LSB,
824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840
	[STMPE_IDX_GPAFR_U_MSB]	= STMPE24XX_REG_GPAFR_U_MSB,
	[STMPE_IDX_IEGPIOR_LSB]	= STMPE24XX_REG_IEGPIOR_LSB,
	[STMPE_IDX_ISGPIOR_MSB]	= STMPE24XX_REG_ISGPIOR_MSB,
	[STMPE_IDX_GPEDR_MSB]	= STMPE24XX_REG_GPEDR_MSB,
};

static struct stmpe_variant_block stmpe24xx_blocks[] = {
	{
		.cell	= &stmpe_gpio_cell,
		.irq	= STMPE24XX_IRQ_GPIOC,
		.block	= STMPE_BLOCK_GPIO,
	},
	{
		.cell	= &stmpe_keypad_cell,
		.irq	= STMPE24XX_IRQ_KEYPAD,
		.block	= STMPE_BLOCK_KEYPAD,
	},
841 842 843 844 845
	{
		.cell	= &stmpe_pwm_cell,
		.irq	= STMPE24XX_IRQ_PWM0,
		.block	= STMPE_BLOCK_PWM,
	},
846 847 848 849 850 851 852 853 854 855 856 857 858
};

static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
			    bool enable)
{
	unsigned int mask = 0;

	if (blocks & STMPE_BLOCK_GPIO)
		mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;

	if (blocks & STMPE_BLOCK_KEYPAD)
		mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;

859
	return __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL], mask,
860 861 862 863 864 865 866 867 868 869
				enable ? mask : 0);
}

static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
{
	switch (block) {
	case STMPE_BLOCK_ROTATOR:
		return 2;

	case STMPE_BLOCK_KEYPAD:
870
	case STMPE_BLOCK_PWM:
871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904
		return 1;

	case STMPE_BLOCK_GPIO:
	default:
		return 0;
	}
}

static struct stmpe_variant_info stmpe2401 = {
	.name		= "stmpe2401",
	.id_val		= 0x0101,
	.id_mask	= 0xffff,
	.num_gpios	= 24,
	.af_bits	= 2,
	.regs		= stmpe24xx_regs,
	.blocks		= stmpe24xx_blocks,
	.num_blocks	= ARRAY_SIZE(stmpe24xx_blocks),
	.num_irqs	= STMPE24XX_NR_INTERNAL_IRQS,
	.enable		= stmpe24xx_enable,
	.get_altfunc	= stmpe24xx_get_altfunc,
};

static struct stmpe_variant_info stmpe2403 = {
	.name		= "stmpe2403",
	.id_val		= 0x0120,
	.id_mask	= 0xffff,
	.num_gpios	= 24,
	.af_bits	= 2,
	.regs		= stmpe24xx_regs,
	.blocks		= stmpe24xx_blocks,
	.num_blocks	= ARRAY_SIZE(stmpe24xx_blocks),
	.num_irqs	= STMPE24XX_NR_INTERNAL_IRQS,
	.enable		= stmpe24xx_enable,
	.get_altfunc	= stmpe24xx_get_altfunc,
905
	.enable_autosleep	= stmpe1601_autosleep, /* same as stmpe1601 */
906 907
};

908
static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
909
	[STMPE610]	= &stmpe610,
910
	[STMPE801]	= &stmpe801,
911 912
	[STMPE811]	= &stmpe811,
	[STMPE1601]	= &stmpe1601,
913
	[STMPE1801]	= &stmpe1801,
914 915 916 917
	[STMPE2401]	= &stmpe2401,
	[STMPE2403]	= &stmpe2403,
};

918 919 920 921 922 923 924 925 926 927
/*
 * These devices can be connected in a 'no-irq' configuration - the irq pin
 * is not used and the device cannot interrupt the CPU. Here we only list
 * devices which support this configuration - the driver will fail probing
 * for any devices not listed here which are configured in this way.
 */
static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = {
	[STMPE801]	= &stmpe801_noirq,
};

928 929 930 931 932
static irqreturn_t stmpe_irq(int irq, void *data)
{
	struct stmpe *stmpe = data;
	struct stmpe_variant_info *variant = stmpe->variant;
	int num = DIV_ROUND_UP(variant->num_irqs, 8);
933
	u8 israddr;
934
	u8 isr[3];
935 936 937
	int ret;
	int i;

938
	if (variant->id_val == STMPE801_ID) {
939 940 941
		int base = irq_create_mapping(stmpe->domain, 0);

		handle_nested_irq(base);
942 943 944
		return IRQ_HANDLED;
	}

945 946 947 948 949
	if (variant->id_val == STMPE1801_ID)
		israddr = stmpe->regs[STMPE_IDX_ISR_LSB];
	else
		israddr = stmpe->regs[STMPE_IDX_ISR_MSB];

950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966
	ret = stmpe_block_read(stmpe, israddr, num, isr);
	if (ret < 0)
		return IRQ_NONE;

	for (i = 0; i < num; i++) {
		int bank = num - i - 1;
		u8 status = isr[i];
		u8 clear;

		status &= stmpe->ier[bank];
		if (!status)
			continue;

		clear = status;
		while (status) {
			int bit = __ffs(status);
			int line = bank * 8 + bit;
967
			int nestedirq = irq_create_mapping(stmpe->domain, line);
968

969
			handle_nested_irq(nestedirq);
970 971 972 973 974 975 976 977 978
			status &= ~(1 << bit);
		}

		stmpe_reg_write(stmpe, israddr + i, clear);
	}

	return IRQ_HANDLED;
}

979
static void stmpe_irq_lock(struct irq_data *data)
980
{
981
	struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
982 983 984 985

	mutex_lock(&stmpe->irq_lock);
}

986
static void stmpe_irq_sync_unlock(struct irq_data *data)
987
{
988
	struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006
	struct stmpe_variant_info *variant = stmpe->variant;
	int num = DIV_ROUND_UP(variant->num_irqs, 8);
	int i;

	for (i = 0; i < num; i++) {
		u8 new = stmpe->ier[i];
		u8 old = stmpe->oldier[i];

		if (new == old)
			continue;

		stmpe->oldier[i] = new;
		stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
	}

	mutex_unlock(&stmpe->irq_lock);
}

1007
static void stmpe_irq_mask(struct irq_data *data)
1008
{
1009
	struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
1010
	int offset = data->hwirq;
1011 1012 1013 1014 1015 1016
	int regoffset = offset / 8;
	int mask = 1 << (offset % 8);

	stmpe->ier[regoffset] &= ~mask;
}

1017
static void stmpe_irq_unmask(struct irq_data *data)
1018
{
1019
	struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
1020
	int offset = data->hwirq;
1021 1022 1023 1024 1025 1026 1027 1028
	int regoffset = offset / 8;
	int mask = 1 << (offset % 8);

	stmpe->ier[regoffset] |= mask;
}

static struct irq_chip stmpe_irq_chip = {
	.name			= "stmpe",
1029 1030 1031 1032
	.irq_bus_lock		= stmpe_irq_lock,
	.irq_bus_sync_unlock	= stmpe_irq_sync_unlock,
	.irq_mask		= stmpe_irq_mask,
	.irq_unmask		= stmpe_irq_unmask,
1033 1034
};

1035 1036
static int stmpe_irq_map(struct irq_domain *d, unsigned int virq,
                                irq_hw_number_t hwirq)
1037
{
1038
	struct stmpe *stmpe = d->host_data;
1039
	struct irq_chip *chip = NULL;
1040

1041 1042 1043
	if (stmpe->variant->id_val != STMPE801_ID)
		chip = &stmpe_irq_chip;

1044 1045 1046 1047
	irq_set_chip_data(virq, stmpe);
	irq_set_chip_and_handler(virq, chip, handle_edge_irq);
	irq_set_nested_thread(virq, 1);
	irq_set_noprobe(virq);
1048 1049 1050 1051

	return 0;
}

1052
static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq)
1053
{
1054 1055 1056 1057
		irq_set_chip_and_handler(virq, NULL, NULL);
		irq_set_chip_data(virq, NULL);
}

1058
static const struct irq_domain_ops stmpe_irq_ops = {
1059 1060 1061 1062 1063
        .map    = stmpe_irq_map,
        .unmap  = stmpe_irq_unmap,
        .xlate  = irq_domain_xlate_twocell,
};

1064
static int stmpe_irq_init(struct stmpe *stmpe, struct device_node *np)
1065
{
1066
	int base = 0;
1067 1068
	int num_irqs = stmpe->variant->num_irqs;

1069 1070
	stmpe->domain = irq_domain_add_simple(np, num_irqs, base,
					      &stmpe_irq_ops, stmpe);
1071 1072 1073
	if (!stmpe->domain) {
		dev_err(stmpe->dev, "Failed to create irqdomain\n");
		return -ENOSYS;
1074
	}
1075 1076

	return 0;
1077 1078
}

1079
static int stmpe_chip_init(struct stmpe *stmpe)
1080 1081
{
	unsigned int irq_trigger = stmpe->pdata->irq_trigger;
1082
	int autosleep_timeout = stmpe->pdata->autosleep_timeout;
1083
	struct stmpe_variant_info *variant = stmpe->variant;
1084
	u8 icr = 0;
1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106
	unsigned int id;
	u8 data[2];
	int ret;

	ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
			       ARRAY_SIZE(data), data);
	if (ret < 0)
		return ret;

	id = (data[0] << 8) | data[1];
	if ((id & variant->id_mask) != variant->id_val) {
		dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
		return -EINVAL;
	}

	dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);

	/* Disable all modules -- subdrivers should enable what they need. */
	ret = stmpe_disable(stmpe, ~0);
	if (ret)
		return ret;

1107 1108 1109
	ret =  stmpe_reset(stmpe);
	if (ret < 0)
		return ret;
1110

1111
	if (stmpe->irq >= 0) {
1112
		if (id == STMPE801_ID)
1113
			icr = STMPE801_REG_SYS_CTRL_INT_EN;
1114
		else
1115
			icr = STMPE_ICR_LSB_GIM;
1116

1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130
		/* STMPE801 doesn't support Edge interrupts */
		if (id != STMPE801_ID) {
			if (irq_trigger == IRQF_TRIGGER_FALLING ||
					irq_trigger == IRQF_TRIGGER_RISING)
				icr |= STMPE_ICR_LSB_EDGE;
		}

		if (irq_trigger == IRQF_TRIGGER_RISING ||
				irq_trigger == IRQF_TRIGGER_HIGH) {
			if (id == STMPE801_ID)
				icr |= STMPE801_REG_SYS_CTRL_INT_HI;
			else
				icr |= STMPE_ICR_LSB_HIGH;
		}
1131
	}
1132

1133 1134 1135 1136 1137 1138
	if (stmpe->pdata->autosleep) {
		ret = stmpe_autosleep(stmpe, autosleep_timeout);
		if (ret)
			return ret;
	}

1139 1140 1141
	return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
}

1142
static int stmpe_add_device(struct stmpe *stmpe, const struct mfd_cell *cell)
1143 1144
{
	return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
1145
			       NULL, 0, stmpe->domain);
1146 1147
}

1148
static int stmpe_devices_init(struct stmpe *stmpe)
1149 1150 1151 1152
{
	struct stmpe_variant_info *variant = stmpe->variant;
	unsigned int platform_blocks = stmpe->pdata->blocks;
	int ret = -EINVAL;
1153
	int i, j;
1154 1155 1156 1157 1158 1159 1160

	for (i = 0; i < variant->num_blocks; i++) {
		struct stmpe_variant_block *block = &variant->blocks[i];

		if (!(platform_blocks & block->block))
			continue;

1161 1162 1163 1164 1165 1166 1167 1168 1169
		for (j = 0; j < block->cell->num_resources; j++) {
			struct resource *res =
				(struct resource *) &block->cell->resources[j];

			/* Dynamically fill in a variant's IRQ. */
			if (res->flags & IORESOURCE_IRQ)
				res->start = res->end = block->irq + j;
		}

1170
		platform_blocks &= ~block->block;
1171
		ret = stmpe_add_device(stmpe, block->cell);
1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183
		if (ret)
			return ret;
	}

	if (platform_blocks)
		dev_warn(stmpe->dev,
			 "platform wants blocks (%#x) not present on variant",
			 platform_blocks);

	return ret;
}

1184 1185
static void stmpe_of_probe(struct stmpe_platform_data *pdata,
			   struct device_node *np)
1186 1187 1188
{
	struct device_node *child;

1189 1190 1191 1192
	pdata->id = of_alias_get_id(np, "stmpe-i2c");
	if (pdata->id < 0)
		pdata->id = -1;

1193 1194 1195 1196 1197 1198
	pdata->irq_gpio = of_get_named_gpio_flags(np, "irq-gpio", 0,
				&pdata->irq_trigger);
	if (gpio_is_valid(pdata->irq_gpio))
		pdata->irq_over_gpio = 1;
	else
		pdata->irq_trigger = IRQF_TRIGGER_NONE;
1199

1200 1201 1202 1203 1204 1205 1206 1207
	of_property_read_u32(np, "st,autosleep-timeout",
			&pdata->autosleep_timeout);

	pdata->autosleep = (pdata->autosleep_timeout) ? true : false;

	for_each_child_of_node(np, child) {
		if (!strcmp(child->name, "stmpe_gpio")) {
			pdata->blocks |= STMPE_BLOCK_GPIO;
1208
		} else if (!strcmp(child->name, "stmpe_keypad")) {
1209
			pdata->blocks |= STMPE_BLOCK_KEYPAD;
1210
		} else if (!strcmp(child->name, "stmpe_touchscreen")) {
1211
			pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN;
1212
		} else if (!strcmp(child->name, "stmpe_adc")) {
1213
			pdata->blocks |= STMPE_BLOCK_ADC;
1214 1215 1216 1217
		} else if (!strcmp(child->name, "stmpe_pwm")) {
			pdata->blocks |= STMPE_BLOCK_PWM;
		} else if (!strcmp(child->name, "stmpe_rotator")) {
			pdata->blocks |= STMPE_BLOCK_ROTATOR;
1218 1219 1220 1221
		}
	}
}

1222
/* Called from client specific probe routines */
1223
int stmpe_probe(struct stmpe_client_info *ci, enum stmpe_partnum partnum)
S
Sundar Iyer 已提交
1224
{
1225
	struct stmpe_platform_data *pdata;
1226
	struct device_node *np = ci->dev->of_node;
1227 1228 1229
	struct stmpe *stmpe;
	int ret;

1230 1231 1232
	pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return -ENOMEM;
V
Viresh Kumar 已提交
1233

1234
	stmpe_of_probe(pdata, np);
1235

1236 1237
	if (of_find_property(np, "interrupts", NULL) == NULL)
		ci->irq = -1;
1238

V
Viresh Kumar 已提交
1239
	stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);
1240 1241 1242 1243 1244 1245
	if (!stmpe)
		return -ENOMEM;

	mutex_init(&stmpe->irq_lock);
	mutex_init(&stmpe->lock);

1246 1247
	stmpe->dev = ci->dev;
	stmpe->client = ci->client;
1248
	stmpe->pdata = pdata;
1249 1250 1251
	stmpe->ci = ci;
	stmpe->partnum = partnum;
	stmpe->variant = stmpe_variant_info[partnum];
1252 1253
	stmpe->regs = stmpe->variant->regs;
	stmpe->num_gpios = stmpe->variant->num_gpios;
1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265
	stmpe->vcc = devm_regulator_get_optional(ci->dev, "vcc");
	if (!IS_ERR(stmpe->vcc)) {
		ret = regulator_enable(stmpe->vcc);
		if (ret)
			dev_warn(ci->dev, "failed to enable VCC supply\n");
	}
	stmpe->vio = devm_regulator_get_optional(ci->dev, "vio");
	if (!IS_ERR(stmpe->vio)) {
		ret = regulator_enable(stmpe->vio);
		if (ret)
			dev_warn(ci->dev, "failed to enable VIO supply\n");
	}
1266
	dev_set_drvdata(stmpe->dev, stmpe);
1267

1268 1269
	if (ci->init)
		ci->init(stmpe);
1270

1271
	if (pdata->irq_over_gpio) {
V
Viresh Kumar 已提交
1272 1273
		ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio,
				GPIOF_DIR_IN, "stmpe");
1274 1275 1276
		if (ret) {
			dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
					ret);
V
Viresh Kumar 已提交
1277
			return ret;
1278 1279 1280 1281
		}

		stmpe->irq = gpio_to_irq(pdata->irq_gpio);
	} else {
1282
		stmpe->irq = ci->irq;
1283 1284
	}

1285 1286 1287 1288 1289 1290 1291 1292 1293
	if (stmpe->irq < 0) {
		/* use alternate variant info for no-irq mode, if supported */
		dev_info(stmpe->dev,
			"%s configured in no-irq mode by platform data\n",
			stmpe->variant->name);
		if (!stmpe_noirq_variant_info[stmpe->partnum]) {
			dev_err(stmpe->dev,
				"%s does not support no-irq mode!\n",
				stmpe->variant->name);
V
Viresh Kumar 已提交
1294
			return -ENODEV;
1295 1296
		}
		stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum];
1297
	} else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) {
1298
		pdata->irq_trigger = irq_get_trigger_type(stmpe->irq);
1299 1300
	}

1301 1302
	ret = stmpe_chip_init(stmpe);
	if (ret)
V
Viresh Kumar 已提交
1303
		return ret;
1304

1305
	if (stmpe->irq >= 0) {
1306
		ret = stmpe_irq_init(stmpe, np);
1307
		if (ret)
V
Viresh Kumar 已提交
1308
			return ret;
1309

V
Viresh Kumar 已提交
1310 1311
		ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL,
				stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT,
1312 1313 1314 1315
				"stmpe", stmpe);
		if (ret) {
			dev_err(stmpe->dev, "failed to request IRQ: %d\n",
					ret);
V
Viresh Kumar 已提交
1316
			return ret;
1317
		}
1318 1319 1320
	}

	ret = stmpe_devices_init(stmpe);
V
Viresh Kumar 已提交
1321 1322
	if (!ret)
		return 0;
1323

V
Viresh Kumar 已提交
1324
	dev_err(stmpe->dev, "failed to add children\n");
1325
	mfd_remove_devices(stmpe->dev);
V
Viresh Kumar 已提交
1326

1327 1328 1329
	return ret;
}

1330
int stmpe_remove(struct stmpe *stmpe)
1331
{
1332 1333 1334 1335 1336
	if (!IS_ERR(stmpe->vio))
		regulator_disable(stmpe->vio);
	if (!IS_ERR(stmpe->vcc))
		regulator_disable(stmpe->vcc);

1337 1338 1339 1340 1341
	mfd_remove_devices(stmpe->dev);

	return 0;
}

S
Sundar Iyer 已提交
1342
#ifdef CONFIG_PM
1343 1344 1345
static int stmpe_suspend(struct device *dev)
{
	struct stmpe *stmpe = dev_get_drvdata(dev);
S
Sundar Iyer 已提交
1346

1347
	if (stmpe->irq >= 0 && device_may_wakeup(dev))
1348
		enable_irq_wake(stmpe->irq);
1349

1350
	return 0;
1351 1352
}

1353
static int stmpe_resume(struct device *dev)
1354
{
1355 1356
	struct stmpe *stmpe = dev_get_drvdata(dev);

1357
	if (stmpe->irq >= 0 && device_may_wakeup(dev))
1358 1359 1360
		disable_irq_wake(stmpe->irq);

	return 0;
1361 1362
}

1363 1364 1365 1366 1367
const struct dev_pm_ops stmpe_dev_pm_ops = {
	.suspend	= stmpe_suspend,
	.resume		= stmpe_resume,
};
#endif