pci.h 63.5 KB
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/*
 *	pci.h
 *
 *	PCI defines and function prototypes
 *	Copyright 1994, Drew Eckhardt
 *	Copyright 1997--1999 Martin Mares <mj@ucw.cz>
 *
 *	For more information, please consult the following manuals (look at
 *	http://www.pcisig.com/ for how to get them):
 *
 *	PCI BIOS Specification
 *	PCI Local Bus Specification
 *	PCI to PCI Bridge Specification
 *	PCI System Design Guide
 */
#ifndef LINUX_PCI_H
#define LINUX_PCI_H


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#include <linux/mod_devicetable.h>

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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
#include <linux/list.h>
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#include <linux/compiler.h>
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#include <linux/errno.h>
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#include <linux/kobject.h>
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#include <linux/atomic.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <uapi/linux/pci.h>
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#include <linux/pci_ids.h>

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/*
 * The PCI interface treats multi-function devices as independent
 * devices.  The slot/function address of each device is encoded
 * in a single byte as follows:
 *
 *	7:3 = slot
 *	2:0 = function
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 *
 * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h.
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 * In the interest of not exposing interfaces to user-space unnecessarily,
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 * the following kernel-only defines are being added here.
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 */
#define PCI_DEVID(bus, devfn)  ((((u16)bus) << 8) | devfn)
/* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */
#define PCI_BUS_NUM(x) (((x) >> 8) & 0xff)

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/* pci_slot represents a physical slot */
struct pci_slot {
	struct pci_bus *bus;		/* The bus this slot is on */
	struct list_head list;		/* node in list of slots on this bus */
	struct hotplug_slot *hotplug;	/* Hotplug info (migrate over time) */
	unsigned char number;		/* PCI_SLOT(pci_dev->devfn) */
	struct kobject kobj;
};

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static inline const char *pci_slot_name(const struct pci_slot *slot)
{
	return kobject_name(&slot->kobj);
}

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/* File state for mmap()s on /proc/bus/pci/X/Y */
enum pci_mmap_state {
	pci_mmap_io,
	pci_mmap_mem
};

/* This defines the direction arg to the DMA mapping routines. */
#define PCI_DMA_BIDIRECTIONAL	0
#define PCI_DMA_TODEVICE	1
#define PCI_DMA_FROMDEVICE	2
#define PCI_DMA_NONE		3

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/*
 *  For PCI devices, the region numbers are assigned this way:
 */
enum {
	/* #0-5: standard PCI resources */
	PCI_STD_RESOURCES,
	PCI_STD_RESOURCE_END = 5,

	/* #6: expansion ROM resource */
	PCI_ROM_RESOURCE,

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	/* device specific resources */
#ifdef CONFIG_PCI_IOV
	PCI_IOV_RESOURCES,
	PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
#endif

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	/* resources assigned to buses behind the bridge */
#define PCI_BRIDGE_RESOURCE_NUM 4

	PCI_BRIDGE_RESOURCES,
	PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
				  PCI_BRIDGE_RESOURCE_NUM - 1,

	/* total resources associated with a PCI device */
	PCI_NUM_RESOURCES,

	/* preserve this for compatibility */
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	DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
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};
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typedef int __bitwise pci_power_t;

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#define PCI_D0		((pci_power_t __force) 0)
#define PCI_D1		((pci_power_t __force) 1)
#define PCI_D2		((pci_power_t __force) 2)
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#define PCI_D3hot	((pci_power_t __force) 3)
#define PCI_D3cold	((pci_power_t __force) 4)
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#define PCI_UNKNOWN	((pci_power_t __force) 5)
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#define PCI_POWER_ERROR	((pci_power_t __force) -1)
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/* Remember to update this when the list above changes! */
extern const char *pci_power_names[];

static inline const char *pci_power_name(pci_power_t state)
{
	return pci_power_names[1 + (int) state];
}

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#define PCI_PM_D2_DELAY		200
#define PCI_PM_D3_WAIT		10
#define PCI_PM_D3COLD_WAIT	100
#define PCI_PM_BUS_WAIT		50
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/** The pci_channel state describes connectivity between the CPU and
 *  the pci device.  If some PCI bus between here and the pci device
 *  has crashed or locked up, this info is reflected here.
 */
typedef unsigned int __bitwise pci_channel_state_t;

enum pci_channel_state {
	/* I/O channel is in normal state */
	pci_channel_io_normal = (__force pci_channel_state_t) 1,

	/* I/O to channel is blocked */
	pci_channel_io_frozen = (__force pci_channel_state_t) 2,

	/* PCI card is dead */
	pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
};

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typedef unsigned int __bitwise pcie_reset_state_t;

enum pcie_reset_state {
	/* Reset is NOT asserted (Use to deassert reset) */
	pcie_deassert_reset = (__force pcie_reset_state_t) 1,

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	/* Use #PERST to reset PCIe device */
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	pcie_warm_reset = (__force pcie_reset_state_t) 2,

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	/* Use PCIe Hot Reset to reset device */
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	pcie_hot_reset = (__force pcie_reset_state_t) 3
};

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typedef unsigned short __bitwise pci_dev_flags_t;
enum pci_dev_flags {
	/* INTX_DISABLE in PCI_COMMAND register disables MSI
	 * generation too.
	 */
	PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
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	/* Device configuration is irrevocably lost if disabled into D3 */
	PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
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	/* Provide indication device is assigned by a Virtual Machine Manager */
	PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) 4,
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	/* Flag for quirk use to store if quirk-specific ACS is enabled */
	PCI_DEV_FLAGS_ACS_ENABLED_QUIRK = (__force pci_dev_flags_t) 8,
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};

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enum pci_irq_reroute_variant {
	INTEL_IRQ_REROUTE_VARIANT = 1,
	MAX_IRQ_REROUTE_VARIANTS = 3
};

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typedef unsigned short __bitwise pci_bus_flags_t;
enum pci_bus_flags {
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	PCI_BUS_FLAGS_NO_MSI   = (__force pci_bus_flags_t) 1,
	PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
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};

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/* These values come from the PCI Express Spec */
enum pcie_link_width {
	PCIE_LNK_WIDTH_RESRV	= 0x00,
	PCIE_LNK_X1		= 0x01,
	PCIE_LNK_X2		= 0x02,
	PCIE_LNK_X4		= 0x04,
	PCIE_LNK_X8		= 0x08,
	PCIE_LNK_X12		= 0x0C,
	PCIE_LNK_X16		= 0x10,
	PCIE_LNK_X32		= 0x20,
	PCIE_LNK_WIDTH_UNKNOWN  = 0xFF,
};

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/* Based on the PCI Hotplug Spec, but some values are made up by us */
enum pci_bus_speed {
	PCI_SPEED_33MHz			= 0x00,
	PCI_SPEED_66MHz			= 0x01,
	PCI_SPEED_66MHz_PCIX		= 0x02,
	PCI_SPEED_100MHz_PCIX		= 0x03,
	PCI_SPEED_133MHz_PCIX		= 0x04,
	PCI_SPEED_66MHz_PCIX_ECC	= 0x05,
	PCI_SPEED_100MHz_PCIX_ECC	= 0x06,
	PCI_SPEED_133MHz_PCIX_ECC	= 0x07,
	PCI_SPEED_66MHz_PCIX_266	= 0x09,
	PCI_SPEED_100MHz_PCIX_266	= 0x0a,
	PCI_SPEED_133MHz_PCIX_266	= 0x0b,
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	AGP_UNKNOWN			= 0x0c,
	AGP_1X				= 0x0d,
	AGP_2X				= 0x0e,
	AGP_4X				= 0x0f,
	AGP_8X				= 0x10,
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	PCI_SPEED_66MHz_PCIX_533	= 0x11,
	PCI_SPEED_100MHz_PCIX_533	= 0x12,
	PCI_SPEED_133MHz_PCIX_533	= 0x13,
	PCIE_SPEED_2_5GT		= 0x14,
	PCIE_SPEED_5_0GT		= 0x15,
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	PCIE_SPEED_8_0GT		= 0x16,
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	PCI_SPEED_UNKNOWN		= 0xff,
};

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struct pci_cap_saved_data {
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	u16 cap_nr;
	bool cap_extended;
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	unsigned int size;
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	u32 data[0];
};

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struct pci_cap_saved_state {
	struct hlist_node next;
	struct pci_cap_saved_data cap;
};

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struct pcie_link_state;
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struct pci_vpd;
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struct pci_sriov;
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struct pci_ats;
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/*
 * The pci_dev structure is used to describe PCI devices.
 */
struct pci_dev {
	struct list_head bus_list;	/* node in per-bus list */
	struct pci_bus	*bus;		/* bus this device is on */
	struct pci_bus	*subordinate;	/* bus this device bridges to */

	void		*sysdata;	/* hook for sys-specific extension */
	struct proc_dir_entry *procent;	/* device entry in /proc/bus/pci */
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	struct pci_slot	*slot;		/* Physical slot this device is in */
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	unsigned int	devfn;		/* encoded device & function index */
	unsigned short	vendor;
	unsigned short	device;
	unsigned short	subsystem_vendor;
	unsigned short	subsystem_device;
	unsigned int	class;		/* 3 bytes: (base,sub,prog-if) */
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	u8		revision;	/* PCI revision, low byte of class word */
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	u8		hdr_type;	/* PCI header type (`multi' flag masked out) */
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	u8		pcie_cap;	/* PCIe capability offset */
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	u8		msi_cap;	/* MSI capability offset */
	u8		msix_cap;	/* MSI-X capability offset */
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	u8		pcie_mpss:3;	/* PCIe Max Payload Size Supported */
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	u8		rom_base_reg;	/* which config register controls the ROM */
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	u8		pin;		/* which interrupt pin this device uses */
	u16		pcie_flags_reg;	/* cached PCIe Capabilities Register */
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	struct pci_driver *driver;	/* which driver has allocated this device */
	u64		dma_mask;	/* Mask of the bits of bus address this
					   device implements.  Normally this is
					   0xffffffff.  You only need to change
					   this if your device has broken DMA
					   or supports 64-bit transfers.  */

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	struct device_dma_parameters dma_parms;

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	pci_power_t     current_state;  /* Current operating state. In ACPI-speak,
					   this is D0-D3, D0 being fully functional,
					   and D3 being off. */
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	u8		pm_cap;		/* PM capability offset */
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	unsigned int	pme_support:5;	/* Bitmask of states from which PME#
					   can be generated */
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	unsigned int	pme_interrupt:1;
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	unsigned int	pme_poll:1;	/* Poll device's PME status bit */
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	unsigned int	d1_support:1;	/* Low power state D1 is supported */
	unsigned int	d2_support:1;	/* Low power state D2 is supported */
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	unsigned int	no_d1d2:1;	/* D1 and D2 are forbidden */
	unsigned int	no_d3cold:1;	/* D3cold is forbidden */
	unsigned int	d3cold_allowed:1;	/* D3cold is allowed by user */
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	unsigned int	mmio_always_on:1;	/* disallow turning off io/mem
						   decoding during bar sizing */
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	unsigned int	wakeup_prepared:1;
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	unsigned int	runtime_d3cold:1;	/* whether go through runtime
						   D3cold, not set for devices
						   powered on/off by the
						   corresponding bridge */
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	unsigned int	d3_delay;	/* D3->D0 transition time in ms */
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	unsigned int	d3cold_delay;	/* D3cold->D0 transition time in ms */
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#ifdef CONFIG_PCIEASPM
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	struct pcie_link_state	*link_state;	/* ASPM link state */
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#endif

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	pci_channel_state_t error_state;	/* current connectivity state */
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	struct	device	dev;		/* Generic device interface */

	int		cfg_size;	/* Size of configuration space */

	/*
	 * Instead of touching interrupt line and base address registers
	 * directly, use the values stored here. They might be different!
	 */
	unsigned int	irq;
	struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */

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	bool match_driver;		/* Skip attaching driver */
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	/* These fields are used by common fixups */
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	unsigned int	transparent:1;	/* Subtractive decode PCI bridge */
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	unsigned int	multifunction:1;/* Part of multi-function device */
	/* keep track of device state */
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	unsigned int	is_added:1;
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	unsigned int	is_busmaster:1; /* device is busmaster */
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	unsigned int	no_msi:1;	/* device may not use msi */
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	unsigned int	block_cfg_access:1;	/* config space access is blocked */
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	unsigned int	broken_parity_status:1;	/* Device generates false positive parity */
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	unsigned int	irq_reroute_variant:2;	/* device needs IRQ rerouting variant */
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	unsigned int	msi_enabled:1;
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	unsigned int	msix_enabled:1;
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	unsigned int	ari_enabled:1;	/* ARI forwarding */
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	unsigned int	is_managed:1;
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	unsigned int    needs_freset:1; /* Dev requires fundamental reset */
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	unsigned int	state_saved:1;
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	unsigned int	is_physfn:1;
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	unsigned int	is_virtfn:1;
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	unsigned int	reset_fn:1;
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	unsigned int    is_hotplug_bridge:1;
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	unsigned int    __aer_firmware_first_valid:1;
	unsigned int	__aer_firmware_first:1;
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	unsigned int	broken_intx_masking:1;
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	unsigned int	io_window_1k:1;	/* Intel P2P bridge 1K I/O windows */
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	pci_dev_flags_t dev_flags;
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	atomic_t	enable_cnt;	/* pci_enable_device has been called */
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	u32		saved_config_space[16]; /* config space saved at suspend time */
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	struct hlist_head saved_cap_space;
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	struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
	int rom_attr_enabled;		/* has display of the rom attribute been enabled? */
	struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
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	struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
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#ifdef CONFIG_PCI_MSI
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	struct list_head msi_list;
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	const struct attribute_group **msi_irq_groups;
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#endif
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	struct pci_vpd *vpd;
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#ifdef CONFIG_PCI_ATS
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	union {
		struct pci_sriov *sriov;	/* SR-IOV capability related */
		struct pci_dev *physfn;	/* the PF this VF is associated with */
	};
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	struct pci_ats	*ats;	/* Address Translation Service */
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#endif
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	phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
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	size_t romlen; /* Length of ROM if it's not from the BAR */
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};

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static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
{
#ifdef CONFIG_PCI_IOV
	if (dev->is_virtfn)
		dev = dev->physfn;
#endif
	return dev;
}

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struct pci_dev *pci_alloc_dev(struct pci_bus *bus);
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#define	to_pci_dev(n) container_of(n, struct pci_dev, dev)
#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)

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static inline int pci_channel_offline(struct pci_dev *pdev)
{
	return (pdev->error_state != pci_channel_io_normal);
}

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struct pci_host_bridge_window {
	struct list_head list;
	struct resource *res;		/* host bridge aperture (CPU address) */
	resource_size_t offset;		/* bus address + offset = CPU address */
};
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struct pci_host_bridge {
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	struct device dev;
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	struct pci_bus *bus;		/* root bus */
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	struct list_head windows;	/* pci_host_bridge_windows */
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	void (*release_fn)(struct pci_host_bridge *);
	void *release_data;
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};
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#define	to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
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void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
		     void (*release_fn)(struct pci_host_bridge *),
		     void *release_data);
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int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);

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/*
 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
 * to P2P or CardBus bridge windows) go in a table.  Additional ones (for
 * buses below host bridges or subtractive decode bridges) go in the list.
 * Use pci_bus_for_each_resource() to iterate through all the resources.
 */

/*
 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
 * and there's no way to program the bridge with the details of the window.
 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
 * decode bit set, because they are explicit and can be programmed with _SRS.
 */
#define PCI_SUBTRACTIVE_DECODE	0x1

struct pci_bus_resource {
	struct list_head list;
	struct resource *res;
	unsigned int flags;
};
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#define PCI_REGION_FLAG_MASK	0x0fU	/* These bits of resource flags tell us the PCI region flags */
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struct pci_bus {
	struct list_head node;		/* node in list of buses */
	struct pci_bus	*parent;	/* parent bus this bridge is on */
	struct list_head children;	/* list of child buses */
	struct list_head devices;	/* list of devices on this bus */
	struct pci_dev	*self;		/* bridge device as seen by parent */
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	struct list_head slots;		/* list of slots on this bus */
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	struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
	struct list_head resources;	/* address space routed to this bus */
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	struct resource busn_res;	/* bus numbers routed to this bus */
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	struct pci_ops	*ops;		/* configuration access functions */
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	struct msi_chip	*msi;		/* MSI controller */
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	void		*sysdata;	/* hook for sys-specific extension */
	struct proc_dir_entry *procdir;	/* directory entry in /proc/bus/pci */

	unsigned char	number;		/* bus number */
	unsigned char	primary;	/* number of primary bridge */
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	unsigned char	max_bus_speed;	/* enum pci_bus_speed */
	unsigned char	cur_bus_speed;	/* enum pci_bus_speed */
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	char		name[48];

	unsigned short  bridge_ctl;	/* manage NO_ISA/FBB/et al behaviors */
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	pci_bus_flags_t bus_flags;	/* inherited by child buses */
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	struct device		*bridge;
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	struct device		dev;
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	struct bin_attribute	*legacy_io; /* legacy I/O for this bus */
	struct bin_attribute	*legacy_mem; /* legacy mem */
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	unsigned int		is_added:1;
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};

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#define to_pci_bus(n)	container_of(n, struct pci_bus, dev)
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/*
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 * Returns true if the PCI bus is root (behind host-PCI bridge),
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 * false otherwise
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 *
 * Some code assumes that "bus->self == NULL" means that bus is a root bus.
 * This is incorrect because "virtual" buses added for SR-IOV (via
 * virtfn_add_bus()) have "bus->self == NULL" but are not root buses.
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 */
static inline bool pci_is_root_bus(struct pci_bus *pbus)
{
	return !(pbus->parent);
}

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static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
{
	dev = pci_physfn(dev);
	if (pci_is_root_bus(dev->bus))
		return NULL;

	return dev->bus->self;
}

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#ifdef CONFIG_PCI_MSI
static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
{
	return pci_dev->msi_enabled || pci_dev->msix_enabled;
}
#else
static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
#endif

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/*
 * Error values that may be returned by PCI functions.
 */
#define PCIBIOS_SUCCESSFUL		0x00
#define PCIBIOS_FUNC_NOT_SUPPORTED	0x81
#define PCIBIOS_BAD_VENDOR_ID		0x83
#define PCIBIOS_DEVICE_NOT_FOUND	0x86
#define PCIBIOS_BAD_REGISTER_NUMBER	0x87
#define PCIBIOS_SET_FAILED		0x88
#define PCIBIOS_BUFFER_TOO_SMALL	0x89

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/*
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 * Translate above to generic errno for passing back through non-PCI code.
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 */
static inline int pcibios_err_to_errno(int err)
{
	if (err <= PCIBIOS_SUCCESSFUL)
		return err; /* Assume already errno */

	switch (err) {
	case PCIBIOS_FUNC_NOT_SUPPORTED:
		return -ENOENT;
	case PCIBIOS_BAD_VENDOR_ID:
		return -EINVAL;
	case PCIBIOS_DEVICE_NOT_FOUND:
		return -ENODEV;
	case PCIBIOS_BAD_REGISTER_NUMBER:
		return -EFAULT;
	case PCIBIOS_SET_FAILED:
		return -EIO;
	case PCIBIOS_BUFFER_TOO_SMALL:
		return -ENOSPC;
	}

	return -ENOTTY;
}

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/* Low-level architecture-dependent routines */

struct pci_ops {
	int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
	int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
};

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/*
 * ACPI needs to be able to access PCI config space before we've done a
 * PCI bus scan and created pci_bus structures.
 */
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int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
		 int reg, int len, u32 *val);
int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
		  int reg, int len, u32 val);
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struct pci_bus_region {
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	dma_addr_t start;
	dma_addr_t end;
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};

struct pci_dynids {
	spinlock_t lock;            /* protects list, index */
	struct list_head list;      /* for IDs added at runtime */
};

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/*
 * PCI Error Recovery System (PCI-ERS).  If a PCI device driver provides
 * a set of callbacks in struct pci_error_handlers, that device driver
 * will be notified of PCI bus errors, and will be driven to recovery
 * when an error occurs.
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 */

typedef unsigned int __bitwise pci_ers_result_t;

enum pci_ers_result {
	/* no result/none/not supported in device driver */
	PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,

	/* Device driver can recover without slot reset */
	PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,

	/* Device driver wants slot to be reset. */
	PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,

	/* Device has completely failed, is unrecoverable */
	PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,

	/* Device driver is fully recovered and operational */
	PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
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	/* No AER capabilities registered for the driver */
	PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6,
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};

/* PCI bus error event callbacks */
592
struct pci_error_handlers {
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	/* PCI bus error detected on this device */
	pci_ers_result_t (*error_detected)(struct pci_dev *dev,
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					   enum pci_channel_state error);
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	/* MMIO has been re-enabled, but not DMA */
	pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);

	/* PCI Express link has been reset */
	pci_ers_result_t (*link_reset)(struct pci_dev *dev);

	/* PCI slot has been reset */
	pci_ers_result_t (*slot_reset)(struct pci_dev *dev);

	/* Device driver may resume normal operations */
	void (*resume)(struct pci_dev *dev);
};


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struct module;
struct pci_driver {
	struct list_head node;
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	const char *name;
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	const struct pci_device_id *id_table;	/* must be non-NULL for probe to be called */
	int  (*probe)  (struct pci_dev *dev, const struct pci_device_id *id);	/* New device inserted */
	void (*remove) (struct pci_dev *dev);	/* Device removed (NULL if not a hot-plug capable driver) */
	int  (*suspend) (struct pci_dev *dev, pm_message_t state);	/* Device suspended */
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	int  (*suspend_late) (struct pci_dev *dev, pm_message_t state);
	int  (*resume_early) (struct pci_dev *dev);
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	int  (*resume) (struct pci_dev *dev);	                /* Device woken up */
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	void (*shutdown) (struct pci_dev *dev);
623
	int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */
624
	const struct pci_error_handlers *err_handler;
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	struct device_driver	driver;
	struct pci_dynids dynids;
};

629
#define	to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
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631
/**
632
 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
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 * @_table: device table name
 *
635
 * This macro is deprecated and should not be used in new code.
636
 */
637
#define DEFINE_PCI_DEVICE_TABLE(_table) \
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	const struct pci_device_id _table[]
639

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/**
 * PCI_DEVICE - macro used to describe a specific pci device
 * @vend: the 16 bit PCI Vendor ID
 * @dev: the 16 bit PCI Device ID
 *
 * This macro is used to create a struct pci_device_id that matches a
 * specific device.  The subvendor and subdevice fields will be set to
 * PCI_ANY_ID.
 */
#define PCI_DEVICE(vend,dev) \
	.vendor = (vend), .device = (dev), \
	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID

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/**
 * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem
 * @vend: the 16 bit PCI Vendor ID
 * @dev: the 16 bit PCI Device ID
 * @subvend: the 16 bit PCI Subvendor ID
 * @subdev: the 16 bit PCI Subdevice ID
 *
 * This macro is used to create a struct pci_device_id that matches a
 * specific device with subsystem information.
 */
#define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \
	.vendor = (vend), .device = (dev), \
	.subvendor = (subvend), .subdevice = (subdev)

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/**
 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
 * @dev_class: the class, subclass, prog-if triple for this device
 * @dev_class_mask: the class mask for this device
 *
 * This macro is used to create a struct pci_device_id that matches a
673
 * specific PCI class.  The vendor, device, subvendor, and subdevice
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 * fields will be set to PCI_ANY_ID.
 */
#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
	.class = (dev_class), .class_mask = (dev_class_mask), \
	.vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID

681 682
/**
 * PCI_VDEVICE - macro used to describe a specific pci device in short form
683 684
 * @vendor: the vendor name
 * @device: the 16 bit PCI Device ID
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 *
 * This macro is used to create a struct pci_device_id that matches a
 * specific PCI device.  The subvendor, and subdevice fields will be set
 * to PCI_ANY_ID. The macro allows the next field to follow as the device
 * private data.
 */

#define PCI_VDEVICE(vendor, device)		\
	PCI_VENDOR_ID_##vendor, (device),	\
	PCI_ANY_ID, PCI_ANY_ID, 0, 0

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/* these external functions are only available when PCI support is enabled */
#ifdef CONFIG_PCI

699
void pcie_bus_configure_settings(struct pci_bus *bus);
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enum pcie_bus_config_types {
702
	PCIE_BUS_TUNE_OFF,
703
	PCIE_BUS_SAFE,
704
	PCIE_BUS_PERFORMANCE,
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	PCIE_BUS_PEER2PEER,
};

extern enum pcie_bus_config_types pcie_bus_config;

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extern struct bus_type pci_bus_type;

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/* Do NOT directly access these two variables, unless you are arch-specific PCI
 * code, or PCI core code. */
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extern struct list_head pci_root_buses;	/* list of all known PCI buses */
715
/* Some device drivers need know if PCI is initiated */
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int no_pci_devices(void);
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void pcibios_resource_survey_bus(struct pci_bus *bus);
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void pcibios_add_bus(struct pci_bus *bus);
void pcibios_remove_bus(struct pci_bus *bus);
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void pcibios_fixup_bus(struct pci_bus *);
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int __must_check pcibios_enable_device(struct pci_dev *, int mask);
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/* Architecture-specific versions may override this (weak) */
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char *pcibios_setup(char *str);
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/* Used only when drivers/pci/setup.c is used */
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resource_size_t pcibios_align_resource(void *, const struct resource *,
728
				resource_size_t,
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				resource_size_t);
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void pcibios_update_irq(struct pci_dev *, int irq);

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/* Weak but can be overriden by arch */
void pci_fixup_cardbus(struct pci_bus *);

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/* Generic PCI functions used internally */

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void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,
738
			     struct resource *res);
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void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
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			     struct pci_bus_region *region);
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void pcibios_scan_specific_bus(int busn);
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struct pci_bus *pci_find_bus(int domain, int busnr);
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void pci_bus_add_devices(const struct pci_bus *bus);
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struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
				      struct pci_ops *ops, void *sysdata);
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struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata);
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struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
				    struct pci_ops *ops, void *sysdata,
				    struct list_head *resources);
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int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
void pci_bus_release_busn_res(struct pci_bus *b);
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struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
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					     struct pci_ops *ops, void *sysdata,
					     struct list_head *resources);
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struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
				int busnr);
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void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
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struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
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				 const char *name,
				 struct hotplug_slot *hotplug);
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void pci_destroy_slot(struct pci_slot *slot);
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int pci_scan_slot(struct pci_bus *bus, int devfn);
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struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
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void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
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unsigned int pci_scan_child_bus(struct pci_bus *bus);
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int __must_check pci_bus_add_device(struct pci_dev *dev);
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void pci_read_bridge_bases(struct pci_bus *child);
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struct resource *pci_find_parent_resource(const struct pci_dev *dev,
					  struct resource *res);
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u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin);
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int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
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u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
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struct pci_dev *pci_dev_get(struct pci_dev *dev);
void pci_dev_put(struct pci_dev *dev);
void pci_remove_bus(struct pci_bus *b);
void pci_stop_and_remove_bus_device(struct pci_dev *dev);
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void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev);
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void pci_stop_root_bus(struct pci_bus *bus);
void pci_remove_root_bus(struct pci_bus *bus);
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void pci_setup_cardbus(struct pci_bus *bus);
782
void pci_sort_breadthfirst(void);
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#define dev_is_pci(d) ((d)->bus == &pci_bus_type)
#define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
#define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0))
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/* Generic PCI functions exported to card drivers */

789 790 791 792 793 794 795
enum pci_lost_interrupt_reason {
	PCI_LOST_IRQ_NO_INFORMATION = 0,
	PCI_LOST_IRQ_DISABLE_MSI,
	PCI_LOST_IRQ_DISABLE_MSIX,
	PCI_LOST_IRQ_DISABLE_ACPI,
};
enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
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int pci_find_capability(struct pci_dev *dev, int cap);
int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
int pci_find_ext_capability(struct pci_dev *dev, int cap);
799
int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap);
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int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
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struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
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804 805
struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
				struct pci_dev *from);
806
struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
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				unsigned int ss_vendor, unsigned int ss_device,
808
				struct pci_dev *from);
809
struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
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struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
					    unsigned int devfn);
static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
						   unsigned int devfn)
{
	return pci_get_domain_bus_and_slot(0, bus, devfn);
}
817
struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
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int pci_dev_present(const struct pci_device_id *ids);

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int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
			     int where, u8 *val);
int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
			     int where, u16 *val);
int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
			      int where, u32 *val);
int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
			      int where, u8 val);
int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
			      int where, u16 val);
int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
			       int where, u32 val);
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struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
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834
static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
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{
836
	return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
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}
838
static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val)
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{
840
	return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
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}
842
static inline int pci_read_config_dword(const struct pci_dev *dev, int where,
843
					u32 *val)
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{
845
	return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
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}
847
static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val)
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{
849
	return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
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}
851
static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val)
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{
853
	return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
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}
855
static inline int pci_write_config_dword(const struct pci_dev *dev, int where,
856
					 u32 val)
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{
858
	return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
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}

861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893
int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val);
int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val);
int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
				       u16 clear, u16 set);
int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
					u32 clear, u32 set);

static inline int pcie_capability_set_word(struct pci_dev *dev, int pos,
					   u16 set)
{
	return pcie_capability_clear_and_set_word(dev, pos, 0, set);
}

static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos,
					    u32 set)
{
	return pcie_capability_clear_and_set_dword(dev, pos, 0, set);
}

static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos,
					     u16 clear)
{
	return pcie_capability_clear_and_set_word(dev, pos, clear, 0);
}

static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos,
					      u32 clear)
{
	return pcie_capability_clear_and_set_dword(dev, pos, clear, 0);
}

894 895 896 897 898 899 900 901
/* user-space driven config access */
int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);

902
int __must_check pci_enable_device(struct pci_dev *dev);
903 904
int __must_check pci_enable_device_io(struct pci_dev *dev);
int __must_check pci_enable_device_mem(struct pci_dev *dev);
905
int __must_check pci_reenable_device(struct pci_dev *);
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int __must_check pcim_enable_device(struct pci_dev *pdev);
void pcim_pin_device(struct pci_dev *pdev);

909 910 911 912 913
static inline int pci_is_enabled(struct pci_dev *pdev)
{
	return (atomic_read(&pdev->enable_cnt) > 0);
}

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static inline int pci_is_managed(struct pci_dev *pdev)
{
	return pdev->is_managed;
}

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void pci_disable_device(struct pci_dev *dev);
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extern unsigned int pcibios_max_latency;
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void pci_set_master(struct pci_dev *dev);
923
void pci_clear_master(struct pci_dev *dev);
924

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int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
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int pci_set_cacheline_size(struct pci_dev *dev);
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#define HAVE_PCI_SET_MWI
928
int __must_check pci_set_mwi(struct pci_dev *dev);
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int pci_try_set_mwi(struct pci_dev *dev);
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void pci_clear_mwi(struct pci_dev *dev);
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void pci_intx(struct pci_dev *dev, int enable);
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bool pci_intx_mask_supported(struct pci_dev *dev);
bool pci_check_and_mask_intx(struct pci_dev *dev);
bool pci_check_and_unmask_intx(struct pci_dev *dev);
935
void pci_msi_off(struct pci_dev *dev);
936
int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
937
int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
938
int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask);
939
int pci_wait_for_pending_transaction(struct pci_dev *dev);
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int pcix_get_max_mmrbc(struct pci_dev *dev);
int pcix_get_mmrbc(struct pci_dev *dev);
int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
943
int pcie_get_readrq(struct pci_dev *dev);
944
int pcie_set_readrq(struct pci_dev *dev, int rq);
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int pcie_get_mps(struct pci_dev *dev);
int pcie_set_mps(struct pci_dev *dev, int mps);
947 948
int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,
			  enum pcie_link_width *width);
Y
Yu Zhao 已提交
949
int __pci_reset_function(struct pci_dev *dev);
950
int __pci_reset_function_locked(struct pci_dev *dev);
951
int pci_reset_function(struct pci_dev *dev);
952
int pci_try_reset_function(struct pci_dev *dev);
953
int pci_probe_reset_slot(struct pci_slot *slot);
954
int pci_reset_slot(struct pci_slot *slot);
955
int pci_try_reset_slot(struct pci_slot *slot);
956
int pci_probe_reset_bus(struct pci_bus *bus);
957
int pci_reset_bus(struct pci_bus *bus);
958
int pci_try_reset_bus(struct pci_bus *bus);
959
void pci_reset_bridge_secondary_bus(struct pci_dev *dev);
960
void pci_update_resource(struct pci_dev *dev, int resno);
961
int __must_check pci_assign_resource(struct pci_dev *dev, int i);
962
int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
963
int pci_select_bars(struct pci_dev *dev, unsigned long flags);
964
bool pci_device_is_present(struct pci_dev *pdev);
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965 966

/* ROM control related routines */
A
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967 968
int pci_enable_rom(struct pci_dev *pdev);
void pci_disable_rom(struct pci_dev *pdev);
969
void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
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void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
971
size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
972
void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size);
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973 974 975

/* Power management related routines */
int pci_save_state(struct pci_dev *dev);
976
void pci_restore_state(struct pci_dev *dev);
977 978 979
struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
int pci_load_and_free_saved_state(struct pci_dev *dev,
				  struct pci_saved_state **state);
980 981 982 983 984 985
struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap);
struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev,
						   u16 cap);
int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size);
int pci_add_ext_cap_save_buffer(struct pci_dev *dev,
				u16 cap, unsigned int size);
986
int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
987 988
int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
989
bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
990
void pci_pme_active(struct pci_dev *dev, bool enable);
991 992
int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
		      bool runtime, bool enable);
993
int pci_wake_from_d3(struct pci_dev *dev, bool enable);
994 995
int pci_prepare_to_sleep(struct pci_dev *dev);
int pci_back_from_sleep(struct pci_dev *dev);
996
bool pci_dev_run_wake(struct pci_dev *dev);
997 998
bool pci_check_pme_status(struct pci_dev *dev);
void pci_pme_wakeup_bus(struct pci_bus *bus);
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1000 1001 1002 1003 1004
static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
				  bool enable)
{
	return __pci_enable_wake(dev, state, false, enable);
}
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1006 1007 1008 1009
/* PCI Virtual Channel */
int pci_save_vc_state(struct pci_dev *dev);
void pci_restore_vc_state(struct pci_dev *dev);
void pci_allocate_vc_save_buffers(struct pci_dev *dev);
1010

1011 1012 1013 1014
/* For use by arch with custom probe code */
void set_pcie_port_type(struct pci_dev *pdev);
void set_pcie_hotplug_bridge(struct pci_dev *pdev);

1015
/* Functions for PCI Hotplug drivers to use */
1016
int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
1017
unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge);
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1018
unsigned int pci_rescan_bus(struct pci_bus *bus);
1019 1020
void pci_lock_rescan_remove(void);
void pci_unlock_rescan_remove(void);
1021

1022 1023 1024 1025
/* Vital product data routines */
ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);

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/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
1027
resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx);
1028
void pci_bus_assign_resources(const struct pci_bus *bus);
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void pci_bus_size_bridges(struct pci_bus *bus);
int pci_claim_resource(struct pci_dev *, int);
void pci_assign_unassigned_resources(void);
1032
void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
1033
void pci_assign_unassigned_bus_resources(struct pci_bus *bus);
1034
void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus);
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void pdev_enable_device(struct pci_dev *);
1036
int pci_enable_resources(struct pci_dev *, int mask);
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void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
1038
		    int (*)(const struct pci_dev *, u8, u8));
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#define HAVE_PCI_REQ_REGIONS	2
1040
int __must_check pci_request_regions(struct pci_dev *, const char *);
1041
int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
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void pci_release_regions(struct pci_dev *);
1043
int __must_check pci_request_region(struct pci_dev *, int, const char *);
1044
int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
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void pci_release_region(struct pci_dev *, int);
1046
int pci_request_selected_regions(struct pci_dev *, int, const char *);
1047
int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
1048
void pci_release_selected_regions(struct pci_dev *, int);
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/* drivers/pci/bus.c */
1051 1052
struct pci_bus *pci_bus_get(struct pci_bus *bus);
void pci_bus_put(struct pci_bus *bus);
1053
void pci_add_resource(struct list_head *resources, struct resource *res);
1054 1055
void pci_add_resource_offset(struct list_head *resources, struct resource *res,
			     resource_size_t offset);
1056
void pci_free_resource_list(struct list_head *resources);
1057 1058 1059 1060
void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
void pci_bus_remove_resources(struct pci_bus *bus);

1061
#define pci_bus_for_each_resource(bus, res, i)				\
1062 1063 1064
	for (i = 0;							\
	    (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
	     i++)
1065

1066 1067 1068
int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
			struct resource *res, resource_size_t size,
			resource_size_t align, resource_size_t min,
1069
			unsigned long type_mask,
1070 1071
			resource_size_t (*alignf)(void *,
						  const struct resource *,
1072 1073
						  resource_size_t,
						  resource_size_t),
1074
			void *alignf_data);
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Linus Torvalds 已提交
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1076 1077 1078 1079 1080 1081 1082 1083
static inline dma_addr_t pci_bus_address(struct pci_dev *pdev, int bar)
{
	struct pci_bus_region region;

	pcibios_resource_to_bus(pdev->bus, &region, &pdev->resource[bar]);
	return region.start;
}

1084
/* Proper probing supporting hot-pluggable devices */
1085 1086
int __must_check __pci_register_driver(struct pci_driver *, struct module *,
				       const char *mod_name);
1087 1088 1089 1090 1091 1092

/*
 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
 */
#define pci_register_driver(driver)		\
	__pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
1093

1094
void pci_unregister_driver(struct pci_driver *dev);
1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107

/**
 * module_pci_driver() - Helper macro for registering a PCI driver
 * @__pci_driver: pci_driver struct
 *
 * Helper macro for PCI drivers which do not do anything special in module
 * init/exit. This eliminates a lot of boilerplate. Each module may only
 * use this macro once, and calling it replaces module_init() and module_exit()
 */
#define module_pci_driver(__pci_driver) \
	module_driver(__pci_driver, pci_register_driver, \
		       pci_unregister_driver)

1108
struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
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Tejun Heo 已提交
1109 1110 1111 1112 1113
int pci_add_dynid(struct pci_driver *drv,
		  unsigned int vendor, unsigned int device,
		  unsigned int subvendor, unsigned int subdevice,
		  unsigned int class, unsigned int class_mask,
		  unsigned long driver_data);
1114 1115 1116 1117
const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
					 struct pci_dev *dev);
int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
		    int pass);
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Linus Torvalds 已提交
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1119
void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
1120
		  void *userdata);
1121
int pci_cfg_space_size(struct pci_dev *dev);
1122
unsigned char pci_bus_max_busnr(struct pci_bus *bus);
1123
void pci_setup_bridge(struct pci_bus *bus);
1124 1125
resource_size_t pcibios_window_alignment(struct pci_bus *bus,
					 unsigned long type);
1126

1127 1128 1129
#define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
#define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)

1130
int pci_set_vga_state(struct pci_dev *pdev, bool decode,
1131
		      unsigned int command_bits, u32 flags);
L
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1132 1133
/* kmem_cache style wrapper around pci_alloc_consistent() */

1134
#include <linux/pci-dma.h>
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1135 1136 1137 1138 1139 1140 1141 1142 1143
#include <linux/dmapool.h>

#define	pci_pool dma_pool
#define pci_pool_create(name, pdev, size, align, allocation) \
		dma_pool_create(name, &pdev->dev, size, align, allocation)
#define	pci_pool_destroy(pool) dma_pool_destroy(pool)
#define	pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
#define	pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)

1144 1145 1146 1147 1148 1149 1150 1151 1152
enum pci_dma_burst_strategy {
	PCI_DMA_BURST_INFINITY,	/* make bursts as large as possible,
				   strategy_parameter is N/A */
	PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
				   byte boundaries */
	PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
				   strategy_parameter byte boundaries */
};

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1153
struct msix_entry {
Y
Yinghai Lu 已提交
1154
	u32	vector;	/* kernel uses to write allocated vector */
L
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1155 1156 1157
	u16	entry;	/* driver uses to specify entry, OS writes */
};

1158

1159 1160 1161
#ifdef CONFIG_PCI_MSI
int pci_msi_vec_count(struct pci_dev *dev);
int pci_enable_msi_block(struct pci_dev *dev, int nvec);
1162 1163
void pci_msi_shutdown(struct pci_dev *dev);
void pci_disable_msi(struct pci_dev *dev);
1164
int pci_msix_vec_count(struct pci_dev *dev);
1165 1166 1167 1168 1169 1170
int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec);
void pci_msix_shutdown(struct pci_dev *dev);
void pci_disable_msix(struct pci_dev *dev);
void msi_remove_pci_irq_vectors(struct pci_dev *dev);
void pci_restore_msi_state(struct pci_dev *dev);
int pci_msi_enabled(void);
1171
int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec);
1172 1173 1174 1175 1176 1177 1178
static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec)
{
	int rc = pci_enable_msi_range(dev, nvec, nvec);
	if (rc < 0)
		return rc;
	return 0;
}
1179 1180
int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
			  int minvec, int maxvec);
1181 1182 1183 1184 1185 1186 1187 1188
static inline int pci_enable_msix_exact(struct pci_dev *dev,
					struct msix_entry *entries, int nvec)
{
	int rc = pci_enable_msix_range(dev, entries, nvec, nvec);
	if (rc < 0)
		return rc;
	return 0;
}
1189
#else
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Bjorn Helgaas 已提交
1190
static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; }
1191
static inline int pci_enable_msi_block(struct pci_dev *dev, int nvec)
B
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1192 1193 1194 1195
{ return -ENOSYS; }
static inline void pci_msi_shutdown(struct pci_dev *dev) { }
static inline void pci_disable_msi(struct pci_dev *dev) { }
static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; }
1196 1197
static inline int pci_enable_msix(struct pci_dev *dev,
				  struct msix_entry *entries, int nvec)
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1198 1199 1200 1201 1202 1203
{ return -ENOSYS; }
static inline void pci_msix_shutdown(struct pci_dev *dev) { }
static inline void pci_disable_msix(struct pci_dev *dev) { }
static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) { }
static inline void pci_restore_msi_state(struct pci_dev *dev) { }
static inline int pci_msi_enabled(void) { return 0; }
1204 1205
static inline int pci_enable_msi_range(struct pci_dev *dev, int minvec,
				       int maxvec)
B
Bjorn Helgaas 已提交
1206
{ return -ENOSYS; }
1207 1208
static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec)
{ return -ENOSYS; }
1209 1210
static inline int pci_enable_msix_range(struct pci_dev *dev,
		      struct msix_entry *entries, int minvec, int maxvec)
B
Bjorn Helgaas 已提交
1211
{ return -ENOSYS; }
1212 1213 1214
static inline int pci_enable_msix_exact(struct pci_dev *dev,
		      struct msix_entry *entries, int nvec)
{ return -ENOSYS; }
L
Linus Torvalds 已提交
1215 1216
#endif

1217
#ifdef CONFIG_PCIEPORTBUS
1218 1219
extern bool pcie_ports_disabled;
extern bool pcie_ports_auto;
1220 1221 1222 1223
#else
#define pcie_ports_disabled	true
#define pcie_ports_auto		false
#endif
1224

1225
#ifdef CONFIG_PCIEASPM
1226
bool pcie_aspm_support_enabled(void);
1227 1228
#else
static inline bool pcie_aspm_support_enabled(void) { return false; }
1229 1230
#endif

1231 1232 1233 1234 1235 1236 1237 1238
#ifdef CONFIG_PCIEAER
void pci_no_aer(void);
bool pci_aer_available(void);
#else
static inline void pci_no_aer(void) { }
static inline bool pci_aer_available(void) { return false; }
#endif

1239
#ifdef CONFIG_PCIE_ECRC
1240 1241
void pcie_set_ecrc_checking(struct pci_dev *dev);
void pcie_ecrc_get_policy(char *str);
1242
#else
B
Bjorn Helgaas 已提交
1243 1244
static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
static inline void pcie_ecrc_get_policy(char *str) { }
1245 1246
#endif

1247 1248
#define pci_enable_msi(pdev)	pci_enable_msi_block(pdev, 1)

1249 1250 1251 1252 1253 1254
#ifdef CONFIG_HT_IRQ
/* The functions a driver should call */
int  ht_create_irq(struct pci_dev *dev, int idx);
void ht_destroy_irq(unsigned int irq);
#endif /* CONFIG_HT_IRQ */

1255 1256 1257
void pci_cfg_access_lock(struct pci_dev *dev);
bool pci_cfg_access_trylock(struct pci_dev *dev);
void pci_cfg_access_unlock(struct pci_dev *dev);
1258

1259 1260
/*
 * PCI domain support.  Sometimes called PCI segment (eg by ACPI),
1261
 * a PCI domain is defined to be a set of PCI buses which share
1262 1263
 * configuration space.
 */
1264 1265 1266 1267
#ifdef CONFIG_PCI_DOMAINS
extern int pci_domains_supported;
#else
enum { pci_domains_supported = 0 };
B
Bjorn Helgaas 已提交
1268 1269
static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
static inline int pci_proc_domain(struct pci_bus *bus) { return 0; }
1270
#endif /* CONFIG_PCI_DOMAINS */
L
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1271

1272 1273
/* some architectures require additional setup to direct VGA traffic */
typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1274
		      unsigned int command_bits, u32 flags);
1275
void pci_register_set_vga_state(arch_set_vga_state_t func);
1276

1277
#else /* CONFIG_PCI is not enabled */
L
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1278 1279 1280 1281 1282 1283

/*
 *  If the system does not have PCI, clearly these return errors.  Define
 *  these as simple inline functions to avoid hair in drivers.
 */

1284 1285 1286
#define _PCI_NOP(o, s, t) \
	static inline int pci_##o##_config_##s(struct pci_dev *dev, \
						int where, t val) \
L
Linus Torvalds 已提交
1287
		{ return PCIBIOS_FUNC_NOT_SUPPORTED; }
1288 1289 1290 1291

#define _PCI_NOP_ALL(o, x)	_PCI_NOP(o, byte, u8 x) \
				_PCI_NOP(o, word, u16 x) \
				_PCI_NOP(o, dword, u32 x)
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1292 1293 1294
_PCI_NOP_ALL(read, *)
_PCI_NOP_ALL(write,)

1295
static inline struct pci_dev *pci_get_device(unsigned int vendor,
1296 1297
					     unsigned int device,
					     struct pci_dev *from)
B
Bjorn Helgaas 已提交
1298
{ return NULL; }
1299

1300 1301 1302 1303
static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
					     unsigned int device,
					     unsigned int ss_vendor,
					     unsigned int ss_device,
1304
					     struct pci_dev *from)
B
Bjorn Helgaas 已提交
1305
{ return NULL; }
L
Linus Torvalds 已提交
1306

1307 1308
static inline struct pci_dev *pci_get_class(unsigned int class,
					    struct pci_dev *from)
B
Bjorn Helgaas 已提交
1309
{ return NULL; }
L
Linus Torvalds 已提交
1310 1311

#define pci_dev_present(ids)	(0)
Z
Zhang, Yanmin 已提交
1312
#define no_pci_devices()	(1)
L
Linus Torvalds 已提交
1313 1314
#define pci_dev_put(dev)	do { } while (0)

B
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1315 1316 1317
static inline void pci_set_master(struct pci_dev *dev) { }
static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
static inline void pci_disable_device(struct pci_dev *dev) { }
1318
static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
B
Bjorn Helgaas 已提交
1319
{ return -EIO; }
1320
static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
B
Bjorn Helgaas 已提交
1321
{ return -EIO; }
1322 1323
static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
					unsigned int size)
B
Bjorn Helgaas 已提交
1324
{ return -EIO; }
1325 1326
static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
					unsigned long mask)
B
Bjorn Helgaas 已提交
1327
{ return -EIO; }
1328
static inline int pci_assign_resource(struct pci_dev *dev, int i)
B
Bjorn Helgaas 已提交
1329
{ return -EBUSY; }
1330 1331
static inline int __pci_register_driver(struct pci_driver *drv,
					struct module *owner)
B
Bjorn Helgaas 已提交
1332
{ return 0; }
1333
static inline int pci_register_driver(struct pci_driver *drv)
B
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1334 1335
{ return 0; }
static inline void pci_unregister_driver(struct pci_driver *drv) { }
1336
static inline int pci_find_capability(struct pci_dev *dev, int cap)
B
Bjorn Helgaas 已提交
1337
{ return 0; }
1338 1339
static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
					   int cap)
B
Bjorn Helgaas 已提交
1340
{ return 0; }
1341
static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
B
Bjorn Helgaas 已提交
1342
{ return 0; }
1343

L
Linus Torvalds 已提交
1344
/* Power management related routines */
B
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1345 1346
static inline int pci_save_state(struct pci_dev *dev) { return 0; }
static inline void pci_restore_state(struct pci_dev *dev) { }
1347
static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
B
Bjorn Helgaas 已提交
1348
{ return 0; }
1349
static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable)
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Bjorn Helgaas 已提交
1350
{ return 0; }
1351 1352
static inline pci_power_t pci_choose_state(struct pci_dev *dev,
					   pm_message_t state)
B
Bjorn Helgaas 已提交
1353
{ return PCI_D0; }
1354 1355
static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
				  int enable)
B
Bjorn Helgaas 已提交
1356
{ return 0; }
1357

1358
static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
B
Bjorn Helgaas 已提交
1359 1360
{ return -EIO; }
static inline void pci_release_regions(struct pci_dev *dev) { }
1361

1362 1363
#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)

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Bjorn Helgaas 已提交
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static inline void pci_block_cfg_access(struct pci_dev *dev) { }
1365 1366
static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
{ return 0; }
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Bjorn Helgaas 已提交
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static inline void pci_unblock_cfg_access(struct pci_dev *dev) { }
1368

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static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
{ return NULL; }
static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
						unsigned int devfn)
{ return NULL; }
static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
						unsigned int devfn)
{ return NULL; }

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static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; }
1380

1381 1382 1383
#define dev_is_pci(d) (false)
#define dev_is_pf(d) (false)
#define dev_num_vf(d) (0)
1384
#endif /* CONFIG_PCI */
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Linus Torvalds 已提交
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1386 1387 1388
/* Include architecture-dependent settings and functions */

#include <asm/pci.h>
L
Linus Torvalds 已提交
1389 1390 1391

/* these helpers provide future and backwards compatibility
 * for accessing popular PCI BAR info */
1392 1393 1394
#define pci_resource_start(dev, bar)	((dev)->resource[(bar)].start)
#define pci_resource_end(dev, bar)	((dev)->resource[(bar)].end)
#define pci_resource_flags(dev, bar)	((dev)->resource[(bar)].flags)
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Linus Torvalds 已提交
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#define pci_resource_len(dev,bar) \
1396 1397 1398 1399 1400 1401
	((pci_resource_start((dev), (bar)) == 0 &&	\
	  pci_resource_end((dev), (bar)) ==		\
	  pci_resource_start((dev), (bar))) ? 0 :	\
							\
	 (pci_resource_end((dev), (bar)) -		\
	  pci_resource_start((dev), (bar)) + 1))
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/* Similar to the helpers above, these manipulate per-pci_dev
 * driver-specific data.  They are really just a wrapper around
 * the generic device structure functions of these calls.
 */
1407
static inline void *pci_get_drvdata(struct pci_dev *pdev)
L
Linus Torvalds 已提交
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{
	return dev_get_drvdata(&pdev->dev);
}

1412
static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
L
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{
	dev_set_drvdata(&pdev->dev, data);
}

/* If you want to know what to call your pci_dev, ask this function.
 * Again, it's a wrapper around the generic device.
 */
1420
static inline const char *pci_name(const struct pci_dev *pdev)
L
Linus Torvalds 已提交
1421
{
G
Greg KH 已提交
1422
	return dev_name(&pdev->dev);
L
Linus Torvalds 已提交
1423 1424
}

1425 1426 1427 1428 1429 1430

/* Some archs don't want to expose struct resource to userland as-is
 * in sysfs and /proc
 */
#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1431
		const struct resource *rsrc, resource_size_t *start,
1432
		resource_size_t *end)
1433 1434 1435 1436 1437 1438 1439
{
	*start = rsrc->start;
	*end = rsrc->end;
}
#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */


L
Linus Torvalds 已提交
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/*
 *  The world is not perfect and supplies us with broken PCI devices.
 *  For at least a part of these bugs we need a work-around, so both
 *  generic (drivers/pci/quirks.c) and per-architecture code can define
 *  fixup hooks to be called for particular buggy devices.
 */

struct pci_fixup {
1448 1449 1450 1451
	u16 vendor;		/* You can use PCI_ANY_ID here of course */
	u16 device;		/* You can use PCI_ANY_ID here of course */
	u32 class;		/* You can use PCI_ANY_ID here too */
	unsigned int class_shift;	/* should be 0, 8, 16 */
L
Linus Torvalds 已提交
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	void (*hook)(struct pci_dev *dev);
};

enum pci_fixup_pass {
	pci_fixup_early,	/* Before probing BARs */
	pci_fixup_header,	/* After reading configuration header */
	pci_fixup_final,	/* Final phase of device fixups */
	pci_fixup_enable,	/* pci_enable_device() time */
1460 1461 1462
	pci_fixup_resume,	/* pci_device_resume() */
	pci_fixup_suspend,	/* pci_device_suspend */
	pci_fixup_resume_early, /* pci_device_resume_early() */
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Linus Torvalds 已提交
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};

/* Anonymous variables would be nice... */
1466 1467
#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class,	\
				  class_shift, hook)			\
1468
	static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used	\
1469 1470 1471 1472 1473 1474
	__attribute__((__section__(#section), aligned((sizeof(void *)))))    \
		= { vendor, device, class, class_shift, hook };

#define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class,		\
					 class_shift, hook)		\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early,			\
1475
		hook, vendor, device, class, class_shift, hook)
1476 1477 1478
#define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class,		\
					 class_shift, hook)		\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header,			\
1479
		hook, vendor, device, class, class_shift, hook)
1480 1481 1482
#define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class,		\
					 class_shift, hook)		\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final,			\
1483
		hook, vendor, device, class, class_shift, hook)
1484 1485 1486
#define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class,		\
					 class_shift, hook)		\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable,			\
1487
		hook, vendor, device, class, class_shift, hook)
1488 1489 1490
#define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class,		\
					 class_shift, hook)		\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume,			\
1491
		resume##hook, vendor, device, class,	\
1492 1493 1494 1495
		class_shift, hook)
#define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class,	\
					 class_shift, hook)		\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early,		\
1496
		resume_early##hook, vendor, device,	\
1497 1498 1499 1500
		class, class_shift, hook)
#define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class,		\
					 class_shift, hook)		\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend,			\
1501
		suspend##hook, vendor, device, class,	\
1502 1503
		class_shift, hook)

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Linus Torvalds 已提交
1504 1505
#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook)			\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early,			\
1506
		hook, vendor, device, PCI_ANY_ID, 0, hook)
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Linus Torvalds 已提交
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#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook)			\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header,			\
1509
		hook, vendor, device, PCI_ANY_ID, 0, hook)
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Linus Torvalds 已提交
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#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook)			\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final,			\
1512
		hook, vendor, device, PCI_ANY_ID, 0, hook)
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Linus Torvalds 已提交
1513 1514
#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook)			\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable,			\
1515
		hook, vendor, device, PCI_ANY_ID, 0, hook)
1516 1517
#define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook)			\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume,			\
1518
		resume##hook, vendor, device,		\
1519
		PCI_ANY_ID, 0, hook)
1520 1521
#define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook)		\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early,		\
1522
		resume_early##hook, vendor, device,	\
1523
		PCI_ANY_ID, 0, hook)
1524 1525
#define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook)			\
	DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend,			\
1526
		suspend##hook, vendor, device,		\
1527
		PCI_ANY_ID, 0, hook)
L
Linus Torvalds 已提交
1528

1529
#ifdef CONFIG_PCI_QUIRKS
L
Linus Torvalds 已提交
1530
void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1531
struct pci_dev *pci_get_dma_source(struct pci_dev *dev);
1532
int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags);
1533
void pci_dev_specific_enable_acs(struct pci_dev *dev);
1534 1535
#else
static inline void pci_fixup_device(enum pci_fixup_pass pass,
B
Bjorn Helgaas 已提交
1536
				    struct pci_dev *dev) { }
1537 1538 1539 1540
static inline struct pci_dev *pci_get_dma_source(struct pci_dev *dev)
{
	return pci_dev_get(dev);
}
1541 1542 1543 1544 1545
static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev,
					       u16 acs_flags)
{
	return -ENOTTY;
}
1546
static inline void pci_dev_specific_enable_acs(struct pci_dev *dev) { }
1547
#endif
L
Linus Torvalds 已提交
1548

1549
void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
A
Al Viro 已提交
1550
void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1551
void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1552 1553
int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name);
int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
1554
				   const char *name);
1555
void pcim_iounmap_regions(struct pci_dev *pdev, int mask);
A
Al Viro 已提交
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L
Linus Torvalds 已提交
1557
extern int pci_pci_problems;
A
Alan Cox 已提交
1558
#define PCIPCI_FAIL		1	/* No PCI PCI DMA */
L
Linus Torvalds 已提交
1559 1560 1561 1562
#define PCIPCI_TRITON		2
#define PCIPCI_NATOMA		4
#define PCIPCI_VIAETBF		8
#define PCIPCI_VSFX		16
A
Alan Cox 已提交
1563 1564
#define PCIPCI_ALIMAGIK		32	/* Need low latency setting */
#define PCIAGP_FAIL		64	/* No PCI to AGP DMA */
L
Linus Torvalds 已提交
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1566 1567
extern unsigned long pci_cardbus_io_size;
extern unsigned long pci_cardbus_mem_size;
B
Bill Pemberton 已提交
1568
extern u8 pci_dfl_cache_line_size;
1569
extern u8 pci_cache_line_size;
1570

1571 1572 1573
extern unsigned long pci_hotplug_io_size;
extern unsigned long pci_hotplug_mem_size;

1574
/* Architecture-specific versions may override these (weak) */
1575 1576
int pcibios_add_platform_entries(struct pci_dev *dev);
void pcibios_disable_device(struct pci_dev *dev);
1577
void pcibios_set_master(struct pci_dev *dev);
1578 1579
int pcibios_set_pcie_reset_state(struct pci_dev *dev,
				 enum pcie_reset_state state);
M
Matthew Garrett 已提交
1580
int pcibios_add_device(struct pci_dev *dev);
1581
void pcibios_release_device(struct pci_dev *dev);
1582

1583 1584 1585 1586
#ifdef CONFIG_HIBERNATE_CALLBACKS
extern struct dev_pm_ops pcibios_pm_ops;
#endif

1587
#ifdef CONFIG_PCI_MMCONFIG
1588 1589
void __init pci_mmcfg_early_init(void);
void __init pci_mmcfg_late_init(void);
1590
#else
1591
static inline void pci_mmcfg_early_init(void) { }
1592 1593 1594
static inline void pci_mmcfg_late_init(void) { }
#endif

1595
int pci_ext_cfg_avail(void);
1596

A
Andrew Morton 已提交
1597
void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1598

1599
#ifdef CONFIG_PCI_IOV
1600 1601 1602
int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
void pci_disable_sriov(struct pci_dev *dev);
int pci_num_vf(struct pci_dev *dev);
1603
int pci_vfs_assigned(struct pci_dev *dev);
1604 1605
int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
int pci_sriov_get_totalvfs(struct pci_dev *dev);
1606 1607
#else
static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
B
Bjorn Helgaas 已提交
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{ return -ENODEV; }
static inline void pci_disable_sriov(struct pci_dev *dev) { }
static inline int pci_num_vf(struct pci_dev *dev) { return 0; }
1611
static inline int pci_vfs_assigned(struct pci_dev *dev)
B
Bjorn Helgaas 已提交
1612
{ return 0; }
1613
static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
B
Bjorn Helgaas 已提交
1614
{ return 0; }
1615
static inline int pci_sriov_get_totalvfs(struct pci_dev *dev)
B
Bjorn Helgaas 已提交
1616
{ return 0; }
1617 1618
#endif

1619
#if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1620 1621
void pci_hp_create_module_link(struct pci_slot *pci_slot);
void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1622 1623
#endif

K
Kenji Kaneshige 已提交
1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639
/**
 * pci_pcie_cap - get the saved PCIe capability offset
 * @dev: PCI device
 *
 * PCIe capability offset is calculated at PCI device initialization
 * time and saved in the data structure. This function returns saved
 * PCIe capability offset. Using this instead of pci_find_capability()
 * reduces unnecessary search in the PCI configuration space. If you
 * need to calculate PCIe capability offset from raw device for some
 * reasons, please use pci_find_capability() instead.
 */
static inline int pci_pcie_cap(struct pci_dev *dev)
{
	return dev->pcie_cap;
}

K
Kenji Kaneshige 已提交
1640 1641 1642 1643
/**
 * pci_is_pcie - check if the PCI device is PCI Express capable
 * @dev: PCI device
 *
1644
 * Returns: true if the PCI device is PCI Express capable, false otherwise.
K
Kenji Kaneshige 已提交
1645 1646 1647
 */
static inline bool pci_is_pcie(struct pci_dev *dev)
{
1648
	return pci_pcie_cap(dev);
K
Kenji Kaneshige 已提交
1649 1650
}

1651 1652 1653 1654 1655 1656 1657 1658 1659
/**
 * pcie_caps_reg - get the PCIe Capabilities Register
 * @dev: PCI device
 */
static inline u16 pcie_caps_reg(const struct pci_dev *dev)
{
	return dev->pcie_flags_reg;
}

1660 1661 1662 1663 1664 1665
/**
 * pci_pcie_type - get the PCIe device/port type
 * @dev: PCI device
 */
static inline int pci_pcie_type(const struct pci_dev *dev)
{
1666
	return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
1667 1668
}

C
Chris Wright 已提交
1669
void pci_request_acs(void);
1670 1671 1672
bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags);
bool pci_acs_path_enabled(struct pci_dev *start,
			  struct pci_dev *end, u16 acs_flags);
1673

1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695
#define PCI_VPD_LRDT			0x80	/* Large Resource Data Type */
#define PCI_VPD_LRDT_ID(x)		(x | PCI_VPD_LRDT)

/* Large Resource Data Type Tag Item Names */
#define PCI_VPD_LTIN_ID_STRING		0x02	/* Identifier String */
#define PCI_VPD_LTIN_RO_DATA		0x10	/* Read-Only Data */
#define PCI_VPD_LTIN_RW_DATA		0x11	/* Read-Write Data */

#define PCI_VPD_LRDT_ID_STRING		PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING)
#define PCI_VPD_LRDT_RO_DATA		PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA)
#define PCI_VPD_LRDT_RW_DATA		PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)

/* Small Resource Data Type Tag Item Names */
#define PCI_VPD_STIN_END		0x78	/* End */

#define PCI_VPD_SRDT_END		PCI_VPD_STIN_END

#define PCI_VPD_SRDT_TIN_MASK		0x78
#define PCI_VPD_SRDT_LEN_MASK		0x07

#define PCI_VPD_LRDT_TAG_SIZE		3
#define PCI_VPD_SRDT_TAG_SIZE		1
1696

1697 1698
#define PCI_VPD_INFO_FLD_HDR_SIZE	3

1699 1700 1701
#define PCI_VPD_RO_KEYWORD_PARTNO	"PN"
#define PCI_VPD_RO_KEYWORD_MFR_ID	"MN"
#define PCI_VPD_RO_KEYWORD_VENDOR0	"V0"
1702
#define PCI_VPD_RO_KEYWORD_CHKSUM	"RV"
1703

1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714
/**
 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag
 *
 * Returns the extracted Large Resource Data Type length.
 */
static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
{
	return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
}

1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725
/**
 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag
 *
 * Returns the extracted Small Resource Data Type length.
 */
static inline u8 pci_vpd_srdt_size(const u8 *srdt)
{
	return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
}

1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736
/**
 * pci_vpd_info_field_size - Extracts the information field length
 * @lrdt: Pointer to the beginning of an information field header
 *
 * Returns the extracted information field length.
 */
static inline u8 pci_vpd_info_field_size(const u8 *info_field)
{
	return info_field[2];
}

1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748
/**
 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
 * @buf: Pointer to buffered vpd data
 * @off: The offset into the buffer at which to begin the search
 * @len: The length of the vpd buffer
 * @rdt: The Resource Data Type to search for
 *
 * Returns the index where the Resource Data Type was found or
 * -ENOENT otherwise.
 */
int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt);

1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761
/**
 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
 * @buf: Pointer to buffered vpd data
 * @off: The offset into the buffer at which to begin the search
 * @len: The length of the buffer area, relative to off, in which to search
 * @kw: The keyword to search for
 *
 * Returns the index where the information field keyword was found or
 * -ENOENT otherwise.
 */
int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
			      unsigned int len, const char *kw);

1762 1763 1764
/* PCI <-> OF binding helpers */
#ifdef CONFIG_OF
struct device_node;
1765 1766 1767 1768
void pci_set_of_node(struct pci_dev *dev);
void pci_release_of_node(struct pci_dev *dev);
void pci_set_bus_of_node(struct pci_bus *bus);
void pci_release_bus_of_node(struct pci_bus *bus);
1769 1770

/* Arch may override this (weak) */
1771
struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus);
1772

1773 1774
static inline struct device_node *
pci_device_to_OF_node(const struct pci_dev *pdev)
1775 1776 1777 1778
{
	return pdev ? pdev->dev.of_node : NULL;
}

1779 1780 1781 1782 1783
static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
{
	return bus ? bus->dev.of_node : NULL;
}

1784 1785 1786 1787 1788 1789 1790
#else /* CONFIG_OF */
static inline void pci_set_of_node(struct pci_dev *dev) { }
static inline void pci_release_of_node(struct pci_dev *dev) { }
static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
#endif  /* CONFIG_OF */

G
Gavin Shan 已提交
1791 1792 1793 1794 1795 1796 1797
#ifdef CONFIG_EEH
static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev)
{
	return pdev->dev.archdata.edev;
}
#endif

A
Alex Williamson 已提交
1798 1799 1800 1801
int pci_for_each_dma_alias(struct pci_dev *pdev,
			   int (*fn)(struct pci_dev *pdev,
				     u16 alias, void *data), void *data);

1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812
/**
 * pci_find_upstream_pcie_bridge - find upstream PCIe-to-PCI bridge of a device
 * @pdev: the PCI device
 *
 * if the device is PCIE, return NULL
 * if the device isn't connected to a PCIe bridge (that is its parent is a
 * legacy PCI bridge and the bridge is directly connected to bus 0), return its
 * parent
 */
struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);

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Linus Torvalds 已提交
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#endif /* LINUX_PCI_H */