nfit.c 46.2 KB
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/*
 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 */
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
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#include <linux/workqueue.h>
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#include <linux/libnvdimm.h>
#include <linux/vmalloc.h>
#include <linux/device.h>
#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/ndctl.h>
#include <linux/sizes.h>
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#include <linux/list.h>
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#include <linux/slab.h>
#include <nfit.h>
#include <nd.h>
#include "nfit_test.h"

/*
 * Generate an NFIT table to describe the following topology:
 *
 * BUS0: Interleaved PMEM regions, and aliasing with BLK regions
 *
 *                     (a)                       (b)            DIMM   BLK-REGION
 *           +----------+--------------+----------+---------+
 * +------+  |  blk2.0  |     pm0.0    |  blk2.1  |  pm1.0  |    0      region2
 * | imc0 +--+- - - - - region0 - - - -+----------+         +
 * +--+---+  |  blk3.0  |     pm0.0    |  blk3.1  |  pm1.0  |    1      region3
 *    |      +----------+--------------v----------v         v
 * +--+---+                            |                    |
 * | cpu0 |                                    region1
 * +--+---+                            |                    |
 *    |      +-------------------------^----------^         ^
 * +--+---+  |                 blk4.0             |  pm1.0  |    2      region4
 * | imc1 +--+-------------------------+----------+         +
 * +------+  |                 blk5.0             |  pm1.0  |    3      region5
 *           +-------------------------+----------+-+-------+
 *
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 * +--+---+
 * | cpu1 |
 * +--+---+                   (Hotplug DIMM)
 *    |      +----------------------------------------------+
 * +--+---+  |                 blk6.0/pm7.0                 |    4      region6/7
 * | imc0 +--+----------------------------------------------+
 * +------+
 *
 *
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 * *) In this layout we have four dimms and two memory controllers in one
 *    socket.  Each unique interface (BLK or PMEM) to DPA space
 *    is identified by a region device with a dynamically assigned id.
 *
 * *) The first portion of dimm0 and dimm1 are interleaved as REGION0.
 *    A single PMEM namespace "pm0.0" is created using half of the
 *    REGION0 SPA-range.  REGION0 spans dimm0 and dimm1.  PMEM namespace
 *    allocate from from the bottom of a region.  The unallocated
 *    portion of REGION0 aliases with REGION2 and REGION3.  That
 *    unallacted capacity is reclaimed as BLK namespaces ("blk2.0" and
 *    "blk3.0") starting at the base of each DIMM to offset (a) in those
 *    DIMMs.  "pm0.0", "blk2.0" and "blk3.0" are free-form readable
 *    names that can be assigned to a namespace.
 *
 * *) In the last portion of dimm0 and dimm1 we have an interleaved
 *    SPA range, REGION1, that spans those two dimms as well as dimm2
 *    and dimm3.  Some of REGION1 allocated to a PMEM namespace named
 *    "pm1.0" the rest is reclaimed in 4 BLK namespaces (for each
 *    dimm in the interleave set), "blk2.1", "blk3.1", "blk4.0", and
 *    "blk5.0".
 *
 * *) The portion of dimm2 and dimm3 that do not participate in the
 *    REGION1 interleaved SPA range (i.e. the DPA address below offset
 *    (b) are also included in the "blk4.0" and "blk5.0" namespaces.
 *    Note, that BLK namespaces need not be contiguous in DPA-space, and
 *    can consume aliased capacity from multiple interleave sets.
 *
 * BUS1: Legacy NVDIMM (single contiguous range)
 *
 *  region2
 * +---------------------+
 * |---------------------|
 * ||       pm2.0       ||
 * |---------------------|
 * +---------------------+
 *
 * *) A NFIT-table may describe a simple system-physical-address range
 *    with no BLK aliasing.  This type of region may optionally
 *    reference an NVDIMM.
 */
enum {
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	NUM_PM  = 3,
	NUM_DCR = 5,
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	NUM_HINTS = 8,
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	NUM_BDW = NUM_DCR,
	NUM_SPA = NUM_PM + NUM_DCR + NUM_BDW,
	NUM_MEM = NUM_DCR + NUM_BDW + 2 /* spa0 iset */ + 4 /* spa1 iset */,
	DIMM_SIZE = SZ_32M,
	LABEL_SIZE = SZ_128K,
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	SPA_VCD_SIZE = SZ_4M,
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	SPA0_SIZE = DIMM_SIZE,
	SPA1_SIZE = DIMM_SIZE*2,
	SPA2_SIZE = DIMM_SIZE,
	BDW_SIZE = 64 << 8,
	DCR_SIZE = 12,
	NUM_NFITS = 2, /* permit testing multiple NFITs per system */
};

struct nfit_test_dcr {
	__le64 bdw_addr;
	__le32 bdw_status;
	__u8 aperature[BDW_SIZE];
};

#define NFIT_DIMM_HANDLE(node, socket, imc, chan, dimm) \
	(((node & 0xfff) << 16) | ((socket & 0xf) << 12) \
	 | ((imc & 0xf) << 8) | ((chan & 0xf) << 4) | (dimm & 0xf))

static u32 handle[NUM_DCR] = {
	[0] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 0),
	[1] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 1),
	[2] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 0),
	[3] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 1),
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	[4] = NFIT_DIMM_HANDLE(0, 1, 0, 0, 0),
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};

struct nfit_test {
	struct acpi_nfit_desc acpi_desc;
	struct platform_device pdev;
	struct list_head resources;
	void *nfit_buf;
	dma_addr_t nfit_dma;
	size_t nfit_size;
	int num_dcr;
	int num_pm;
	void **dimm;
	dma_addr_t *dimm_dma;
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	void **flush;
	dma_addr_t *flush_dma;
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	void **label;
	dma_addr_t *label_dma;
	void **spa_set;
	dma_addr_t *spa_set_dma;
	struct nfit_test_dcr **dcr;
	dma_addr_t *dcr_dma;
	int (*alloc)(struct nfit_test *t);
	void (*setup)(struct nfit_test *t);
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	int setup_hotplug;
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	union acpi_object **_fit;
	dma_addr_t _fit_dma;
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	struct ars_state {
		struct nd_cmd_ars_status *ars_status;
		unsigned long deadline;
		spinlock_t lock;
	} ars_state;
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};

static struct nfit_test *to_nfit_test(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);

	return container_of(pdev, struct nfit_test, pdev);
}

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static int nfit_test_cmd_get_config_size(struct nd_cmd_get_config_size *nd_cmd,
		unsigned int buf_len)
{
	if (buf_len < sizeof(*nd_cmd))
		return -EINVAL;

	nd_cmd->status = 0;
	nd_cmd->config_size = LABEL_SIZE;
	nd_cmd->max_xfer = SZ_4K;

	return 0;
}

static int nfit_test_cmd_get_config_data(struct nd_cmd_get_config_data_hdr
		*nd_cmd, unsigned int buf_len, void *label)
{
	unsigned int len, offset = nd_cmd->in_offset;
	int rc;

	if (buf_len < sizeof(*nd_cmd))
		return -EINVAL;
	if (offset >= LABEL_SIZE)
		return -EINVAL;
	if (nd_cmd->in_length + sizeof(*nd_cmd) > buf_len)
		return -EINVAL;

	nd_cmd->status = 0;
	len = min(nd_cmd->in_length, LABEL_SIZE - offset);
	memcpy(nd_cmd->out_buf, label + offset, len);
	rc = buf_len - sizeof(*nd_cmd) - len;

	return rc;
}

static int nfit_test_cmd_set_config_data(struct nd_cmd_set_config_hdr *nd_cmd,
		unsigned int buf_len, void *label)
{
	unsigned int len, offset = nd_cmd->in_offset;
	u32 *status;
	int rc;

	if (buf_len < sizeof(*nd_cmd))
		return -EINVAL;
	if (offset >= LABEL_SIZE)
		return -EINVAL;
	if (nd_cmd->in_length + sizeof(*nd_cmd) + 4 > buf_len)
		return -EINVAL;

	status = (void *)nd_cmd + nd_cmd->in_length + sizeof(*nd_cmd);
	*status = 0;
	len = min(nd_cmd->in_length, LABEL_SIZE - offset);
	memcpy(label + offset, nd_cmd->in_buf, len);
	rc = buf_len - sizeof(*nd_cmd) - (len + 4);

	return rc;
}

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#define NFIT_TEST_ARS_RECORDS 4
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#define NFIT_TEST_CLEAR_ERR_UNIT 256
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static int nfit_test_cmd_ars_cap(struct nd_cmd_ars_cap *nd_cmd,
		unsigned int buf_len)
{
	if (buf_len < sizeof(*nd_cmd))
		return -EINVAL;

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	nd_cmd->max_ars_out = sizeof(struct nd_cmd_ars_status)
		+ NFIT_TEST_ARS_RECORDS * sizeof(struct nd_ars_record);
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	nd_cmd->status = (ND_ARS_PERSISTENT | ND_ARS_VOLATILE) << 16;
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	nd_cmd->clear_err_unit = NFIT_TEST_CLEAR_ERR_UNIT;
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	return 0;
}

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/*
 * Initialize the ars_state to return an ars_result 1 second in the future with
 * a 4K error range in the middle of the requested address range.
 */
static void post_ars_status(struct ars_state *ars_state, u64 addr, u64 len)
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{
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	struct nd_cmd_ars_status *ars_status;
	struct nd_ars_record *ars_record;

	ars_state->deadline = jiffies + 1*HZ;
	ars_status = ars_state->ars_status;
	ars_status->status = 0;
	ars_status->out_length = sizeof(struct nd_cmd_ars_status)
		+ sizeof(struct nd_ars_record);
	ars_status->address = addr;
	ars_status->length = len;
	ars_status->type = ND_ARS_PERSISTENT;
	ars_status->num_records = 1;
	ars_record = &ars_status->records[0];
	ars_record->handle = 0;
	ars_record->err_address = addr + len / 2;
	ars_record->length = SZ_4K;
}

static int nfit_test_cmd_ars_start(struct ars_state *ars_state,
		struct nd_cmd_ars_start *ars_start, unsigned int buf_len,
		int *cmd_rc)
{
	if (buf_len < sizeof(*ars_start))
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		return -EINVAL;

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	spin_lock(&ars_state->lock);
	if (time_before(jiffies, ars_state->deadline)) {
		ars_start->status = NFIT_ARS_START_BUSY;
		*cmd_rc = -EBUSY;
	} else {
		ars_start->status = 0;
		ars_start->scrub_time = 1;
		post_ars_status(ars_state, ars_start->address,
				ars_start->length);
		*cmd_rc = 0;
	}
	spin_unlock(&ars_state->lock);
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	return 0;
}

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static int nfit_test_cmd_ars_status(struct ars_state *ars_state,
		struct nd_cmd_ars_status *ars_status, unsigned int buf_len,
		int *cmd_rc)
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{
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	if (buf_len < ars_state->ars_status->out_length)
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		return -EINVAL;

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	spin_lock(&ars_state->lock);
	if (time_before(jiffies, ars_state->deadline)) {
		memset(ars_status, 0, buf_len);
		ars_status->status = NFIT_ARS_STATUS_BUSY;
		ars_status->out_length = sizeof(*ars_status);
		*cmd_rc = -EBUSY;
	} else {
		memcpy(ars_status, ars_state->ars_status,
				ars_state->ars_status->out_length);
		*cmd_rc = 0;
	}
	spin_unlock(&ars_state->lock);
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	return 0;
}

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static int nfit_test_cmd_clear_error(struct nd_cmd_clear_error *clear_err,
		unsigned int buf_len, int *cmd_rc)
{
	const u64 mask = NFIT_TEST_CLEAR_ERR_UNIT - 1;
	if (buf_len < sizeof(*clear_err))
		return -EINVAL;

	if ((clear_err->address & mask) || (clear_err->length & mask))
		return -EINVAL;

	/*
	 * Report 'all clear' success for all commands even though a new
	 * scrub will find errors again.  This is enough to have the
	 * error removed from the 'badblocks' tracking in the pmem
	 * driver.
	 */
	clear_err->status = 0;
	clear_err->cleared = clear_err->length;
	*cmd_rc = 0;
	return 0;
}

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static int nfit_test_cmd_smart(struct nd_cmd_smart *smart, unsigned int buf_len)
{
	static const struct nd_smart_payload smart_data = {
		.flags = ND_SMART_HEALTH_VALID | ND_SMART_TEMP_VALID
			| ND_SMART_SPARES_VALID | ND_SMART_ALARM_VALID
			| ND_SMART_USED_VALID | ND_SMART_SHUTDOWN_VALID,
		.health = ND_SMART_NON_CRITICAL_HEALTH,
		.temperature = 23 * 16,
		.spares = 75,
		.alarm_flags = ND_SMART_SPARE_TRIP | ND_SMART_TEMP_TRIP,
		.life_used = 5,
		.shutdown_state = 0,
		.vendor_size = 0,
	};

	if (buf_len < sizeof(*smart))
		return -EINVAL;
	memcpy(smart->data, &smart_data, sizeof(smart_data));
	return 0;
}

static int nfit_test_cmd_smart_threshold(struct nd_cmd_smart_threshold *smart_t,
		unsigned int buf_len)
{
	static const struct nd_smart_threshold_payload smart_t_data = {
		.alarm_control = ND_SMART_SPARE_TRIP | ND_SMART_TEMP_TRIP,
		.temperature = 40 * 16,
		.spares = 5,
	};

	if (buf_len < sizeof(*smart_t))
		return -EINVAL;
	memcpy(smart_t->data, &smart_t_data, sizeof(smart_t_data));
	return 0;
}

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static int nfit_test_ctl(struct nvdimm_bus_descriptor *nd_desc,
		struct nvdimm *nvdimm, unsigned int cmd, void *buf,
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		unsigned int buf_len, int *cmd_rc)
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{
	struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
	struct nfit_test *t = container_of(acpi_desc, typeof(*t), acpi_desc);
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	unsigned int func = cmd;
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	int i, rc = 0, __cmd_rc;

	if (!cmd_rc)
		cmd_rc = &__cmd_rc;
	*cmd_rc = 0;
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	if (nvdimm) {
		struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
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		unsigned long cmd_mask = nvdimm_cmd_mask(nvdimm);
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		if (!nfit_mem)
			return -ENOTTY;

		if (cmd == ND_CMD_CALL) {
			struct nd_cmd_pkg *call_pkg = buf;

			buf_len = call_pkg->nd_size_in + call_pkg->nd_size_out;
			buf = (void *) call_pkg->nd_payload;
			func = call_pkg->nd_command;
			if (call_pkg->nd_family != nfit_mem->family)
				return -ENOTTY;
		}

		if (!test_bit(cmd, &cmd_mask)
				|| !test_bit(func, &nfit_mem->dsm_mask))
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			return -ENOTTY;

		/* lookup label space for the given dimm */
		for (i = 0; i < ARRAY_SIZE(handle); i++)
			if (__to_nfit_memdev(nfit_mem)->device_handle ==
					handle[i])
				break;
		if (i >= ARRAY_SIZE(handle))
			return -ENXIO;

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		switch (func) {
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		case ND_CMD_GET_CONFIG_SIZE:
			rc = nfit_test_cmd_get_config_size(buf, buf_len);
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			break;
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		case ND_CMD_GET_CONFIG_DATA:
			rc = nfit_test_cmd_get_config_data(buf, buf_len,
				t->label[i]);
			break;
		case ND_CMD_SET_CONFIG_DATA:
			rc = nfit_test_cmd_set_config_data(buf, buf_len,
				t->label[i]);
			break;
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		case ND_CMD_SMART:
			rc = nfit_test_cmd_smart(buf, buf_len);
			break;
		case ND_CMD_SMART_THRESHOLD:
			rc = nfit_test_cmd_smart_threshold(buf, buf_len);
			break;
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		default:
			return -ENOTTY;
		}
	} else {
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		struct ars_state *ars_state = &t->ars_state;

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		if (!nd_desc || !test_bit(cmd, &nd_desc->cmd_mask))
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			return -ENOTTY;

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		switch (func) {
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		case ND_CMD_ARS_CAP:
			rc = nfit_test_cmd_ars_cap(buf, buf_len);
			break;
		case ND_CMD_ARS_START:
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			rc = nfit_test_cmd_ars_start(ars_state, buf, buf_len,
					cmd_rc);
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			break;
		case ND_CMD_ARS_STATUS:
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			rc = nfit_test_cmd_ars_status(ars_state, buf, buf_len,
					cmd_rc);
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			break;
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		case ND_CMD_CLEAR_ERROR:
			rc = nfit_test_cmd_clear_error(buf, buf_len, cmd_rc);
			break;
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		default:
			return -ENOTTY;
		}
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	}

	return rc;
}

static DEFINE_SPINLOCK(nfit_test_lock);
static struct nfit_test *instances[NUM_NFITS];

static void release_nfit_res(void *data)
{
	struct nfit_test_resource *nfit_res = data;
	struct resource *res = nfit_res->res;

	spin_lock(&nfit_test_lock);
	list_del(&nfit_res->list);
	spin_unlock(&nfit_test_lock);

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	vfree(nfit_res->buf);
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	kfree(res);
	kfree(nfit_res);
}

static void *__test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma,
		void *buf)
{
	struct device *dev = &t->pdev.dev;
	struct resource *res = kzalloc(sizeof(*res) * 2, GFP_KERNEL);
	struct nfit_test_resource *nfit_res = kzalloc(sizeof(*nfit_res),
			GFP_KERNEL);
	int rc;

	if (!res || !buf || !nfit_res)
		goto err;
	rc = devm_add_action(dev, release_nfit_res, nfit_res);
	if (rc)
		goto err;
	INIT_LIST_HEAD(&nfit_res->list);
	memset(buf, 0, size);
	nfit_res->dev = dev;
	nfit_res->buf = buf;
	nfit_res->res = res;
	res->start = *dma;
	res->end = *dma + size - 1;
	res->name = "NFIT";
	spin_lock(&nfit_test_lock);
	list_add(&nfit_res->list, &t->resources);
	spin_unlock(&nfit_test_lock);

	return nfit_res->buf;
 err:
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	if (buf)
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		vfree(buf);
	kfree(res);
	kfree(nfit_res);
	return NULL;
}

static void *test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma)
{
	void *buf = vmalloc(size);

	*dma = (unsigned long) buf;
	return __test_alloc(t, size, dma, buf);
}

static struct nfit_test_resource *nfit_test_lookup(resource_size_t addr)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(instances); i++) {
		struct nfit_test_resource *n, *nfit_res = NULL;
		struct nfit_test *t = instances[i];

		if (!t)
			continue;
		spin_lock(&nfit_test_lock);
		list_for_each_entry(n, &t->resources, list) {
			if (addr >= n->res->start && (addr < n->res->start
						+ resource_size(n->res))) {
				nfit_res = n;
				break;
			} else if (addr >= (unsigned long) n->buf
					&& (addr < (unsigned long) n->buf
						+ resource_size(n->res))) {
				nfit_res = n;
				break;
			}
		}
		spin_unlock(&nfit_test_lock);
		if (nfit_res)
			return nfit_res;
	}

	return NULL;
}

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static int ars_state_init(struct device *dev, struct ars_state *ars_state)
{
	ars_state->ars_status = devm_kzalloc(dev,
			sizeof(struct nd_cmd_ars_status)
			+ sizeof(struct nd_ars_record) * NFIT_TEST_ARS_RECORDS,
			GFP_KERNEL);
	if (!ars_state->ars_status)
		return -ENOMEM;
	spin_lock_init(&ars_state->lock);
	return 0;
}

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static int nfit_test0_alloc(struct nfit_test *t)
{
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	size_t nfit_size = sizeof(struct acpi_nfit_system_address) * NUM_SPA
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			+ sizeof(struct acpi_nfit_memory_map) * NUM_MEM
			+ sizeof(struct acpi_nfit_control_region) * NUM_DCR
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			+ offsetof(struct acpi_nfit_control_region,
					window_size) * NUM_DCR
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			+ sizeof(struct acpi_nfit_data_region) * NUM_BDW
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			+ (sizeof(struct acpi_nfit_flush_address)
					+ sizeof(u64) * NUM_HINTS) * NUM_DCR;
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	int i;

	t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
	if (!t->nfit_buf)
		return -ENOMEM;
	t->nfit_size = nfit_size;

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	t->spa_set[0] = test_alloc(t, SPA0_SIZE, &t->spa_set_dma[0]);
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	if (!t->spa_set[0])
		return -ENOMEM;

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	t->spa_set[1] = test_alloc(t, SPA1_SIZE, &t->spa_set_dma[1]);
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	if (!t->spa_set[1])
		return -ENOMEM;

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	t->spa_set[2] = test_alloc(t, SPA0_SIZE, &t->spa_set_dma[2]);
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	if (!t->spa_set[2])
		return -ENOMEM;

598 599 600 601 602 603 604 605 606
	for (i = 0; i < NUM_DCR; i++) {
		t->dimm[i] = test_alloc(t, DIMM_SIZE, &t->dimm_dma[i]);
		if (!t->dimm[i])
			return -ENOMEM;

		t->label[i] = test_alloc(t, LABEL_SIZE, &t->label_dma[i]);
		if (!t->label[i])
			return -ENOMEM;
		sprintf(t->label[i], "label%d", i);
607

608 609
		t->flush[i] = test_alloc(t, sizeof(u64) * NUM_HINTS,
				&t->flush_dma[i]);
610 611
		if (!t->flush[i])
			return -ENOMEM;
612 613 614 615 616 617 618 619
	}

	for (i = 0; i < NUM_DCR; i++) {
		t->dcr[i] = test_alloc(t, LABEL_SIZE, &t->dcr_dma[i]);
		if (!t->dcr[i])
			return -ENOMEM;
	}

620 621 622 623
	t->_fit = test_alloc(t, sizeof(union acpi_object **), &t->_fit_dma);
	if (!t->_fit)
		return -ENOMEM;

624
	return ars_state_init(&t->pdev.dev, &t->ars_state);
625 626 627 628
}

static int nfit_test1_alloc(struct nfit_test *t)
{
629
	size_t nfit_size = sizeof(struct acpi_nfit_system_address) * 2
630
		+ sizeof(struct acpi_nfit_memory_map)
631
		+ offsetof(struct acpi_nfit_control_region, window_size);
632 633 634 635 636 637

	t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
	if (!t->nfit_buf)
		return -ENOMEM;
	t->nfit_size = nfit_size;

638
	t->spa_set[0] = test_alloc(t, SPA2_SIZE, &t->spa_set_dma[0]);
639 640 641
	if (!t->spa_set[0])
		return -ENOMEM;

642 643 644 645
	t->spa_set[1] = test_alloc(t, SPA_VCD_SIZE, &t->spa_set_dma[1]);
	if (!t->spa_set[1])
		return -ENOMEM;

646
	return ars_state_init(&t->pdev.dev, &t->ars_state);
647 648
}

649 650 651 652 653 654 655 656 657 658
static void dcr_common_init(struct acpi_nfit_control_region *dcr)
{
	dcr->vendor_id = 0xabcd;
	dcr->device_id = 0;
	dcr->revision_id = 1;
	dcr->valid_fields = 1;
	dcr->manufacturing_location = 0xa;
	dcr->manufacturing_date = cpu_to_be16(2016);
}

659 660
static void nfit_test0_setup(struct nfit_test *t)
{
661 662
	const int flush_hint_size = sizeof(struct acpi_nfit_flush_address)
		+ (sizeof(u64) * NUM_HINTS);
663 664 665 666 667 668
	struct acpi_nfit_desc *acpi_desc;
	struct acpi_nfit_memory_map *memdev;
	void *nfit_buf = t->nfit_buf;
	struct acpi_nfit_system_address *spa;
	struct acpi_nfit_control_region *dcr;
	struct acpi_nfit_data_region *bdw;
669
	struct acpi_nfit_flush_address *flush;
670
	unsigned int offset, i;
671 672 673 674 675 676

	/*
	 * spa0 (interleave first half of dimm0 and dimm1, note storage
	 * does not actually alias the related block-data-window
	 * regions)
	 */
677
	spa = nfit_buf;
678 679 680 681 682 683 684 685 686 687 688 689
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
	spa->range_index = 0+1;
	spa->address = t->spa_set_dma[0];
	spa->length = SPA0_SIZE;

	/*
	 * spa1 (interleave last half of the 4 DIMMS, note storage
	 * does not actually alias the related block-data-window
	 * regions)
	 */
690
	spa = nfit_buf + sizeof(*spa);
691 692 693 694 695 696 697 698
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
	spa->range_index = 1+1;
	spa->address = t->spa_set_dma[1];
	spa->length = SPA1_SIZE;

	/* spa2 (dcr0) dimm0 */
699
	spa = nfit_buf + sizeof(*spa) * 2;
700 701 702 703 704 705 706 707
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
	spa->range_index = 2+1;
	spa->address = t->dcr_dma[0];
	spa->length = DCR_SIZE;

	/* spa3 (dcr1) dimm1 */
708
	spa = nfit_buf + sizeof(*spa) * 3;
709 710 711 712 713 714 715 716
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
	spa->range_index = 3+1;
	spa->address = t->dcr_dma[1];
	spa->length = DCR_SIZE;

	/* spa4 (dcr2) dimm2 */
717
	spa = nfit_buf + sizeof(*spa) * 4;
718 719 720 721 722 723 724 725
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
	spa->range_index = 4+1;
	spa->address = t->dcr_dma[2];
	spa->length = DCR_SIZE;

	/* spa5 (dcr3) dimm3 */
726
	spa = nfit_buf + sizeof(*spa) * 5;
727 728 729 730 731 732 733 734
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
	spa->range_index = 5+1;
	spa->address = t->dcr_dma[3];
	spa->length = DCR_SIZE;

	/* spa6 (bdw for dcr0) dimm0 */
735
	spa = nfit_buf + sizeof(*spa) * 6;
736 737 738 739 740 741 742 743
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
	spa->range_index = 6+1;
	spa->address = t->dimm_dma[0];
	spa->length = DIMM_SIZE;

	/* spa7 (bdw for dcr1) dimm1 */
744
	spa = nfit_buf + sizeof(*spa) * 7;
745 746 747 748 749 750 751 752
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
	spa->range_index = 7+1;
	spa->address = t->dimm_dma[1];
	spa->length = DIMM_SIZE;

	/* spa8 (bdw for dcr2) dimm2 */
753
	spa = nfit_buf + sizeof(*spa) * 8;
754 755 756 757 758 759 760 761
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
	spa->range_index = 8+1;
	spa->address = t->dimm_dma[2];
	spa->length = DIMM_SIZE;

	/* spa9 (bdw for dcr3) dimm3 */
762
	spa = nfit_buf + sizeof(*spa) * 9;
763 764 765 766 767 768 769
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
	spa->range_index = 9+1;
	spa->address = t->dimm_dma[3];
	spa->length = DIMM_SIZE;

770
	offset = sizeof(*spa) * 10;
771 772 773 774 775 776 777 778
	/* mem-region0 (spa0, dimm0) */
	memdev = nfit_buf + offset;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[0];
	memdev->physical_id = 0;
	memdev->region_id = 0;
	memdev->range_index = 0+1;
779
	memdev->region_index = 4+1;
780 781 782 783 784 785 786 787 788 789 790 791 792 793
	memdev->region_size = SPA0_SIZE/2;
	memdev->region_offset = t->spa_set_dma[0];
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 2;

	/* mem-region1 (spa0, dimm1) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map);
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[1];
	memdev->physical_id = 1;
	memdev->region_id = 0;
	memdev->range_index = 0+1;
794
	memdev->region_index = 5+1;
795 796 797 798 799 800 801 802 803 804 805 806 807 808
	memdev->region_size = SPA0_SIZE/2;
	memdev->region_offset = t->spa_set_dma[0] + SPA0_SIZE/2;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 2;

	/* mem-region2 (spa1, dimm0) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 2;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[0];
	memdev->physical_id = 0;
	memdev->region_id = 1;
	memdev->range_index = 1+1;
809
	memdev->region_index = 4+1;
810 811 812 813 814 815 816 817 818 819 820 821 822 823
	memdev->region_size = SPA1_SIZE/4;
	memdev->region_offset = t->spa_set_dma[1];
	memdev->address = SPA0_SIZE/2;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 4;

	/* mem-region3 (spa1, dimm1) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 3;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[1];
	memdev->physical_id = 1;
	memdev->region_id = 1;
	memdev->range_index = 1+1;
824
	memdev->region_index = 5+1;
825 826 827 828 829 830 831 832 833 834 835 836 837 838
	memdev->region_size = SPA1_SIZE/4;
	memdev->region_offset = t->spa_set_dma[1] + SPA1_SIZE/4;
	memdev->address = SPA0_SIZE/2;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 4;

	/* mem-region4 (spa1, dimm2) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 4;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[2];
	memdev->physical_id = 2;
	memdev->region_id = 0;
	memdev->range_index = 1+1;
839
	memdev->region_index = 6+1;
840 841 842 843 844 845 846 847 848 849 850 851 852 853
	memdev->region_size = SPA1_SIZE/4;
	memdev->region_offset = t->spa_set_dma[1] + 2*SPA1_SIZE/4;
	memdev->address = SPA0_SIZE/2;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 4;

	/* mem-region5 (spa1, dimm3) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 5;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[3];
	memdev->physical_id = 3;
	memdev->region_id = 0;
	memdev->range_index = 1+1;
854
	memdev->region_index = 7+1;
855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981
	memdev->region_size = SPA1_SIZE/4;
	memdev->region_offset = t->spa_set_dma[1] + 3*SPA1_SIZE/4;
	memdev->address = SPA0_SIZE/2;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 4;

	/* mem-region6 (spa/dcr0, dimm0) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 6;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[0];
	memdev->physical_id = 0;
	memdev->region_id = 0;
	memdev->range_index = 2+1;
	memdev->region_index = 0+1;
	memdev->region_size = 0;
	memdev->region_offset = 0;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 1;

	/* mem-region7 (spa/dcr1, dimm1) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 7;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[1];
	memdev->physical_id = 1;
	memdev->region_id = 0;
	memdev->range_index = 3+1;
	memdev->region_index = 1+1;
	memdev->region_size = 0;
	memdev->region_offset = 0;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 1;

	/* mem-region8 (spa/dcr2, dimm2) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 8;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[2];
	memdev->physical_id = 2;
	memdev->region_id = 0;
	memdev->range_index = 4+1;
	memdev->region_index = 2+1;
	memdev->region_size = 0;
	memdev->region_offset = 0;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 1;

	/* mem-region9 (spa/dcr3, dimm3) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 9;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[3];
	memdev->physical_id = 3;
	memdev->region_id = 0;
	memdev->range_index = 5+1;
	memdev->region_index = 3+1;
	memdev->region_size = 0;
	memdev->region_offset = 0;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 1;

	/* mem-region10 (spa/bdw0, dimm0) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 10;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[0];
	memdev->physical_id = 0;
	memdev->region_id = 0;
	memdev->range_index = 6+1;
	memdev->region_index = 0+1;
	memdev->region_size = 0;
	memdev->region_offset = 0;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 1;

	/* mem-region11 (spa/bdw1, dimm1) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 11;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[1];
	memdev->physical_id = 1;
	memdev->region_id = 0;
	memdev->range_index = 7+1;
	memdev->region_index = 1+1;
	memdev->region_size = 0;
	memdev->region_offset = 0;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 1;

	/* mem-region12 (spa/bdw2, dimm2) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 12;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[2];
	memdev->physical_id = 2;
	memdev->region_id = 0;
	memdev->range_index = 8+1;
	memdev->region_index = 2+1;
	memdev->region_size = 0;
	memdev->region_offset = 0;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 1;

	/* mem-region13 (spa/dcr3, dimm3) */
	memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 13;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = handle[3];
	memdev->physical_id = 3;
	memdev->region_id = 0;
	memdev->range_index = 9+1;
	memdev->region_index = 3+1;
	memdev->region_size = 0;
	memdev->region_offset = 0;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 1;

	offset = offset + sizeof(struct acpi_nfit_memory_map) * 14;
982
	/* dcr-descriptor0: blk */
983 984 985 986
	dcr = nfit_buf + offset;
	dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
	dcr->header.length = sizeof(struct acpi_nfit_control_region);
	dcr->region_index = 0+1;
987
	dcr_common_init(dcr);
988
	dcr->serial_number = ~handle[0];
989
	dcr->code = NFIT_FIC_BLK;
990 991 992 993 994 995 996
	dcr->windows = 1;
	dcr->window_size = DCR_SIZE;
	dcr->command_offset = 0;
	dcr->command_size = 8;
	dcr->status_offset = 8;
	dcr->status_size = 4;

997
	/* dcr-descriptor1: blk */
998 999 1000 1001
	dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region);
	dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
	dcr->header.length = sizeof(struct acpi_nfit_control_region);
	dcr->region_index = 1+1;
1002
	dcr_common_init(dcr);
1003
	dcr->serial_number = ~handle[1];
1004
	dcr->code = NFIT_FIC_BLK;
1005 1006 1007 1008 1009 1010 1011
	dcr->windows = 1;
	dcr->window_size = DCR_SIZE;
	dcr->command_offset = 0;
	dcr->command_size = 8;
	dcr->status_offset = 8;
	dcr->status_size = 4;

1012
	/* dcr-descriptor2: blk */
1013 1014 1015 1016
	dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 2;
	dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
	dcr->header.length = sizeof(struct acpi_nfit_control_region);
	dcr->region_index = 2+1;
1017
	dcr_common_init(dcr);
1018
	dcr->serial_number = ~handle[2];
1019
	dcr->code = NFIT_FIC_BLK;
1020 1021 1022 1023 1024 1025 1026
	dcr->windows = 1;
	dcr->window_size = DCR_SIZE;
	dcr->command_offset = 0;
	dcr->command_size = 8;
	dcr->status_offset = 8;
	dcr->status_size = 4;

1027
	/* dcr-descriptor3: blk */
1028 1029 1030 1031
	dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 3;
	dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
	dcr->header.length = sizeof(struct acpi_nfit_control_region);
	dcr->region_index = 3+1;
1032
	dcr_common_init(dcr);
1033
	dcr->serial_number = ~handle[3];
1034
	dcr->code = NFIT_FIC_BLK;
1035 1036 1037 1038 1039 1040 1041 1042
	dcr->windows = 1;
	dcr->window_size = DCR_SIZE;
	dcr->command_offset = 0;
	dcr->command_size = 8;
	dcr->status_offset = 8;
	dcr->status_size = 4;

	offset = offset + sizeof(struct acpi_nfit_control_region) * 4;
1043 1044 1045 1046 1047 1048
	/* dcr-descriptor0: pmem */
	dcr = nfit_buf + offset;
	dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
	dcr->header.length = offsetof(struct acpi_nfit_control_region,
			window_size);
	dcr->region_index = 4+1;
1049
	dcr_common_init(dcr);
1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060
	dcr->serial_number = ~handle[0];
	dcr->code = NFIT_FIC_BYTEN;
	dcr->windows = 0;

	/* dcr-descriptor1: pmem */
	dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
			window_size);
	dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
	dcr->header.length = offsetof(struct acpi_nfit_control_region,
			window_size);
	dcr->region_index = 5+1;
1061
	dcr_common_init(dcr);
1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072
	dcr->serial_number = ~handle[1];
	dcr->code = NFIT_FIC_BYTEN;
	dcr->windows = 0;

	/* dcr-descriptor2: pmem */
	dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
			window_size) * 2;
	dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
	dcr->header.length = offsetof(struct acpi_nfit_control_region,
			window_size);
	dcr->region_index = 6+1;
1073
	dcr_common_init(dcr);
1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084
	dcr->serial_number = ~handle[2];
	dcr->code = NFIT_FIC_BYTEN;
	dcr->windows = 0;

	/* dcr-descriptor3: pmem */
	dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
			window_size) * 3;
	dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
	dcr->header.length = offsetof(struct acpi_nfit_control_region,
			window_size);
	dcr->region_index = 7+1;
1085
	dcr_common_init(dcr);
1086 1087 1088 1089 1090 1091
	dcr->serial_number = ~handle[3];
	dcr->code = NFIT_FIC_BYTEN;
	dcr->windows = 0;

	offset = offset + offsetof(struct acpi_nfit_control_region,
			window_size) * 4;
1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135
	/* bdw0 (spa/dcr0, dimm0) */
	bdw = nfit_buf + offset;
	bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
	bdw->header.length = sizeof(struct acpi_nfit_data_region);
	bdw->region_index = 0+1;
	bdw->windows = 1;
	bdw->offset = 0;
	bdw->size = BDW_SIZE;
	bdw->capacity = DIMM_SIZE;
	bdw->start_address = 0;

	/* bdw1 (spa/dcr1, dimm1) */
	bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region);
	bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
	bdw->header.length = sizeof(struct acpi_nfit_data_region);
	bdw->region_index = 1+1;
	bdw->windows = 1;
	bdw->offset = 0;
	bdw->size = BDW_SIZE;
	bdw->capacity = DIMM_SIZE;
	bdw->start_address = 0;

	/* bdw2 (spa/dcr2, dimm2) */
	bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 2;
	bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
	bdw->header.length = sizeof(struct acpi_nfit_data_region);
	bdw->region_index = 2+1;
	bdw->windows = 1;
	bdw->offset = 0;
	bdw->size = BDW_SIZE;
	bdw->capacity = DIMM_SIZE;
	bdw->start_address = 0;

	/* bdw3 (spa/dcr3, dimm3) */
	bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 3;
	bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
	bdw->header.length = sizeof(struct acpi_nfit_data_region);
	bdw->region_index = 3+1;
	bdw->windows = 1;
	bdw->offset = 0;
	bdw->size = BDW_SIZE;
	bdw->capacity = DIMM_SIZE;
	bdw->start_address = 0;

1136 1137 1138 1139
	offset = offset + sizeof(struct acpi_nfit_data_region) * 4;
	/* flush0 (dimm0) */
	flush = nfit_buf + offset;
	flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1140
	flush->header.length = flush_hint_size;
1141
	flush->device_handle = handle[0];
1142 1143 1144
	flush->hint_count = NUM_HINTS;
	for (i = 0; i < NUM_HINTS; i++)
		flush->hint_address[i] = t->flush_dma[0] + i * sizeof(u64);
1145 1146

	/* flush1 (dimm1) */
1147
	flush = nfit_buf + offset + flush_hint_size * 1;
1148
	flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1149
	flush->header.length = flush_hint_size;
1150
	flush->device_handle = handle[1];
1151 1152 1153
	flush->hint_count = NUM_HINTS;
	for (i = 0; i < NUM_HINTS; i++)
		flush->hint_address[i] = t->flush_dma[1] + i * sizeof(u64);
1154 1155

	/* flush2 (dimm2) */
1156
	flush = nfit_buf + offset + flush_hint_size  * 2;
1157
	flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1158
	flush->header.length = flush_hint_size;
1159
	flush->device_handle = handle[2];
1160 1161 1162
	flush->hint_count = NUM_HINTS;
	for (i = 0; i < NUM_HINTS; i++)
		flush->hint_address[i] = t->flush_dma[2] + i * sizeof(u64);
1163 1164

	/* flush3 (dimm3) */
1165
	flush = nfit_buf + offset + flush_hint_size * 3;
1166
	flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1167
	flush->header.length = flush_hint_size;
1168
	flush->device_handle = handle[3];
1169 1170 1171
	flush->hint_count = NUM_HINTS;
	for (i = 0; i < NUM_HINTS; i++)
		flush->hint_address[i] = t->flush_dma[3] + i * sizeof(u64);
1172

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	if (t->setup_hotplug) {
1174
		offset = offset + flush_hint_size * 4;
1175
		/* dcr-descriptor4: blk */
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		dcr = nfit_buf + offset;
		dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
		dcr->header.length = sizeof(struct acpi_nfit_control_region);
1179
		dcr->region_index = 8+1;
1180
		dcr_common_init(dcr);
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		dcr->serial_number = ~handle[4];
1182
		dcr->code = NFIT_FIC_BLK;
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		dcr->windows = 1;
		dcr->window_size = DCR_SIZE;
		dcr->command_offset = 0;
		dcr->command_size = 8;
		dcr->status_offset = 8;
		dcr->status_size = 4;

		offset = offset + sizeof(struct acpi_nfit_control_region);
1191 1192 1193 1194 1195 1196
		/* dcr-descriptor4: pmem */
		dcr = nfit_buf + offset;
		dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
		dcr->header.length = offsetof(struct acpi_nfit_control_region,
				window_size);
		dcr->region_index = 9+1;
1197
		dcr_common_init(dcr);
1198 1199 1200 1201 1202 1203
		dcr->serial_number = ~handle[4];
		dcr->code = NFIT_FIC_BYTEN;
		dcr->windows = 0;

		offset = offset + offsetof(struct acpi_nfit_control_region,
				window_size);
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		/* bdw4 (spa/dcr4, dimm4) */
		bdw = nfit_buf + offset;
		bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
		bdw->header.length = sizeof(struct acpi_nfit_data_region);
1208
		bdw->region_index = 8+1;
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1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255
		bdw->windows = 1;
		bdw->offset = 0;
		bdw->size = BDW_SIZE;
		bdw->capacity = DIMM_SIZE;
		bdw->start_address = 0;

		offset = offset + sizeof(struct acpi_nfit_data_region);
		/* spa10 (dcr4) dimm4 */
		spa = nfit_buf + offset;
		spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
		spa->header.length = sizeof(*spa);
		memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
		spa->range_index = 10+1;
		spa->address = t->dcr_dma[4];
		spa->length = DCR_SIZE;

		/*
		 * spa11 (single-dimm interleave for hotplug, note storage
		 * does not actually alias the related block-data-window
		 * regions)
		 */
		spa = nfit_buf + offset + sizeof(*spa);
		spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
		spa->header.length = sizeof(*spa);
		memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
		spa->range_index = 11+1;
		spa->address = t->spa_set_dma[2];
		spa->length = SPA0_SIZE;

		/* spa12 (bdw for dcr4) dimm4 */
		spa = nfit_buf + offset + sizeof(*spa) * 2;
		spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
		spa->header.length = sizeof(*spa);
		memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
		spa->range_index = 12+1;
		spa->address = t->dimm_dma[4];
		spa->length = DIMM_SIZE;

		offset = offset + sizeof(*spa) * 3;
		/* mem-region14 (spa/dcr4, dimm4) */
		memdev = nfit_buf + offset;
		memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
		memdev->header.length = sizeof(*memdev);
		memdev->device_handle = handle[4];
		memdev->physical_id = 4;
		memdev->region_id = 0;
		memdev->range_index = 10+1;
1256
		memdev->region_index = 8+1;
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		memdev->region_size = 0;
		memdev->region_offset = 0;
		memdev->address = 0;
		memdev->interleave_index = 0;
		memdev->interleave_ways = 1;

		/* mem-region15 (spa0, dimm4) */
		memdev = nfit_buf + offset +
				sizeof(struct acpi_nfit_memory_map);
		memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
		memdev->header.length = sizeof(*memdev);
		memdev->device_handle = handle[4];
		memdev->physical_id = 4;
		memdev->region_id = 0;
		memdev->range_index = 11+1;
1272
		memdev->region_index = 9+1;
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		memdev->region_size = SPA0_SIZE;
		memdev->region_offset = t->spa_set_dma[2];
		memdev->address = 0;
		memdev->interleave_index = 0;
		memdev->interleave_ways = 1;

1279
		/* mem-region16 (spa/bdw4, dimm4) */
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		memdev = nfit_buf + offset +
				sizeof(struct acpi_nfit_memory_map) * 2;
		memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
		memdev->header.length = sizeof(*memdev);
		memdev->device_handle = handle[4];
		memdev->physical_id = 4;
		memdev->region_id = 0;
		memdev->range_index = 12+1;
1288
		memdev->region_index = 8+1;
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		memdev->region_size = 0;
		memdev->region_offset = 0;
		memdev->address = 0;
		memdev->interleave_index = 0;
		memdev->interleave_ways = 1;

		offset = offset + sizeof(struct acpi_nfit_memory_map) * 3;
		/* flush3 (dimm4) */
		flush = nfit_buf + offset;
		flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1299
		flush->header.length = flush_hint_size;
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		flush->device_handle = handle[4];
1301 1302 1303 1304
		flush->hint_count = NUM_HINTS;
		for (i = 0; i < NUM_HINTS; i++)
			flush->hint_address[i] = t->flush_dma[4]
				+ i * sizeof(u64);
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	}

1307 1308
	post_ars_status(&t->ars_state, t->spa_set_dma[0], SPA0_SIZE);

1309
	acpi_desc = &t->acpi_desc;
1310 1311 1312
	set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_cmd_force_en);
	set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
	set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
1313
	set_bit(ND_CMD_SMART, &acpi_desc->dimm_cmd_force_en);
1314 1315 1316 1317
	set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en);
	set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en);
	set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en);
	set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en);
1318
	set_bit(ND_CMD_SMART_THRESHOLD, &acpi_desc->dimm_cmd_force_en);
1319 1320 1321 1322
}

static void nfit_test1_setup(struct nfit_test *t)
{
1323
	size_t offset;
1324 1325 1326 1327
	void *nfit_buf = t->nfit_buf;
	struct acpi_nfit_memory_map *memdev;
	struct acpi_nfit_control_region *dcr;
	struct acpi_nfit_system_address *spa;
1328
	struct acpi_nfit_desc *acpi_desc;
1329

1330
	offset = 0;
1331 1332 1333 1334 1335 1336 1337 1338 1339
	/* spa0 (flat range with no bdw aliasing) */
	spa = nfit_buf + offset;
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
	spa->range_index = 0+1;
	spa->address = t->spa_set_dma[0];
	spa->length = SPA2_SIZE;

1340 1341 1342 1343 1344 1345 1346 1347 1348 1349
	/* virtual cd region */
	spa = nfit_buf + sizeof(*spa);
	spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
	spa->header.length = sizeof(*spa);
	memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_VCD), 16);
	spa->range_index = 0;
	spa->address = t->spa_set_dma[1];
	spa->length = SPA_VCD_SIZE;

	offset += sizeof(*spa) * 2;
1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363
	/* mem-region0 (spa0, dimm0) */
	memdev = nfit_buf + offset;
	memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
	memdev->header.length = sizeof(*memdev);
	memdev->device_handle = 0;
	memdev->physical_id = 0;
	memdev->region_id = 0;
	memdev->range_index = 0+1;
	memdev->region_index = 0+1;
	memdev->region_size = SPA2_SIZE;
	memdev->region_offset = 0;
	memdev->address = 0;
	memdev->interleave_index = 0;
	memdev->interleave_ways = 1;
1364 1365
	memdev->flags = ACPI_NFIT_MEM_SAVE_FAILED | ACPI_NFIT_MEM_RESTORE_FAILED
		| ACPI_NFIT_MEM_FLUSH_FAILED | ACPI_NFIT_MEM_HEALTH_OBSERVED
1366
		| ACPI_NFIT_MEM_NOT_ARMED;
1367 1368 1369 1370 1371

	offset += sizeof(*memdev);
	/* dcr-descriptor0 */
	dcr = nfit_buf + offset;
	dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1372 1373
	dcr->header.length = offsetof(struct acpi_nfit_control_region,
			window_size);
1374
	dcr->region_index = 0+1;
1375
	dcr_common_init(dcr);
1376
	dcr->serial_number = ~0;
1377
	dcr->code = NFIT_FIC_BYTE;
1378
	dcr->windows = 0;
1379

1380 1381
	post_ars_status(&t->ars_state, t->spa_set_dma[0], SPA2_SIZE);

1382
	acpi_desc = &t->acpi_desc;
1383 1384 1385 1386
	set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en);
	set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en);
	set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en);
	set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en);
1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398
}

static int nfit_test_blk_do_io(struct nd_blk_region *ndbr, resource_size_t dpa,
		void *iobuf, u64 len, int rw)
{
	struct nfit_blk *nfit_blk = ndbr->blk_provider_data;
	struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
	struct nd_region *nd_region = &ndbr->nd_region;
	unsigned int lane;

	lane = nd_region_acquire_lane(nd_region);
	if (rw)
1399 1400 1401 1402 1403 1404 1405
		memcpy(mmio->addr.base + dpa, iobuf, len);
	else {
		memcpy(iobuf, mmio->addr.base + dpa, len);

		/* give us some some coverage of the mmio_flush_range() API */
		mmio_flush_range(mmio->addr.base + dpa, len);
	}
1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416
	nd_region_release_lane(nd_region, lane);

	return 0;
}

static int nfit_test_probe(struct platform_device *pdev)
{
	struct nvdimm_bus_descriptor *nd_desc;
	struct acpi_nfit_desc *acpi_desc;
	struct device *dev = &pdev->dev;
	struct nfit_test *nfit_test;
1417
	union acpi_object *obj;
1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429
	int rc;

	nfit_test = to_nfit_test(&pdev->dev);

	/* common alloc */
	if (nfit_test->num_dcr) {
		int num = nfit_test->num_dcr;

		nfit_test->dimm = devm_kcalloc(dev, num, sizeof(void *),
				GFP_KERNEL);
		nfit_test->dimm_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
				GFP_KERNEL);
1430 1431 1432 1433
		nfit_test->flush = devm_kcalloc(dev, num, sizeof(void *),
				GFP_KERNEL);
		nfit_test->flush_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
				GFP_KERNEL);
1434 1435 1436 1437 1438 1439 1440 1441 1442 1443
		nfit_test->label = devm_kcalloc(dev, num, sizeof(void *),
				GFP_KERNEL);
		nfit_test->label_dma = devm_kcalloc(dev, num,
				sizeof(dma_addr_t), GFP_KERNEL);
		nfit_test->dcr = devm_kcalloc(dev, num,
				sizeof(struct nfit_test_dcr *), GFP_KERNEL);
		nfit_test->dcr_dma = devm_kcalloc(dev, num,
				sizeof(dma_addr_t), GFP_KERNEL);
		if (nfit_test->dimm && nfit_test->dimm_dma && nfit_test->label
				&& nfit_test->label_dma && nfit_test->dcr
1444 1445
				&& nfit_test->dcr_dma && nfit_test->flush
				&& nfit_test->flush_dma)
1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469
			/* pass */;
		else
			return -ENOMEM;
	}

	if (nfit_test->num_pm) {
		int num = nfit_test->num_pm;

		nfit_test->spa_set = devm_kcalloc(dev, num, sizeof(void *),
				GFP_KERNEL);
		nfit_test->spa_set_dma = devm_kcalloc(dev, num,
				sizeof(dma_addr_t), GFP_KERNEL);
		if (nfit_test->spa_set && nfit_test->spa_set_dma)
			/* pass */;
		else
			return -ENOMEM;
	}

	/* per-nfit specific alloc */
	if (nfit_test->alloc(nfit_test))
		return -ENOMEM;

	nfit_test->setup(nfit_test);
	acpi_desc = &nfit_test->acpi_desc;
1470
	acpi_nfit_desc_init(acpi_desc, &pdev->dev);
1471 1472
	acpi_desc->blk_do_io = nfit_test_blk_do_io;
	nd_desc = &acpi_desc->nd_desc;
1473
	nd_desc->provider_name = NULL;
1474
	nd_desc->module = THIS_MODULE;
1475
	nd_desc->ndctl = nfit_test_ctl;
1476

1477 1478
	rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_buf,
			nfit_test->nfit_size);
1479
	if (rc)
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1480 1481 1482 1483 1484 1485 1486 1487
		return rc;

	if (nfit_test->setup != nfit_test0_setup)
		return 0;

	nfit_test->setup_hotplug = 1;
	nfit_test->setup(nfit_test);

1488 1489 1490 1491 1492 1493 1494 1495
	obj = kzalloc(sizeof(*obj), GFP_KERNEL);
	if (!obj)
		return -ENOMEM;
	obj->type = ACPI_TYPE_BUFFER;
	obj->buffer.length = nfit_test->nfit_size;
	obj->buffer.pointer = nfit_test->nfit_buf;
	*(nfit_test->_fit) = obj;
	__acpi_nfit_notify(&pdev->dev, nfit_test, 0x80);
1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600
	return 0;
}

static int nfit_test_remove(struct platform_device *pdev)
{
	return 0;
}

static void nfit_test_release(struct device *dev)
{
	struct nfit_test *nfit_test = to_nfit_test(dev);

	kfree(nfit_test);
}

static const struct platform_device_id nfit_test_id[] = {
	{ KBUILD_MODNAME },
	{ },
};

static struct platform_driver nfit_test_driver = {
	.probe = nfit_test_probe,
	.remove = nfit_test_remove,
	.driver = {
		.name = KBUILD_MODNAME,
	},
	.id_table = nfit_test_id,
};

static __init int nfit_test_init(void)
{
	int rc, i;

	nfit_test_setup(nfit_test_lookup);

	for (i = 0; i < NUM_NFITS; i++) {
		struct nfit_test *nfit_test;
		struct platform_device *pdev;

		nfit_test = kzalloc(sizeof(*nfit_test), GFP_KERNEL);
		if (!nfit_test) {
			rc = -ENOMEM;
			goto err_register;
		}
		INIT_LIST_HEAD(&nfit_test->resources);
		switch (i) {
		case 0:
			nfit_test->num_pm = NUM_PM;
			nfit_test->num_dcr = NUM_DCR;
			nfit_test->alloc = nfit_test0_alloc;
			nfit_test->setup = nfit_test0_setup;
			break;
		case 1:
			nfit_test->num_pm = 1;
			nfit_test->alloc = nfit_test1_alloc;
			nfit_test->setup = nfit_test1_setup;
			break;
		default:
			rc = -EINVAL;
			goto err_register;
		}
		pdev = &nfit_test->pdev;
		pdev->name = KBUILD_MODNAME;
		pdev->id = i;
		pdev->dev.release = nfit_test_release;
		rc = platform_device_register(pdev);
		if (rc) {
			put_device(&pdev->dev);
			goto err_register;
		}

		rc = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
		if (rc)
			goto err_register;

		instances[i] = nfit_test;
	}

	rc = platform_driver_register(&nfit_test_driver);
	if (rc)
		goto err_register;
	return 0;

 err_register:
	for (i = 0; i < NUM_NFITS; i++)
		if (instances[i])
			platform_device_unregister(&instances[i]->pdev);
	nfit_test_teardown();
	return rc;
}

static __exit void nfit_test_exit(void)
{
	int i;

	platform_driver_unregister(&nfit_test_driver);
	for (i = 0; i < NUM_NFITS; i++)
		platform_device_unregister(&instances[i]->pdev);
	nfit_test_teardown();
}

module_init(nfit_test_init);
module_exit(nfit_test_exit);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Intel Corporation");