c_can_platform.c 10.5 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
/*
 * Platform CAN bus driver for Bosch C_CAN controller
 *
 * Copyright (C) 2010 ST Microelectronics
 * Bhupesh Sharma <bhupesh.sharma@st.com>
 *
 * Borrowed heavily from the C_CAN driver originally written by:
 * Copyright (C) 2007
 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
 *
 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
 * Bosch C_CAN user manual can be obtained from:
 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
 * users_manual_c_can.pdf
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/if_arp.h>
#include <linux/if_ether.h>
#include <linux/list.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
33 34
#include <linux/of.h>
#include <linux/of_device.h>
35 36 37 38 39

#include <linux/can/dev.h>

#include "c_can.h"

40 41 42
#define CAN_RAMINIT_START_MASK(i)	(0x001 << (i))
#define CAN_RAMINIT_DONE_MASK(i)	(0x100 << (i))
#define CAN_RAMINIT_ALL_MASK(i)		(0x101 << (i))
43
#define DCAN_RAM_INIT_BIT		(1 << 3)
44
static DEFINE_SPINLOCK(raminit_lock);
45 46 47 48 49 50
/*
 * 16-bit c_can registers can be arranged differently in the memory
 * architecture of different implementations. For example: 16-bit
 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
 * Handle the same by providing a common read/write interface.
 */
51
static u16 c_can_plat_read_reg_aligned_to_16bit(const struct c_can_priv *priv,
52
						enum reg index)
53
{
54
	return readw(priv->base + priv->regs[index]);
55 56
}

57
static void c_can_plat_write_reg_aligned_to_16bit(const struct c_can_priv *priv,
58
						enum reg index, u16 val)
59
{
60
	writew(val, priv->base + priv->regs[index]);
61 62
}

63
static u16 c_can_plat_read_reg_aligned_to_32bit(const struct c_can_priv *priv,
64
						enum reg index)
65
{
66
	return readw(priv->base + 2 * priv->regs[index]);
67 68
}

69
static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv,
70
						enum reg index, u16 val)
71
{
72
	writew(val, priv->base + 2 * priv->regs[index]);
73 74
}

75
static void c_can_hw_raminit_wait_ti(const struct c_can_priv *priv, u32 mask,
76 77
				  u32 val)
{
78 79
	int timeout = 0;

80 81
	/* We look only at the bits of our instance. */
	val &= mask;
82
	while ((readl(priv->raminit_ctrlreg) & mask) != val) {
83
		udelay(1);
84 85 86 87 88 89 90
		timeout++;

		if (timeout == 1000) {
			dev_err(&priv->dev->dev, "%s: time out\n", __func__);
			break;
		}
	}
91 92
}

93
static void c_can_hw_raminit_ti(const struct c_can_priv *priv, bool enable)
94
{
95 96
	u32 mask = CAN_RAMINIT_ALL_MASK(priv->instance);
	u32 ctrl;
97

98 99 100 101 102 103 104 105 106 107 108
	spin_lock(&raminit_lock);

	ctrl = readl(priv->raminit_ctrlreg);
	/* We clear the done and start bit first. The start bit is
	 * looking at the 0 -> transition, but is not self clearing;
	 * And we clear the init done bit as well.
	 */
	ctrl &= ~CAN_RAMINIT_START_MASK(priv->instance);
	ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance);
	writel(ctrl, priv->raminit_ctrlreg);
	ctrl &= ~CAN_RAMINIT_DONE_MASK(priv->instance);
109
	c_can_hw_raminit_wait_ti(priv, mask, ctrl);
110 111 112 113 114 115

	if (enable) {
		/* Set start bit and wait for the done bit. */
		ctrl |= CAN_RAMINIT_START_MASK(priv->instance);
		writel(ctrl, priv->raminit_ctrlreg);
		ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance);
116
		c_can_hw_raminit_wait_ti(priv, mask, ctrl);
117 118
	}
	spin_unlock(&raminit_lock);
119 120
}

121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148
static u32 c_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index)
{
	u32 val;

	val = priv->read_reg(priv, index);
	val |= ((u32) priv->read_reg(priv, index + 1)) << 16;

	return val;
}

static void c_can_plat_write_reg32(const struct c_can_priv *priv, enum reg index,
		u32 val)
{
	priv->write_reg(priv, index + 1, val >> 16);
	priv->write_reg(priv, index, val);
}

static u32 d_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index)
{
	return readl(priv->base + priv->regs[index]);
}

static void d_can_plat_write_reg32(const struct c_can_priv *priv, enum reg index,
		u32 val)
{
	writel(val, priv->base + priv->regs[index]);
}

149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170
static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask)
{
	while (priv->read_reg32(priv, C_CAN_FUNCTION_REG) & mask)
		udelay(1);
}

static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
{
	u32 ctrl;

	ctrl = priv->read_reg32(priv, C_CAN_FUNCTION_REG);
	ctrl &= ~DCAN_RAM_INIT_BIT;
	priv->write_reg32(priv, C_CAN_FUNCTION_REG, ctrl);
	c_can_hw_raminit_wait(priv, ctrl);

	if (enable) {
		ctrl |= DCAN_RAM_INIT_BIT;
		priv->write_reg32(priv, C_CAN_FUNCTION_REG, ctrl);
		c_can_hw_raminit_wait(priv, ctrl);
	}
}

171 172 173 174 175 176 177 178
static const struct c_can_driver_data c_can_drvdata = {
	.id = BOSCH_C_CAN,
};

static const struct c_can_driver_data d_can_drvdata = {
	.id = BOSCH_D_CAN,
};

179
static struct platform_device_id c_can_id_table[] = {
180
	{
181
		.name = KBUILD_MODNAME,
182
		.driver_data = (kernel_ulong_t)&c_can_drvdata,
183
	},
184
	{
185
		.name = "c_can",
186
		.driver_data = (kernel_ulong_t)&c_can_drvdata,
187
	},
188
	{
189
		.name = "d_can",
190 191 192
		.driver_data = (kernel_ulong_t)&d_can_drvdata,
	},
	{ /* sentinel */ },
193
};
194
MODULE_DEVICE_TABLE(platform, c_can_id_table);
195 196

static const struct of_device_id c_can_of_table[] = {
197 198
	{ .compatible = "bosch,c_can", .data = &c_can_drvdata },
	{ .compatible = "bosch,d_can", .data = &d_can_drvdata },
199 200
	{ /* sentinel */ },
};
201
MODULE_DEVICE_TABLE(of, c_can_of_table);
202

B
Bill Pemberton 已提交
203
static int c_can_plat_probe(struct platform_device *pdev)
204 205 206 207 208
{
	int ret;
	void __iomem *addr;
	struct net_device *dev;
	struct c_can_priv *priv;
209
	const struct of_device_id *match;
210
	struct resource *mem, *res;
211
	int irq;
212
	struct clk *clk;
213 214 215 216 217 218 219 220
	const struct c_can_driver_data *drvdata;

	match = of_match_device(c_can_of_table, &pdev->dev);
	if (match) {
		drvdata = match->data;
	} else if (pdev->id_entry->driver_data) {
		drvdata = (struct c_can_driver_data *)
			platform_get_device_id(pdev)->driver_data;
221
	} else {
222
		return -ENODEV;
223 224
	}

225
	/* get the appropriate clk */
226
	clk = devm_clk_get(&pdev->dev, NULL);
227
	if (IS_ERR(clk)) {
228
		ret = PTR_ERR(clk);
229 230 231 232
		goto exit;
	}

	/* get the platform data */
233
	irq = platform_get_irq(pdev, 0);
234
	if (irq <= 0) {
235
		ret = -ENODEV;
236
		goto exit;
237 238
	}

239 240 241 242 243
	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	addr = devm_ioremap_resource(&pdev->dev, mem);
	if (IS_ERR(addr)) {
		ret =  PTR_ERR(addr);
		goto exit;
244 245 246 247 248 249
	}

	/* allocate the c_can device */
	dev = alloc_c_can_dev();
	if (!dev) {
		ret = -ENOMEM;
250
		goto exit;
251 252 253
	}

	priv = netdev_priv(dev);
254
	switch (drvdata->id) {
255
	case BOSCH_C_CAN:
256 257 258 259 260
		priv->regs = reg_map_c_can;
		switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) {
		case IORESOURCE_MEM_32BIT:
			priv->read_reg = c_can_plat_read_reg_aligned_to_32bit;
			priv->write_reg = c_can_plat_write_reg_aligned_to_32bit;
261 262
			priv->read_reg32 = c_can_plat_read_reg32;
			priv->write_reg32 = c_can_plat_write_reg32;
263 264 265 266 267
			break;
		case IORESOURCE_MEM_16BIT:
		default:
			priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
			priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
268 269
			priv->read_reg32 = c_can_plat_read_reg32;
			priv->write_reg32 = c_can_plat_write_reg32;
270 271 272
			break;
		}
		break;
273
	case BOSCH_D_CAN:
274 275 276 277
		priv->regs = reg_map_d_can;
		priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;
		priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
		priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
278 279
		priv->read_reg32 = d_can_plat_read_reg32;
		priv->write_reg32 = d_can_plat_write_reg32;
280 281 282 283 284 285 286

		if (pdev->dev.of_node)
			priv->instance = of_alias_get_id(pdev->dev.of_node, "d_can");
		else
			priv->instance = pdev->id;

		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
287 288 289 290 291 292 293 294 295
		/* Not all D_CAN modules have a separate register for the D_CAN
		 * RAM initialization. Use default RAM init bit in D_CAN module
		 * if not specified in DT.
		 */
		if (!res) {
			priv->raminit = c_can_hw_raminit;
			break;
		}

296 297
		priv->raminit_ctrlreg = devm_ioremap(&pdev->dev, res->start,
						     resource_size(res));
298
		if (!priv->raminit_ctrlreg || priv->instance < 0)
299 300
			dev_info(&pdev->dev, "control memory is not used for raminit\n");
		else
301
			priv->raminit = c_can_hw_raminit_ti;
302 303 304 305 306
		break;
	default:
		ret = -EINVAL;
		goto exit_free_device;
	}
307

308
	dev->irq = irq;
309
	priv->base = addr;
310
	priv->device = &pdev->dev;
311 312
	priv->can.clock.freq = clk_get_rate(clk);
	priv->priv = clk;
313
	priv->type = drvdata->id;
314 315 316 317 318 319 320 321 322 323 324 325

	platform_set_drvdata(pdev, dev);
	SET_NETDEV_DEV(dev, &pdev->dev);

	ret = register_c_can_dev(dev);
	if (ret) {
		dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
			KBUILD_MODNAME, ret);
		goto exit_free_device;
	}

	dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
326
		 KBUILD_MODNAME, priv->base, dev->irq);
327 328 329 330 331 332 333 334 335 336
	return 0;

exit_free_device:
	free_c_can_dev(dev);
exit:
	dev_err(&pdev->dev, "probe failed\n");

	return ret;
}

B
Bill Pemberton 已提交
337
static int c_can_plat_remove(struct platform_device *pdev)
338 339 340 341 342 343 344 345 346 347
{
	struct net_device *dev = platform_get_drvdata(pdev);

	unregister_c_can_dev(dev);

	free_c_can_dev(dev);

	return 0;
}

348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406
#ifdef CONFIG_PM
static int c_can_suspend(struct platform_device *pdev, pm_message_t state)
{
	int ret;
	struct net_device *ndev = platform_get_drvdata(pdev);
	struct c_can_priv *priv = netdev_priv(ndev);

	if (priv->type != BOSCH_D_CAN) {
		dev_warn(&pdev->dev, "Not supported\n");
		return 0;
	}

	if (netif_running(ndev)) {
		netif_stop_queue(ndev);
		netif_device_detach(ndev);
	}

	ret = c_can_power_down(ndev);
	if (ret) {
		netdev_err(ndev, "failed to enter power down mode\n");
		return ret;
	}

	priv->can.state = CAN_STATE_SLEEPING;

	return 0;
}

static int c_can_resume(struct platform_device *pdev)
{
	int ret;
	struct net_device *ndev = platform_get_drvdata(pdev);
	struct c_can_priv *priv = netdev_priv(ndev);

	if (priv->type != BOSCH_D_CAN) {
		dev_warn(&pdev->dev, "Not supported\n");
		return 0;
	}

	ret = c_can_power_up(ndev);
	if (ret) {
		netdev_err(ndev, "Still in power down mode\n");
		return ret;
	}

	priv->can.state = CAN_STATE_ERROR_ACTIVE;

	if (netif_running(ndev)) {
		netif_device_attach(ndev);
		netif_start_queue(ndev);
	}

	return 0;
}
#else
#define c_can_suspend NULL
#define c_can_resume NULL
#endif

407 408 409 410
static struct platform_driver c_can_plat_driver = {
	.driver = {
		.name = KBUILD_MODNAME,
		.owner = THIS_MODULE,
411
		.of_match_table = c_can_of_table,
412 413
	},
	.probe = c_can_plat_probe,
B
Bill Pemberton 已提交
414
	.remove = c_can_plat_remove,
415 416
	.suspend = c_can_suspend,
	.resume = c_can_resume,
417
	.id_table = c_can_id_table,
418 419
};

420
module_platform_driver(c_can_plat_driver);
421 422 423 424

MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller");