dpi.c 18.5 KB
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/*
 * linux/drivers/video/omap2/dss/dpi.c
 *
 * Copyright (C) 2009 Nokia Corporation
 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
 *
 * Some code and ideas taken from drivers/video/omap/ driver
 * by Imre Deak.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#define DSS_SUBSYS_NAME "DPI"

#include <linux/kernel.h>
#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
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#include <linux/string.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <video/omapdss.h>
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#include "dss.h"
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#include "dss_features.h"
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#define HSDIV_DISPC	0

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struct dpi_data {
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	struct platform_device *pdev;

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	struct regulator *vdds_dsi_reg;
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	struct dss_pll *pll;
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	struct mutex lock;

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	struct omap_video_timings timings;
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	struct dss_lcd_mgr_config mgr_config;
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	int data_lines;
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	struct omap_dss_device output;
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	bool port_initialized;
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};

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static struct dpi_data *dpi_get_data_from_dssdev(struct omap_dss_device *dssdev)
{
	return container_of(dssdev, struct dpi_data, output);
}

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/* only used in non-DT mode */
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static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev)
{
	return dev_get_drvdata(&pdev->dev);
}
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static struct dss_pll *dpi_get_pll(enum omap_channel channel)
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{
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	/*
	 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
	 * would also be used for DISPC fclk. Meaning, when the DPI output is
	 * disabled, DISPC clock will be disabled, and TV out will stop.
	 */
	switch (omapdss_get_version()) {
	case OMAPDSS_VER_OMAP24xx:
	case OMAPDSS_VER_OMAP34xx_ES1:
	case OMAPDSS_VER_OMAP34xx_ES3:
	case OMAPDSS_VER_OMAP3630:
	case OMAPDSS_VER_AM35xx:
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	case OMAPDSS_VER_AM43xx:
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		return NULL;

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	case OMAPDSS_VER_OMAP4430_ES1:
	case OMAPDSS_VER_OMAP4430_ES2:
	case OMAPDSS_VER_OMAP4:
		switch (channel) {
		case OMAP_DSS_CHANNEL_LCD:
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			return dss_pll_find("dsi0");
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		case OMAP_DSS_CHANNEL_LCD2:
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			return dss_pll_find("dsi1");
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		default:
			return NULL;
		}

	case OMAPDSS_VER_OMAP5:
		switch (channel) {
		case OMAP_DSS_CHANNEL_LCD:
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			return dss_pll_find("dsi0");
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		case OMAP_DSS_CHANNEL_LCD3:
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			return dss_pll_find("dsi1");
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		default:
			return NULL;
		}

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	case OMAPDSS_VER_DRA7xx:
		switch (channel) {
		case OMAP_DSS_CHANNEL_LCD:
		case OMAP_DSS_CHANNEL_LCD2:
			return dss_pll_find("video0");
		case OMAP_DSS_CHANNEL_LCD3:
			return dss_pll_find("video1");
		default:
			return NULL;
		}

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	default:
		return NULL;
	}
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}

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static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
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{
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	switch (channel) {
	case OMAP_DSS_CHANNEL_LCD:
		return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
	case OMAP_DSS_CHANNEL_LCD2:
		return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
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	case OMAP_DSS_CHANNEL_LCD3:
		return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
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	default:
		/* this shouldn't happen */
		WARN_ON(1);
		return OMAP_DSS_CLK_SRC_FCK;
	}
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}

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struct dpi_clk_calc_ctx {
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	struct dss_pll *pll;
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	/* inputs */

	unsigned long pck_min, pck_max;

	/* outputs */

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	struct dss_pll_clock_info dsi_cinfo;
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	unsigned long fck;
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	struct dispc_clock_info dispc_cinfo;
};

static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
		unsigned long pck, void *data)
{
	struct dpi_clk_calc_ctx *ctx = data;

	/*
	 * Odd dividers give us uneven duty cycle, causing problem when level
	 * shifted. So skip all odd dividers when the pixel clock is on the
	 * higher side.
	 */
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	if (ctx->pck_min >= 100000000) {
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		if (lckd > 1 && lckd % 2 != 0)
			return false;

		if (pckd > 1 && pckd % 2 != 0)
			return false;
	}

	ctx->dispc_cinfo.lck_div = lckd;
	ctx->dispc_cinfo.pck_div = pckd;
	ctx->dispc_cinfo.lck = lck;
	ctx->dispc_cinfo.pck = pck;

	return true;
}


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static bool dpi_calc_hsdiv_cb(int m_dispc, unsigned long dispc,
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		void *data)
{
	struct dpi_clk_calc_ctx *ctx = data;

	/*
	 * Odd dividers give us uneven duty cycle, causing problem when level
	 * shifted. So skip all odd dividers when the pixel clock is on the
	 * higher side.
	 */
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	if (m_dispc > 1 && m_dispc % 2 != 0 && ctx->pck_min >= 100000000)
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		return false;

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	ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc;
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	ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc;
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	return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
			dpi_calc_dispc_cb, ctx);
}


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static bool dpi_calc_pll_cb(int n, int m, unsigned long fint,
		unsigned long clkdco,
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		void *data)
{
	struct dpi_clk_calc_ctx *ctx = data;

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	ctx->dsi_cinfo.n = n;
	ctx->dsi_cinfo.m = m;
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	ctx->dsi_cinfo.fint = fint;
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	ctx->dsi_cinfo.clkdco = clkdco;
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	return dss_pll_hsdiv_calc(ctx->pll, clkdco,
		ctx->pck_min, dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
		dpi_calc_hsdiv_cb, ctx);
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}

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static bool dpi_calc_dss_cb(unsigned long fck, void *data)
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{
	struct dpi_clk_calc_ctx *ctx = data;

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	ctx->fck = fck;
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	return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
			dpi_calc_dispc_cb, ctx);
}

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static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned long pck,
		struct dpi_clk_calc_ctx *ctx)
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{
	unsigned long clkin;
	unsigned long pll_min, pll_max;

	memset(ctx, 0, sizeof(*ctx));
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	ctx->pll = dpi->pll;
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	ctx->pck_min = pck - 1000;
	ctx->pck_max = pck + 1000;

	pll_min = 0;
	pll_max = 0;

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	clkin = clk_get_rate(ctx->pll->clkin);

	return dss_pll_calc(ctx->pll, clkin,
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			pll_min, pll_max,
			dpi_calc_pll_cb, ctx);
}

static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
{
	int i;

	/*
	 * DSS fck gives us very few possibilities, so finding a good pixel
	 * clock may not be possible. We try multiple times to find the clock,
	 * each time widening the pixel clock range we look for, up to
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	 * +/- ~15MHz.
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	 */

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	for (i = 0; i < 25; ++i) {
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		bool ok;

		memset(ctx, 0, sizeof(*ctx));
		if (pck > 1000 * i * i * i)
			ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
		else
			ctx->pck_min = 0;
		ctx->pck_max = pck + 1000 * i * i * i;

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		ok = dss_div_calc(pck, ctx->pck_min, dpi_calc_dss_cb, ctx);
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		if (ok)
			return ok;
	}

	return false;
}



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static int dpi_set_dsi_clk(struct dpi_data *dpi, enum omap_channel channel,
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		unsigned long pck_req, unsigned long *fck, int *lck_div,
		int *pck_div)
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{
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	struct dpi_clk_calc_ctx ctx;
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	int r;
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	bool ok;
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	ok = dpi_dsi_clk_calc(dpi, pck_req, &ctx);
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	if (!ok)
		return -EINVAL;
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	r = dss_pll_set_config(dpi->pll, &ctx.dsi_cinfo);
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	if (r)
		return r;

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	dss_select_lcd_clk_source(channel,
			dpi_get_alt_clk_src(channel));
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	dpi->mgr_config.clock_info = ctx.dispc_cinfo;
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	*fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
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	*lck_div = ctx.dispc_cinfo.lck_div;
	*pck_div = ctx.dispc_cinfo.pck_div;
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	return 0;
}
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static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req,
		unsigned long *fck, int *lck_div, int *pck_div)
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{
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	struct dpi_clk_calc_ctx ctx;
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	int r;
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	bool ok;
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	ok = dpi_dss_clk_calc(pck_req, &ctx);
	if (!ok)
		return -EINVAL;
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	r = dss_set_fck_rate(ctx.fck);
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	if (r)
		return r;

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	dpi->mgr_config.clock_info = ctx.dispc_cinfo;
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	*fck = ctx.fck;
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	*lck_div = ctx.dispc_cinfo.lck_div;
	*pck_div = ctx.dispc_cinfo.pck_div;
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	return 0;
}

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static int dpi_set_mode(struct dpi_data *dpi)
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{
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	struct omap_dss_device *out = &dpi->output;
	struct omap_overlay_manager *mgr = out->manager;
	struct omap_video_timings *t = &dpi->timings;
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	int lck_div = 0, pck_div = 0;
	unsigned long fck = 0;
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	unsigned long pck;
	int r = 0;

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	if (dpi->pll)
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		r = dpi_set_dsi_clk(dpi, mgr->id, t->pixelclock, &fck,
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				&lck_div, &pck_div);
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	else
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		r = dpi_set_dispc_clk(dpi, t->pixelclock, &fck,
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				&lck_div, &pck_div);
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	if (r)
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		return r;
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	pck = fck / lck_div / pck_div;
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	if (pck != t->pixelclock) {
		DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
			t->pixelclock, pck);
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		t->pixelclock = pck;
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	}

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	dss_mgr_set_timings(mgr, t);
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	return 0;
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}

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static void dpi_config_lcd_manager(struct dpi_data *dpi)
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{
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	struct omap_dss_device *out = &dpi->output;
	struct omap_overlay_manager *mgr = out->manager;

	dpi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
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	dpi->mgr_config.stallmode = false;
	dpi->mgr_config.fifohandcheck = false;
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	dpi->mgr_config.video_port_width = dpi->data_lines;
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	dpi->mgr_config.lcden_sig_polarity = 0;
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	dss_mgr_set_lcd_config(mgr, &dpi->mgr_config);
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}

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static int dpi_display_enable(struct omap_dss_device *dssdev)
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{
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	struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
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	struct omap_dss_device *out = &dpi->output;
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	int r;

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	mutex_lock(&dpi->lock);
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	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi->vdds_dsi_reg) {
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		DSSERR("no VDSS_DSI regulator\n");
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		r = -ENODEV;
		goto err_no_reg;
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	}

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	if (out->manager == NULL) {
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		DSSERR("failed to enable display: no output/manager\n");
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		r = -ENODEV;
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		goto err_no_out_mgr;
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	}

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	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
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		r = regulator_enable(dpi->vdds_dsi_reg);
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		if (r)
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			goto err_reg_enable;
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	}

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	r = dispc_runtime_get();
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	if (r)
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		goto err_get_dispc;

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	r = dss_dpi_select_source(out->port_num, out->manager->id);
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	if (r)
		goto err_src_sel;

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	if (dpi->pll) {
		r = dss_pll_enable(dpi->pll);
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		if (r)
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			goto err_dsi_pll_init;
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	}

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	r = dpi_set_mode(dpi);
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	if (r)
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		goto err_set_mode;
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	dpi_config_lcd_manager(dpi);
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	mdelay(2);

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	r = dss_mgr_enable(out->manager);
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	if (r)
		goto err_mgr_enable;
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	mutex_unlock(&dpi->lock);
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	return 0;

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err_mgr_enable:
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err_set_mode:
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	if (dpi->pll)
		dss_pll_disable(dpi->pll);
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err_dsi_pll_init:
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err_src_sel:
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	dispc_runtime_put();
err_get_dispc:
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	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
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		regulator_disable(dpi->vdds_dsi_reg);
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err_reg_enable:
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err_no_out_mgr:
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err_no_reg:
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	mutex_unlock(&dpi->lock);
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	return r;
}

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static void dpi_display_disable(struct omap_dss_device *dssdev)
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{
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	struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
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	struct omap_overlay_manager *mgr = dpi->output.manager;
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	mutex_lock(&dpi->lock);
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	dss_mgr_disable(mgr);
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	if (dpi->pll) {
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		dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
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		dss_pll_disable(dpi->pll);
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	}
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	dispc_runtime_put();
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	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
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		regulator_disable(dpi->vdds_dsi_reg);
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	mutex_unlock(&dpi->lock);
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}

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static void dpi_set_timings(struct omap_dss_device *dssdev,
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		struct omap_video_timings *timings)
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{
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	struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
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	DSSDBG("dpi_set_timings\n");
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	mutex_lock(&dpi->lock);
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	dpi->timings = *timings;
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	mutex_unlock(&dpi->lock);
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}

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static void dpi_get_timings(struct omap_dss_device *dssdev,
		struct omap_video_timings *timings)
{
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	struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
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	mutex_lock(&dpi->lock);
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	*timings = dpi->timings;
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	mutex_unlock(&dpi->lock);
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}

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static int dpi_check_timings(struct omap_dss_device *dssdev,
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			struct omap_video_timings *timings)
{
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	struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
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	struct omap_overlay_manager *mgr = dpi->output.manager;
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	int lck_div, pck_div;
	unsigned long fck;
	unsigned long pck;
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	struct dpi_clk_calc_ctx ctx;
	bool ok;
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	if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
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		return -EINVAL;

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	if (timings->pixelclock == 0)
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		return -EINVAL;

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	if (dpi->pll) {
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		ok = dpi_dsi_clk_calc(dpi, timings->pixelclock, &ctx);
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		if (!ok)
			return -EINVAL;
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		fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
528
	} else {
529
		ok = dpi_dss_clk_calc(timings->pixelclock, &ctx);
530 531
		if (!ok)
			return -EINVAL;
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533
		fck = ctx.fck;
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	}
535

536 537
	lck_div = ctx.dispc_cinfo.lck_div;
	pck_div = ctx.dispc_cinfo.pck_div;
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539
	pck = fck / lck_div / pck_div;
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541
	timings->pixelclock = pck;
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	return 0;
}

546
static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
547
{
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	struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
549

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	mutex_lock(&dpi->lock);
551

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	dpi->data_lines = data_lines;

	mutex_unlock(&dpi->lock);
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}

557
static int dpi_verify_dsi_pll(struct dss_pll *pll)
558 559 560 561 562
{
	int r;

	/* do initial setup with the PLL to see if it is operational */

563
	r = dss_pll_enable(pll);
564
	if (r)
565 566
		return r;

567
	dss_pll_disable(pll);
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	return 0;
}

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static int dpi_init_regulator(struct dpi_data *dpi)
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{
	struct regulator *vdds_dsi;

	if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
		return 0;

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	if (dpi->vdds_dsi_reg)
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		return 0;

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	vdds_dsi = devm_regulator_get(&dpi->pdev->dev, "vdds_dsi");
583
	if (IS_ERR(vdds_dsi)) {
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		if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER)
			DSSERR("can't get VDDS_DSI regulator\n");
586
		return PTR_ERR(vdds_dsi);
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	}

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	dpi->vdds_dsi_reg = vdds_dsi;
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	return 0;
}

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static void dpi_init_pll(struct dpi_data *dpi)
595
{
596
	struct dss_pll *pll;
597

598
	if (dpi->pll)
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		return;

601 602
	pll = dpi_get_pll(dpi->output.dispc_channel);
	if (!pll)
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		return;

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	/* On DRA7 we need to set a mux to use the PLL */
	if (omapdss_get_version() == OMAPDSS_VER_DRA7xx)
		dss_ctrl_pll_set_control_mux(pll->id, dpi->output.dispc_channel);

609
	if (dpi_verify_dsi_pll(pll)) {
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		DSSWARN("DSI PLL not operational\n");
		return;
	}

614
	dpi->pll = pll;
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}

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/*
 * Return a hardcoded channel for the DPI output. This should work for
 * current use cases, but this can be later expanded to either resolve
 * the channel in some more dynamic manner, or get the channel as a user
 * parameter.
 */
623
static enum omap_channel dpi_get_channel(int port_num)
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{
	switch (omapdss_get_version()) {
	case OMAPDSS_VER_OMAP24xx:
	case OMAPDSS_VER_OMAP34xx_ES1:
	case OMAPDSS_VER_OMAP34xx_ES3:
	case OMAPDSS_VER_OMAP3630:
	case OMAPDSS_VER_AM35xx:
631
	case OMAPDSS_VER_AM43xx:
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		return OMAP_DSS_CHANNEL_LCD;

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	case OMAPDSS_VER_DRA7xx:
		switch (port_num) {
		case 2:
			return OMAP_DSS_CHANNEL_LCD3;
		case 1:
			return OMAP_DSS_CHANNEL_LCD2;
		case 0:
		default:
			return OMAP_DSS_CHANNEL_LCD;
		}

645 646 647 648 649 650 651 652 653 654 655 656 657 658
	case OMAPDSS_VER_OMAP4430_ES1:
	case OMAPDSS_VER_OMAP4430_ES2:
	case OMAPDSS_VER_OMAP4:
		return OMAP_DSS_CHANNEL_LCD2;

	case OMAPDSS_VER_OMAP5:
		return OMAP_DSS_CHANNEL_LCD3;

	default:
		DSSWARN("unsupported DSS version\n");
		return OMAP_DSS_CHANNEL_LCD;
	}
}

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static int dpi_connect(struct omap_dss_device *dssdev,
		struct omap_dss_device *dst)
{
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	struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
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	struct omap_overlay_manager *mgr;
	int r;

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	r = dpi_init_regulator(dpi);
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	if (r)
		return r;

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	dpi_init_pll(dpi);
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	mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
	if (!mgr)
		return -ENODEV;

	r = dss_mgr_connect(mgr, dssdev);
	if (r)
		return r;

	r = omapdss_output_set_device(dssdev, dst);
	if (r) {
		DSSERR("failed to connect output to new device: %s\n",
				dst->name);
		dss_mgr_disconnect(mgr, dssdev);
		return r;
	}

	return 0;
}

static void dpi_disconnect(struct omap_dss_device *dssdev,
		struct omap_dss_device *dst)
{
694
	WARN_ON(dst != dssdev->dst);
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696
	if (dst != dssdev->dst)
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		return;

	omapdss_output_unset_device(dssdev);

	if (dssdev->manager)
		dss_mgr_disconnect(dssdev->manager, dssdev);
}

static const struct omapdss_dpi_ops dpi_ops = {
	.connect = dpi_connect,
	.disconnect = dpi_disconnect,

709 710
	.enable = dpi_display_enable,
	.disable = dpi_display_disable,
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	.check_timings = dpi_check_timings,
713
	.set_timings = dpi_set_timings,
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	.get_timings = dpi_get_timings,

716
	.set_data_lines = dpi_set_data_lines,
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};

719
static void dpi_init_output(struct platform_device *pdev)
720
{
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	struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
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	struct omap_dss_device *out = &dpi->output;
723

724
	out->dev = &pdev->dev;
725
	out->id = OMAP_DSS_OUTPUT_DPI;
726
	out->output_type = OMAP_DISPLAY_TYPE_DPI;
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	out->name = "dpi.0";
728
	out->dispc_channel = dpi_get_channel(0);
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	out->ops.dpi = &dpi_ops;
730
	out->owner = THIS_MODULE;
731

732
	omapdss_register_output(out);
733 734
}

735
static void dpi_uninit_output(struct platform_device *pdev)
736
{
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	struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
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	struct omap_dss_device *out = &dpi->output;
739

740
	omapdss_unregister_output(out);
741 742
}

743 744 745 746 747
static void dpi_init_output_port(struct platform_device *pdev,
	struct device_node *port)
{
	struct dpi_data *dpi = port->data;
	struct omap_dss_device *out = &dpi->output;
748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766
	int r;
	u32 port_num;

	r = of_property_read_u32(port, "reg", &port_num);
	if (r)
		port_num = 0;

	switch (port_num) {
	case 2:
		out->name = "dpi.2";
		break;
	case 1:
		out->name = "dpi.1";
		break;
	case 0:
	default:
		out->name = "dpi.0";
		break;
	}
767 768 769 770

	out->dev = &pdev->dev;
	out->id = OMAP_DSS_OUTPUT_DPI;
	out->output_type = OMAP_DISPLAY_TYPE_DPI;
771 772
	out->dispc_channel = dpi_get_channel(port_num);
	out->port_num = port_num;
773 774 775 776 777 778
	out->ops.dpi = &dpi_ops;
	out->owner = THIS_MODULE;

	omapdss_register_output(out);
}

779
static void dpi_uninit_output_port(struct device_node *port)
780 781 782 783 784 785 786
{
	struct dpi_data *dpi = port->data;
	struct omap_dss_device *out = &dpi->output;

	omapdss_unregister_output(out);
}

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static int dpi_bind(struct device *dev, struct device *master, void *data)
788
{
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	struct platform_device *pdev = to_platform_device(dev);
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	struct dpi_data *dpi;

	dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
	if (!dpi)
		return -ENOMEM;
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	dpi->pdev = pdev;
797

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	dev_set_drvdata(&pdev->dev, dpi);

	mutex_init(&dpi->lock);
801

802 803
	dpi_init_output(pdev);

804 805 806
	return 0;
}

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static void dpi_unbind(struct device *dev, struct device *master, void *data)
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{
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	struct platform_device *pdev = to_platform_device(dev);

811
	dpi_uninit_output(pdev);
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}

static const struct component_ops dpi_component_ops = {
	.bind	= dpi_bind,
	.unbind	= dpi_unbind,
};
818

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static int dpi_probe(struct platform_device *pdev)
{
	return component_add(&pdev->dev, &dpi_component_ops);
}

static int dpi_remove(struct platform_device *pdev)
{
	component_del(&pdev->dev, &dpi_component_ops);
827
	return 0;
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}

830
static struct platform_driver omap_dpi_driver = {
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	.probe		= dpi_probe,
	.remove		= dpi_remove,
833 834
	.driver         = {
		.name   = "omapdss_dpi",
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		.suppress_bind_attrs = true,
836 837 838
	},
};

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int __init dpi_init_platform_driver(void)
840
{
841
	return platform_driver_register(&omap_dpi_driver);
842 843
}

844
void dpi_uninit_platform_driver(void)
845 846 847
{
	platform_driver_unregister(&omap_dpi_driver);
}
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849
int dpi_init_port(struct platform_device *pdev, struct device_node *port)
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{
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	struct dpi_data *dpi;
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	struct device_node *ep;
	u32 datalines;
	int r;

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	dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
	if (!dpi)
		return -ENOMEM;

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	ep = omapdss_of_get_next_endpoint(port, NULL);
	if (!ep)
		return 0;

	r = of_property_read_u32(ep, "data-lines", &datalines);
	if (r) {
		DSSERR("failed to parse datalines\n");
		goto err_datalines;
	}

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	dpi->data_lines = datalines;
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	of_node_put(ep);

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	dpi->pdev = pdev;
875
	port->data = dpi;
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	mutex_init(&dpi->lock);
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879
	dpi_init_output_port(pdev, port);
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	dpi->port_initialized = true;
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	return 0;

err_datalines:
	of_node_put(ep);

	return r;
}

891
void dpi_uninit_port(struct device_node *port)
T
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{
893
	struct dpi_data *dpi = port->data;
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	if (!dpi->port_initialized)
T
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		return;

898
	dpi_uninit_output_port(port);
T
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}