setup.c 27.7 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
/*
 * Copyright (C) 2009 Renesas Solutions Corp.
 *
 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
17 18
#include <linux/io.h>
#include <linux/delay.h>
19
#include <linux/usb/r8a66597.h>
20
#include <linux/i2c.h>
21
#include <linux/i2c/tsc2007.h>
22 23 24 25
#include <linux/spi/spi.h>
#include <linux/spi/sh_msiof.h>
#include <linux/spi/mmc_spi.h>
#include <linux/mmc/host.h>
26
#include <linux/input.h>
M
Magnus Damm 已提交
27
#include <linux/input/sh_keysc.h>
28
#include <linux/mfd/sh_mobile_sdhi.h>
29
#include <video/sh_mobile_lcdc.h>
30
#include <sound/sh_fsi.h>
31
#include <media/sh_mobile_ceu.h>
32
#include <media/tw9910.h>
33
#include <media/mt9t112.h>
34
#include <asm/heartbeat.h>
35
#include <asm/sh_eth.h>
36
#include <asm/clock.h>
37
#include <asm/suspend.h>
38 39 40
#include <cpu/sh7724.h>

/*
41 42 43 44 45 46 47 48
 *  Address      Interface        BusWidth
 *-----------------------------------------
 *  0x0000_0000  uboot            16bit
 *  0x0004_0000  Linux romImage   16bit
 *  0x0014_0000  MTD for Linux    16bit
 *  0x0400_0000  Internal I/O     16/32bit
 *  0x0800_0000  DRAM             32bit
 *  0x1800_0000  MFI              16bit
49 50
 */

51 52 53 54 55 56 57 58 59 60 61 62 63 64
/* SWITCH
 *------------------------------
 * DS2[1] = FlashROM write protect  ON     : write protect
 *                                  OFF    : No write protect
 * DS2[2] = RMII / TS, SCIF         ON     : RMII
 *                                  OFF    : TS, SCIF3
 * DS2[3] = Camera / Video          ON     : Camera
 *                                  OFF    : NTSC/PAL (IN)
 * DS2[5] = NTSC_OUT Clock          ON     : On board OSC
 *                                  OFF    : SH7724 DV_CLK
 * DS2[6-7] = MMC / SD              ON-OFF : SD
 *                                  OFF-ON : MMC
 */

65 66
/* Heartbeat */
static unsigned char led_pos[] = { 0, 1, 2, 3 };
67

68 69 70 71 72
static struct heartbeat_data heartbeat_data = {
	.nr_bits = 4,
	.bit_pos = led_pos,
};

73 74 75 76
static struct resource heartbeat_resource = {
	.start  = 0xA405012C, /* PTG */
	.end    = 0xA405012E - 1,
	.flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
77 78 79 80 81 82 83 84
};

static struct platform_device heartbeat_device = {
	.name           = "heartbeat",
	.id             = -1,
	.dev = {
		.platform_data = &heartbeat_data,
	},
85 86
	.num_resources  = 1,
	.resource       = &heartbeat_resource,
87 88 89 90 91
};

/* MTD */
static struct mtd_partition nor_flash_partitions[] = {
	{
92
		.name = "boot loader",
93
		.offset = 0,
94
		.size = (5 * 1024 * 1024),
95
		.mask_flags = MTD_WRITEABLE,  /* force read-only */
96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126
	}, {
		.name = "free-area",
		.offset = MTDPART_OFS_APPEND,
		.size = MTDPART_SIZ_FULL,
	},
};

static struct physmap_flash_data nor_flash_data = {
	.width		= 2,
	.parts		= nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
};

static struct resource nor_flash_resources[] = {
	[0] = {
		.name	= "NOR Flash",
		.start	= 0x00000000,
		.end	= 0x03ffffff,
		.flags	= IORESOURCE_MEM,
	}
};

static struct platform_device nor_flash_device = {
	.name		= "physmap-flash",
	.resource	= nor_flash_resources,
	.num_resources	= ARRAY_SIZE(nor_flash_resources),
	.dev		= {
		.platform_data = &nor_flash_data,
	},
};

127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143
/* SH Eth */
#define SH_ETH_ADDR	(0xA4600000)
static struct resource sh_eth_resources[] = {
	[0] = {
		.start = SH_ETH_ADDR,
		.end   = SH_ETH_ADDR + 0x1FC,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = 91,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

struct sh_eth_plat_data sh_eth_plat = {
	.phy = 0x1f, /* SMSC LAN8700 */
	.edmac_endian = EDMAC_LITTLE_ENDIAN,
144
	.ether_link_active_low = 1
145 146 147 148 149 150 151 152 153 154
};

static struct platform_device sh_eth_device = {
	.name = "sh-eth",
	.id	= 0,
	.dev = {
		.platform_data = &sh_eth_plat,
	},
	.num_resources = ARRAY_SIZE(sh_eth_resources),
	.resource = sh_eth_resources,
155 156 157
	.archdata = {
		.hwblk_id = HWBLK_ETHER,
	},
158 159
};

160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195
/* USB0 host */
void usb0_port_power(int port, int power)
{
	gpio_set_value(GPIO_PTB4, power);
}

static struct r8a66597_platdata usb0_host_data = {
	.on_chip = 1,
	.port_power = usb0_port_power,
};

static struct resource usb0_host_resources[] = {
	[0] = {
		.start	= 0xa4d80000,
		.end	= 0xa4d80124 - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 65,
		.end	= 65,
		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
	},
};

static struct platform_device usb0_host_device = {
	.name		= "r8a66597_hcd",
	.id		= 0,
	.dev = {
		.dma_mask		= NULL,         /*  not use dma */
		.coherent_dma_mask	= 0xffffffff,
		.platform_data		= &usb0_host_data,
	},
	.num_resources	= ARRAY_SIZE(usb0_host_resources),
	.resource	= usb0_host_resources,
};

196
/* USB1 host/function */
197 198 199 200 201
void usb1_port_power(int port, int power)
{
	gpio_set_value(GPIO_PTB5, power);
}

202
static struct r8a66597_platdata usb1_common_data = {
203 204 205 206
	.on_chip = 1,
	.port_power = usb1_port_power,
};

207
static struct resource usb1_common_resources[] = {
208 209 210 211 212 213 214 215 216 217 218 219
	[0] = {
		.start	= 0xa4d90000,
		.end	= 0xa4d90124 - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 66,
		.end	= 66,
		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
	},
};

220 221
static struct platform_device usb1_common_device = {
	/* .name will be added in arch_setup */
222 223 224 225
	.id		= 1,
	.dev = {
		.dma_mask		= NULL,         /*  not use dma */
		.coherent_dma_mask	= 0xffffffff,
226
		.platform_data		= &usb1_common_data,
227
	},
228 229
	.num_resources	= ARRAY_SIZE(usb1_common_resources),
	.resource	= usb1_common_resources,
230 231
};

232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253
/* LCDC */
static struct sh_mobile_lcdc_info lcdc_info = {
	.ch[0] = {
		.interface_type = RGB18,
		.chan = LCDC_CHAN_MAINLCD,
		.bpp = 16,
		.lcd_cfg = {
			.sync = 0, /* hsync and vsync are active low */
		},
		.lcd_size_cfg = { /* 7.0 inch */
			.width = 152,
			.height = 91,
		},
		.board_cfg = {
		},
	}
};

static struct resource lcdc_resources[] = {
	[0] = {
		.name	= "LCDC",
		.start	= 0xfe940000,
254
		.end	= 0xfe942fff,
255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 106,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device lcdc_device = {
	.name		= "sh_mobile_lcdc_fb",
	.num_resources	= ARRAY_SIZE(lcdc_resources),
	.resource	= lcdc_resources,
	.dev		= {
		.platform_data	= &lcdc_info,
	},
	.archdata = {
		.hwblk_id = HWBLK_LCDC,
	},
};

275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342
/* CEU0 */
static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
	.flags = SH_CEU_FLAG_USE_8BIT_BUS,
};

static struct resource ceu0_resources[] = {
	[0] = {
		.name	= "CEU0",
		.start	= 0xfe910000,
		.end	= 0xfe91009f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start  = 52,
		.flags  = IORESOURCE_IRQ,
	},
	[2] = {
		/* place holder for contiguous memory */
	},
};

static struct platform_device ceu0_device = {
	.name		= "sh_mobile_ceu",
	.id             = 0, /* "ceu0" clock */
	.num_resources	= ARRAY_SIZE(ceu0_resources),
	.resource	= ceu0_resources,
	.dev	= {
		.platform_data	= &sh_mobile_ceu0_info,
	},
	.archdata = {
		.hwblk_id = HWBLK_CEU0,
	},
};

/* CEU1 */
static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
	.flags = SH_CEU_FLAG_USE_8BIT_BUS,
};

static struct resource ceu1_resources[] = {
	[0] = {
		.name	= "CEU1",
		.start	= 0xfe914000,
		.end	= 0xfe91409f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start  = 63,
		.flags  = IORESOURCE_IRQ,
	},
	[2] = {
		/* place holder for contiguous memory */
	},
};

static struct platform_device ceu1_device = {
	.name		= "sh_mobile_ceu",
	.id             = 1, /* "ceu1" clock */
	.num_resources	= ARRAY_SIZE(ceu1_resources),
	.resource	= ceu1_resources,
	.dev	= {
		.platform_data	= &sh_mobile_ceu1_info,
	},
	.archdata = {
		.hwblk_id = HWBLK_CEU1,
	},
};

343
/* I2C device */
344 345 346 347 348 349
static struct i2c_board_info i2c0_devices[] = {
	{
		I2C_BOARD_INFO("da7210", 0x1a),
	},
};

350 351 352 353
static struct i2c_board_info i2c1_devices[] = {
	{
		I2C_BOARD_INFO("r2025sd", 0x32),
	},
354 355 356 357
	{
		I2C_BOARD_INFO("lis3lv02d", 0x1c),
		.irq = 33,
	}
358 359
};

360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399
/* KEYSC */
static struct sh_keysc_info keysc_info = {
	.mode		= SH_KEYSC_MODE_1,
	.scan_timing	= 3,
	.delay		= 50,
	.kycr2_delay	= 100,
	.keycodes	= { KEY_1, 0, 0, 0, 0,
			    KEY_2, 0, 0, 0, 0,
			    KEY_3, 0, 0, 0, 0,
			    KEY_4, 0, 0, 0, 0,
			    KEY_5, 0, 0, 0, 0,
			    KEY_6, 0, 0, 0, 0, },
};

static struct resource keysc_resources[] = {
	[0] = {
		.name	= "KEYSC",
		.start  = 0x044b0000,
		.end    = 0x044b000f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 79,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device keysc_device = {
	.name           = "sh_keysc",
	.id             = 0, /* keysc0 clock */
	.num_resources  = ARRAY_SIZE(keysc_resources),
	.resource       = keysc_resources,
	.dev	= {
		.platform_data	= &keysc_info,
	},
	.archdata = {
		.hwblk_id = HWBLK_KEYSC,
	},
};

400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436
/* TouchScreen */
#define IRQ0 32
static int ts_get_pendown_state(void)
{
	int val = 0;
	gpio_free(GPIO_FN_INTC_IRQ0);
	gpio_request(GPIO_PTZ0, NULL);
	gpio_direction_input(GPIO_PTZ0);

	val = gpio_get_value(GPIO_PTZ0);

	gpio_free(GPIO_PTZ0);
	gpio_request(GPIO_FN_INTC_IRQ0, NULL);

	return val ? 0 : 1;
}

static int ts_init(void)
{
	gpio_request(GPIO_FN_INTC_IRQ0, NULL);
	return 0;
}

struct tsc2007_platform_data tsc2007_info = {
	.model			= 2007,
	.x_plate_ohms		= 180,
	.get_pendown_state	= ts_get_pendown_state,
	.init_platform_hw	= ts_init,
};

static struct i2c_board_info ts_i2c_clients = {
	I2C_BOARD_INFO("tsc2007", 0x48),
	.type		= "tsc2007",
	.platform_data	= &tsc2007_info,
	.irq		= IRQ0,
};

437
#ifdef CONFIG_MFD_SH_MOBILE_SDHI
438
/* SHDI0 */
439 440 441 442 443 444 445 446 447
static void sdhi0_set_pwr(struct platform_device *pdev, int state)
{
	gpio_set_value(GPIO_PTB6, state);
}

static struct sh_mobile_sdhi_info sdhi0_info = {
	.set_pwr = sdhi0_set_pwr,
};

448 449 450 451 452 453 454 455
static struct resource sdhi0_resources[] = {
	[0] = {
		.name	= "SDHI0",
		.start  = 0x04ce0000,
		.end    = 0x04ce01ff,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
456
		.start  = 100,
457 458 459 460 461 462 463 464 465
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device sdhi0_device = {
	.name           = "sh_mobile_sdhi",
	.num_resources  = ARRAY_SIZE(sdhi0_resources),
	.resource       = sdhi0_resources,
	.id             = 0,
466 467 468
	.dev	= {
		.platform_data	= &sdhi0_info,
	},
469 470 471 472 473 474
	.archdata = {
		.hwblk_id = HWBLK_SDHI0,
	},
};

/* SHDI1 */
475 476 477 478 479 480 481 482 483
static void sdhi1_set_pwr(struct platform_device *pdev, int state)
{
	gpio_set_value(GPIO_PTB7, state);
}

static struct sh_mobile_sdhi_info sdhi1_info = {
	.set_pwr = sdhi1_set_pwr,
};

484 485 486 487 488 489 490 491
static struct resource sdhi1_resources[] = {
	[0] = {
		.name	= "SDHI1",
		.start  = 0x04cf0000,
		.end    = 0x04cf01ff,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
492
		.start  = 23,
493 494 495 496 497 498 499 500 501
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device sdhi1_device = {
	.name           = "sh_mobile_sdhi",
	.num_resources  = ARRAY_SIZE(sdhi1_resources),
	.resource       = sdhi1_resources,
	.id             = 1,
502 503 504
	.dev	= {
		.platform_data	= &sdhi1_info,
	},
505 506 507 508 509
	.archdata = {
		.hwblk_id = HWBLK_SDHI1,
	},
};

510 511
#else

512
/* MMC SPI */
513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545
static int mmc_spi_get_ro(struct device *dev)
{
	return gpio_get_value(GPIO_PTY6);
}

static int mmc_spi_get_cd(struct device *dev)
{
	return !gpio_get_value(GPIO_PTY7);
}

static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
{
	gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
}

static struct mmc_spi_platform_data mmc_spi_info = {
	.get_ro = mmc_spi_get_ro,
	.get_cd = mmc_spi_get_cd,
	.caps = MMC_CAP_NEEDS_POLL,
	.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
	.setpower = mmc_spi_setpower,
};

static struct spi_board_info spi_bus[] = {
	{
		.modalias	= "mmc_spi",
		.platform_data	= &mmc_spi_info,
		.max_speed_hz	= 5000000,
		.mode		= SPI_MODE_0,
		.controller_data = (void *) GPIO_PTM4,
	},
};

546
/* MSIOF0 */
547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578
static struct sh_msiof_spi_info msiof0_data = {
	.num_chipselect = 1,
};

static struct resource msiof0_resources[] = {
	[0] = {
		.name	= "MSIOF0",
		.start	= 0xa4c40000,
		.end	= 0xa4c40063,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 84,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device msiof0_device = {
	.name		= "spi_sh_msiof",
	.id		= 0, /* MSIOF0 */
	.dev = {
		.platform_data = &msiof0_data,
	},
	.num_resources	= ARRAY_SIZE(msiof0_resources),
	.resource	= msiof0_resources,
	.archdata = {
		.hwblk_id = HWBLK_MSIOF0,
	},
};

#endif

579
/* I2C Video/Camera */
580 581 582 583
static struct i2c_board_info i2c_camera[] = {
	{
		I2C_BOARD_INFO("tw9910", 0x45),
	},
584 585 586 587 588 589 590 591
	{
		/* 1st camera */
		I2C_BOARD_INFO("mt9t112", 0x3c),
	},
	{
		/* 2nd camera */
		I2C_BOARD_INFO("mt9t112", 0x3c),
	},
592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619
};

/* tw9910 */
static int tw9910_power(struct device *dev, int mode)
{
	int val = mode ? 0 : 1;

	gpio_set_value(GPIO_PTU2, val);
	if (mode)
		mdelay(100);

	return 0;
}

static struct tw9910_video_info tw9910_info = {
	.buswidth	= SOCAM_DATAWIDTH_8,
	.mpout		= TW9910_MPO_FIELD,
};

static struct soc_camera_link tw9910_link = {
	.i2c_adapter_id	= 0,
	.bus_id		= 1,
	.power		= tw9910_power,
	.board_info	= &i2c_camera[0],
	.module_name	= "tw9910",
	.priv		= &tw9910_info,
};

620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665
/* mt9t112 */
static int mt9t112_power1(struct device *dev, int mode)
{
	gpio_set_value(GPIO_PTA3, mode);
	if (mode)
		mdelay(100);

	return 0;
}

static struct mt9t112_camera_info mt9t112_info1 = {
	.flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
};

static struct soc_camera_link mt9t112_link1 = {
	.i2c_adapter_id	= 0,
	.power		= mt9t112_power1,
	.bus_id		= 0,
	.board_info	= &i2c_camera[1],
	.module_name	= "mt9t112",
	.priv		= &mt9t112_info1,
};

static int mt9t112_power2(struct device *dev, int mode)
{
	gpio_set_value(GPIO_PTA4, mode);
	if (mode)
		mdelay(100);

	return 0;
}

static struct mt9t112_camera_info mt9t112_info2 = {
	.flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
};

static struct soc_camera_link mt9t112_link2 = {
	.i2c_adapter_id	= 1,
	.power		= mt9t112_power2,
	.bus_id		= 1,
	.board_info	= &i2c_camera[2],
	.module_name	= "mt9t112",
	.priv		= &mt9t112_info2,
};
666 667 668 669 670 671 672 673 674

static struct platform_device camera_devices[] = {
	{
		.name	= "soc-camera-pdrv",
		.id	= 0,
		.dev	= {
			.platform_data = &tw9910_link,
		},
	},
675 676 677 678 679 680 681 682 683 684 685 686 687 688
	{
		.name	= "soc-camera-pdrv",
		.id	= 1,
		.dev	= {
			.platform_data = &mt9t112_link1,
		},
	},
	{
		.name	= "soc-camera-pdrv",
		.id	= 2,
		.dev	= {
			.platform_data = &mt9t112_link2,
		},
	},
689 690
};

691 692 693 694 695 696 697 698
/* FSI */
/*
 * FSI-B use external clock which came from da7210.
 * So, we should change parent of fsi
 */
#define FCLKBCR		0xa415000c
static void fsimck_init(struct clk *clk)
{
699
	u32 status = __raw_readl(clk->enable_reg);
700 701 702 703 704

	/* use external clock */
	status &= ~0x000000ff;
	status |= 0x00000080;

705
	__raw_writel(status, clk->enable_reg);
706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753
}

static struct clk_ops fsimck_clk_ops = {
	.init = fsimck_init,
};

static struct clk fsimckb_clk = {
	.name		= "fsimckb_clk",
	.id		= -1,
	.ops		= &fsimck_clk_ops,
	.enable_reg	= (void __iomem *)FCLKBCR,
	.rate		= 0, /* unknown */
};

struct sh_fsi_platform_info fsi_info = {
	.portb_flags = SH_FSI_BRS_INV |
		       SH_FSI_OUT_SLAVE_MODE |
		       SH_FSI_IN_SLAVE_MODE |
		       SH_FSI_OFMT(I2S) |
		       SH_FSI_IFMT(I2S),
};

static struct resource fsi_resources[] = {
	[0] = {
		.name	= "FSI",
		.start	= 0xFE3C0000,
		.end	= 0xFE3C021d,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start  = 108,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device fsi_device = {
	.name		= "sh_fsi",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(fsi_resources),
	.resource	= fsi_resources,
	.dev	= {
		.platform_data	= &fsi_info,
	},
	.archdata = {
		.hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
	},
};

754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773
/* IrDA */
static struct resource irda_resources[] = {
	[0] = {
		.name	= "IrDA",
		.start  = 0xA45D0000,
		.end    = 0xA45D0049,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 20,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct platform_device irda_device = {
	.name           = "sh_sir",
	.num_resources  = ARRAY_SIZE(irda_resources),
	.resource       = irda_resources,
};

774 775 776
static struct platform_device *ecovec_devices[] __initdata = {
	&heartbeat_device,
	&nor_flash_device,
777
	&sh_eth_device,
778
	&usb0_host_device,
779
	&usb1_common_device,
780
	&lcdc_device,
781 782
	&ceu0_device,
	&ceu1_device,
783
	&keysc_device,
784
#ifdef CONFIG_MFD_SH_MOBILE_SDHI
785 786
	&sdhi0_device,
	&sdhi1_device,
787 788 789
#else
	&msiof0_device,
#endif
790
	&camera_devices[0],
791 792
	&camera_devices[1],
	&camera_devices[2],
793
	&fsi_device,
794
	&irda_device,
795 796
};

797
#ifdef CONFIG_I2C
798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823
#define EEPROM_ADDR 0x50
static u8 mac_read(struct i2c_adapter *a, u8 command)
{
	struct i2c_msg msg[2];
	u8 buf;
	int ret;

	msg[0].addr  = EEPROM_ADDR;
	msg[0].flags = 0;
	msg[0].len   = 1;
	msg[0].buf   = &command;

	msg[1].addr  = EEPROM_ADDR;
	msg[1].flags = I2C_M_RD;
	msg[1].len   = 1;
	msg[1].buf   = &buf;

	ret = i2c_transfer(a, msg, 2);
	if (ret < 0) {
		printk(KERN_ERR "error %d\n", ret);
		buf = 0xff;
	}

	return buf;
}

824
static void __init sh_eth_init(struct sh_eth_plat_data *pd)
825 826 827 828 829 830 831 832 833 834
{
	struct i2c_adapter *a = i2c_get_adapter(1);
	int i;

	if (!a) {
		pr_err("can not get I2C 1\n");
		return;
	}

	/* read MAC address frome EEPROM */
835 836
	for (i = 0; i < sizeof(pd->mac_addr); i++) {
		pd->mac_addr[i] = mac_read(a, 0x10 + i);
837 838 839
		msleep(10);
	}
}
840 841 842 843 844 845
#else
static void __init sh_eth_init(struct sh_eth_plat_data *pd)
{
	pr_err("unable to read sh_eth MAC address\n");
}
#endif
846

847
#define PORT_HIZA 0xA4050158
848
#define IODRIVEA  0xA405018A
849 850 851 852 853 854

extern char ecovec24_sdram_enter_start;
extern char ecovec24_sdram_enter_end;
extern char ecovec24_sdram_leave_start;
extern char ecovec24_sdram_leave_end;

855
static int __init arch_setup(void)
856
{
857 858
	struct clk *clk;

859
	/* register board specific self-refresh code */
M
Magnus Damm 已提交
860 861
	sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
					SUSP_SH_RSTANDBY,
862 863 864 865 866
					&ecovec24_sdram_enter_start,
					&ecovec24_sdram_enter_end,
					&ecovec24_sdram_leave_start,
					&ecovec24_sdram_leave_end);

867 868 869 870 871
	/* enable STATUS0, STATUS2 and PDSTATUS */
	gpio_request(GPIO_FN_STATUS0, NULL);
	gpio_request(GPIO_FN_STATUS2, NULL);
	gpio_request(GPIO_FN_PDSTATUS, NULL);

872 873 874 875 876 877 878 879 880
	/* enable SCIFA0 */
	gpio_request(GPIO_FN_SCIF0_TXD, NULL);
	gpio_request(GPIO_FN_SCIF0_RXD, NULL);

	/* enable debug LED */
	gpio_request(GPIO_PTG0, NULL);
	gpio_request(GPIO_PTG1, NULL);
	gpio_request(GPIO_PTG2, NULL);
	gpio_request(GPIO_PTG3, NULL);
881 882 883 884
	gpio_direction_output(GPIO_PTG0, 0);
	gpio_direction_output(GPIO_PTG1, 0);
	gpio_direction_output(GPIO_PTG2, 0);
	gpio_direction_output(GPIO_PTG3, 0);
885
	__raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
886

887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903
	/* enable SH-Eth */
	gpio_request(GPIO_PTA1, NULL);
	gpio_direction_output(GPIO_PTA1, 1);
	mdelay(20);

	gpio_request(GPIO_FN_RMII_RXD0,    NULL);
	gpio_request(GPIO_FN_RMII_RXD1,    NULL);
	gpio_request(GPIO_FN_RMII_TXD0,    NULL);
	gpio_request(GPIO_FN_RMII_TXD1,    NULL);
	gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
	gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
	gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
	gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
	gpio_request(GPIO_FN_MDIO,         NULL);
	gpio_request(GPIO_FN_MDC,          NULL);
	gpio_request(GPIO_FN_LNKSTA,       NULL);

904
	/* enable USB */
905 906
	__raw_writew(0x0000, 0xA4D80000);
	__raw_writew(0x0000, 0xA4D90000);
907 908 909 910 911 912
	gpio_request(GPIO_PTB3,  NULL);
	gpio_request(GPIO_PTB4,  NULL);
	gpio_request(GPIO_PTB5,  NULL);
	gpio_direction_input(GPIO_PTB3);
	gpio_direction_output(GPIO_PTB4, 0);
	gpio_direction_output(GPIO_PTB5, 0);
913 914
	__raw_writew(0x0600, 0xa40501d4);
	__raw_writew(0x0600, 0xa4050192);
915

916 917 918 919 920 921 922 923
	if (gpio_get_value(GPIO_PTB3)) {
		printk(KERN_INFO "USB1 function is selected\n");
		usb1_common_device.name = "r8a66597_udc";
	} else {
		printk(KERN_INFO "USB1 host is selected\n");
		usb1_common_device.name = "r8a66597_hcd";
	}

924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954
	/* enable LCDC */
	gpio_request(GPIO_FN_LCDD23,   NULL);
	gpio_request(GPIO_FN_LCDD22,   NULL);
	gpio_request(GPIO_FN_LCDD21,   NULL);
	gpio_request(GPIO_FN_LCDD20,   NULL);
	gpio_request(GPIO_FN_LCDD19,   NULL);
	gpio_request(GPIO_FN_LCDD18,   NULL);
	gpio_request(GPIO_FN_LCDD17,   NULL);
	gpio_request(GPIO_FN_LCDD16,   NULL);
	gpio_request(GPIO_FN_LCDD15,   NULL);
	gpio_request(GPIO_FN_LCDD14,   NULL);
	gpio_request(GPIO_FN_LCDD13,   NULL);
	gpio_request(GPIO_FN_LCDD12,   NULL);
	gpio_request(GPIO_FN_LCDD11,   NULL);
	gpio_request(GPIO_FN_LCDD10,   NULL);
	gpio_request(GPIO_FN_LCDD9,    NULL);
	gpio_request(GPIO_FN_LCDD8,    NULL);
	gpio_request(GPIO_FN_LCDD7,    NULL);
	gpio_request(GPIO_FN_LCDD6,    NULL);
	gpio_request(GPIO_FN_LCDD5,    NULL);
	gpio_request(GPIO_FN_LCDD4,    NULL);
	gpio_request(GPIO_FN_LCDD3,    NULL);
	gpio_request(GPIO_FN_LCDD2,    NULL);
	gpio_request(GPIO_FN_LCDD1,    NULL);
	gpio_request(GPIO_FN_LCDD0,    NULL);
	gpio_request(GPIO_FN_LCDDISP,  NULL);
	gpio_request(GPIO_FN_LCDHSYN,  NULL);
	gpio_request(GPIO_FN_LCDDCK,   NULL);
	gpio_request(GPIO_FN_LCDVSYN,  NULL);
	gpio_request(GPIO_FN_LCDDON,   NULL);
	gpio_request(GPIO_FN_LCDLCLK,  NULL);
955
	__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
956 957 958 959 960 961 962 963 964 965

	gpio_request(GPIO_PTE6, NULL);
	gpio_request(GPIO_PTU1, NULL);
	gpio_request(GPIO_PTR1, NULL);
	gpio_request(GPIO_PTA2, NULL);
	gpio_direction_input(GPIO_PTE6);
	gpio_direction_output(GPIO_PTU1, 0);
	gpio_direction_output(GPIO_PTR1, 0);
	gpio_direction_output(GPIO_PTA2, 0);

966
	/* I/O buffer drive ability is high */
967
	__raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
968

969 970 971
	if (gpio_get_value(GPIO_PTE6)) {
		/* DVI */
		lcdc_info.clock_source			= LCDC_CLK_EXTERNAL;
972
		lcdc_info.ch[0].clock_divider		= 1,
973 974 975 976 977 978 979 980 981 982 983 984 985 986
		lcdc_info.ch[0].lcd_cfg.name		= "DVI";
		lcdc_info.ch[0].lcd_cfg.xres		= 1280;
		lcdc_info.ch[0].lcd_cfg.yres		= 720;
		lcdc_info.ch[0].lcd_cfg.left_margin	= 220;
		lcdc_info.ch[0].lcd_cfg.right_margin	= 110;
		lcdc_info.ch[0].lcd_cfg.hsync_len	= 40;
		lcdc_info.ch[0].lcd_cfg.upper_margin	= 20;
		lcdc_info.ch[0].lcd_cfg.lower_margin	= 5;
		lcdc_info.ch[0].lcd_cfg.vsync_len	= 5;

		gpio_set_value(GPIO_PTA2, 1);
		gpio_set_value(GPIO_PTU1, 1);
	} else {
		/* Panel */
987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009

		lcdc_info.clock_source			= LCDC_CLK_PERIPHERAL;
		lcdc_info.ch[0].clock_divider		= 2,
		lcdc_info.ch[0].lcd_cfg.name		= "Panel";
		lcdc_info.ch[0].lcd_cfg.xres		= 800;
		lcdc_info.ch[0].lcd_cfg.yres		= 480;
		lcdc_info.ch[0].lcd_cfg.left_margin	= 220;
		lcdc_info.ch[0].lcd_cfg.right_margin	= 110;
		lcdc_info.ch[0].lcd_cfg.hsync_len	= 70;
		lcdc_info.ch[0].lcd_cfg.upper_margin	= 20;
		lcdc_info.ch[0].lcd_cfg.lower_margin	= 5;
		lcdc_info.ch[0].lcd_cfg.vsync_len	= 5;

		gpio_set_value(GPIO_PTR1, 1);

		/* FIXME
		 *
		 * LCDDON control is needed for Panel,
		 * but current sh_mobile_lcdc driver doesn't control it.
		 * It is temporary correspondence
		 */
		gpio_request(GPIO_PTF4, NULL);
		gpio_direction_output(GPIO_PTF4, 1);
1010 1011 1012 1013

		/* enable TouchScreen */
		i2c_register_board_info(0, &ts_i2c_clients, 1);
		set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
1014 1015
	}

1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053
	/* enable CEU0 */
	gpio_request(GPIO_FN_VIO0_D15, NULL);
	gpio_request(GPIO_FN_VIO0_D14, NULL);
	gpio_request(GPIO_FN_VIO0_D13, NULL);
	gpio_request(GPIO_FN_VIO0_D12, NULL);
	gpio_request(GPIO_FN_VIO0_D11, NULL);
	gpio_request(GPIO_FN_VIO0_D10, NULL);
	gpio_request(GPIO_FN_VIO0_D9,  NULL);
	gpio_request(GPIO_FN_VIO0_D8,  NULL);
	gpio_request(GPIO_FN_VIO0_D7,  NULL);
	gpio_request(GPIO_FN_VIO0_D6,  NULL);
	gpio_request(GPIO_FN_VIO0_D5,  NULL);
	gpio_request(GPIO_FN_VIO0_D4,  NULL);
	gpio_request(GPIO_FN_VIO0_D3,  NULL);
	gpio_request(GPIO_FN_VIO0_D2,  NULL);
	gpio_request(GPIO_FN_VIO0_D1,  NULL);
	gpio_request(GPIO_FN_VIO0_D0,  NULL);
	gpio_request(GPIO_FN_VIO0_VD,  NULL);
	gpio_request(GPIO_FN_VIO0_CLK, NULL);
	gpio_request(GPIO_FN_VIO0_FLD, NULL);
	gpio_request(GPIO_FN_VIO0_HD,  NULL);
	platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);

	/* enable CEU1 */
	gpio_request(GPIO_FN_VIO1_D7,  NULL);
	gpio_request(GPIO_FN_VIO1_D6,  NULL);
	gpio_request(GPIO_FN_VIO1_D5,  NULL);
	gpio_request(GPIO_FN_VIO1_D4,  NULL);
	gpio_request(GPIO_FN_VIO1_D3,  NULL);
	gpio_request(GPIO_FN_VIO1_D2,  NULL);
	gpio_request(GPIO_FN_VIO1_D1,  NULL);
	gpio_request(GPIO_FN_VIO1_D0,  NULL);
	gpio_request(GPIO_FN_VIO1_FLD, NULL);
	gpio_request(GPIO_FN_VIO1_HD,  NULL);
	gpio_request(GPIO_FN_VIO1_VD,  NULL);
	gpio_request(GPIO_FN_VIO1_CLK, NULL);
	platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);

1054 1055 1056 1057 1058 1059 1060 1061 1062
	/* enable KEYSC */
	gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
	gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
	gpio_request(GPIO_FN_KEYOUT3,     NULL);
	gpio_request(GPIO_FN_KEYOUT2,     NULL);
	gpio_request(GPIO_FN_KEYOUT1,     NULL);
	gpio_request(GPIO_FN_KEYOUT0,     NULL);
	gpio_request(GPIO_FN_KEYIN0,      NULL);

1063 1064 1065 1066 1067 1068 1069 1070 1071 1072
	/* enable user debug switch */
	gpio_request(GPIO_PTR0, NULL);
	gpio_request(GPIO_PTR4, NULL);
	gpio_request(GPIO_PTR5, NULL);
	gpio_request(GPIO_PTR6, NULL);
	gpio_direction_input(GPIO_PTR0);
	gpio_direction_input(GPIO_PTR4);
	gpio_direction_input(GPIO_PTR5);
	gpio_direction_input(GPIO_PTR6);

1073 1074
#ifdef CONFIG_MFD_SH_MOBILE_SDHI
	/* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
1075 1076 1077 1078 1079 1080 1081 1082
	gpio_request(GPIO_FN_SDHI0CD,  NULL);
	gpio_request(GPIO_FN_SDHI0WP,  NULL);
	gpio_request(GPIO_FN_SDHI0CMD, NULL);
	gpio_request(GPIO_FN_SDHI0CLK, NULL);
	gpio_request(GPIO_FN_SDHI0D3,  NULL);
	gpio_request(GPIO_FN_SDHI0D2,  NULL);
	gpio_request(GPIO_FN_SDHI0D1,  NULL);
	gpio_request(GPIO_FN_SDHI0D0,  NULL);
1083 1084
	gpio_request(GPIO_PTB6, NULL);
	gpio_direction_output(GPIO_PTB6, 0);
1085

1086
	/* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1087 1088 1089 1090 1091 1092 1093 1094 1095
	gpio_request(GPIO_FN_SDHI1CD,  NULL);
	gpio_request(GPIO_FN_SDHI1WP,  NULL);
	gpio_request(GPIO_FN_SDHI1CMD, NULL);
	gpio_request(GPIO_FN_SDHI1CLK, NULL);
	gpio_request(GPIO_FN_SDHI1D3,  NULL);
	gpio_request(GPIO_FN_SDHI1D2,  NULL);
	gpio_request(GPIO_FN_SDHI1D1,  NULL);
	gpio_request(GPIO_FN_SDHI1D0,  NULL);
	gpio_request(GPIO_PTB7, NULL);
1096
	gpio_direction_output(GPIO_PTB7, 0);
1097 1098

	/* I/O buffer drive ability is high for SDHI1 */
1099
	__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115
#else
	/* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
	gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
	gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
	gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
	gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
	gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
	gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
	gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
	gpio_request(GPIO_PTY6, NULL); /* write protect */
	gpio_direction_input(GPIO_PTY6);
	gpio_request(GPIO_PTY7, NULL); /* card detect */
	gpio_direction_input(GPIO_PTY7);

	spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
#endif
1116

1117 1118 1119 1120
	/* enable Video */
	gpio_request(GPIO_PTU2, NULL);
	gpio_direction_output(GPIO_PTU2, 1);

1121 1122 1123 1124 1125 1126
	/* enable Camera */
	gpio_request(GPIO_PTA3, NULL);
	gpio_request(GPIO_PTA4, NULL);
	gpio_direction_output(GPIO_PTA3, 0);
	gpio_direction_output(GPIO_PTA4, 0);

1127 1128 1129 1130 1131 1132 1133 1134 1135 1136
	/* enable FSI */
	gpio_request(GPIO_FN_FSIMCKB,    NULL);
	gpio_request(GPIO_FN_FSIIBSD,    NULL);
	gpio_request(GPIO_FN_FSIOBSD,    NULL);
	gpio_request(GPIO_FN_FSIIBBCK,   NULL);
	gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
	gpio_request(GPIO_FN_FSIOBBCK,   NULL);
	gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
	gpio_request(GPIO_FN_CLKAUDIOBO, NULL);

1137 1138 1139 1140 1141
	/* set SPU2 clock to 83.4 MHz */
	clk = clk_get(NULL, "spu_clk");
	clk_set_rate(clk, clk_round_rate(clk, 83333333));
	clk_put(clk);

1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153
	/* change parent of FSI B */
	clk = clk_get(NULL, "fsib_clk");
	clk_register(&fsimckb_clk);
	clk_set_parent(clk, &fsimckb_clk);
	clk_set_rate(clk, 11000);
	clk_set_rate(&fsimckb_clk, 11000);
	clk_put(clk);

	gpio_request(GPIO_PTU0, NULL);
	gpio_direction_output(GPIO_PTU0, 0);
	mdelay(20);

1154 1155 1156 1157
	/* enable motion sensor */
	gpio_request(GPIO_FN_INTC_IRQ1, NULL);
	gpio_direction_input(GPIO_FN_INTC_IRQ1);

1158 1159 1160 1161 1162
	/* set VPU clock to 166 MHz */
	clk = clk_get(NULL, "vpu_clk");
	clk_set_rate(clk, clk_round_rate(clk, 166000000));
	clk_put(clk);

1163 1164 1165 1166 1167 1168
	/* enable IrDA */
	gpio_request(GPIO_FN_IRDA_OUT, NULL);
	gpio_request(GPIO_FN_IRDA_IN,  NULL);
	gpio_request(GPIO_PTU5, NULL);
	gpio_direction_output(GPIO_PTU5, 0);

1169
	/* enable I2C device */
1170 1171 1172
	i2c_register_board_info(0, i2c0_devices,
				ARRAY_SIZE(i2c0_devices));

1173 1174 1175
	i2c_register_board_info(1, i2c1_devices,
				ARRAY_SIZE(i2c1_devices));

1176 1177 1178
	return platform_add_devices(ecovec_devices,
				    ARRAY_SIZE(ecovec_devices));
}
1179 1180 1181 1182
arch_initcall(arch_setup);

static int __init devices_setup(void)
{
1183
	sh_eth_init(&sh_eth_plat);
1184 1185 1186 1187
	return 0;
}
device_initcall(devices_setup);

1188 1189 1190
static struct sh_machine_vector mv_ecovec __initmv = {
	.mv_name	= "R0P7724 (EcoVec)",
};