smp.c 26.3 KB
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/*
 * SMP support for ppc.
 *
 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
 * deal of code from the sparc and intel versions.
 *
 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
 *
 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 */

#undef DEBUG

#include <linux/kernel.h>
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#include <linux/export.h>
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#include <linux/sched/mm.h>
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#include <linux/sched/topology.h>
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#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/cache.h>
#include <linux/err.h>
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#include <linux/device.h>
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#include <linux/cpu.h>
#include <linux/notifier.h>
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#include <linux/topology.h>
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#include <linux/profile.h>
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#include <linux/processor.h>
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#include <asm/ptrace.h>
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#include <linux/atomic.h>
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#include <asm/irq.h>
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#include <asm/hw_irq.h>
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#include <asm/kvm_ppc.h>
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#include <asm/dbell.h>
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#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/prom.h>
#include <asm/smp.h>
#include <asm/time.h>
#include <asm/machdep.h>
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#include <asm/cputhreads.h>
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#include <asm/cputable.h>
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#include <asm/mpic.h>
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#include <asm/vdso_datapage.h>
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#ifdef CONFIG_PPC64
#include <asm/paca.h>
#endif
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#include <asm/vdso.h>
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#include <asm/debug.h>
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#include <asm/kexec.h>
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#include <asm/asm-prototypes.h>
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#include <asm/cpu_has_feature.h>
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#ifdef DEBUG
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#include <asm/udbg.h>
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#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif

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#ifdef CONFIG_HOTPLUG_CPU
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/* State of each CPU during hotplug phases */
static DEFINE_PER_CPU(int, cpu_state) = { 0 };
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#endif

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struct thread_info *secondary_ti;

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DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
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DEFINE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
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DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
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EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
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EXPORT_PER_CPU_SYMBOL(cpu_l2_cache_map);
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EXPORT_PER_CPU_SYMBOL(cpu_core_map);
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/* SMP operations for this machine */
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struct smp_ops_t *smp_ops;

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/* Can't be static due to PowerMac hackery */
volatile unsigned int cpu_callin_map[NR_CPUS];
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int smt_enabled_at_boot = 1;

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/*
 * Returns 1 if the specified cpu should be brought up during boot.
 * Used to inhibit booting threads if they've been disabled or
 * limited on the command line
 */
int smp_generic_cpu_bootable(unsigned int nr)
{
	/* Special case - we inhibit secondary thread startup
	 * during boot if the user requests it.
	 */
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	if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
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		if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
			return 0;
		if (smt_enabled_at_boot
		    && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
			return 0;
	}

	return 1;
}


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#ifdef CONFIG_PPC64
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int smp_generic_kick_cpu(int nr)
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{
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	if (nr < 0 || nr >= nr_cpu_ids)
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		return -EINVAL;
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	/*
	 * The processor is currently spinning, waiting for the
	 * cpu_start field to become non-zero After we set cpu_start,
	 * the processor will continue on to secondary_start
	 */
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	if (!paca_ptrs[nr]->cpu_start) {
		paca_ptrs[nr]->cpu_start = 1;
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		smp_mb();
		return 0;
	}

#ifdef CONFIG_HOTPLUG_CPU
	/*
	 * Ok it's not there, so it might be soft-unplugged, let's
	 * try to bring it back
	 */
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	generic_set_cpu_up(nr);
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	smp_wmb();
	smp_send_reschedule(nr);
#endif /* CONFIG_HOTPLUG_CPU */
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	return 0;
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}
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#endif /* CONFIG_PPC64 */
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static irqreturn_t call_function_action(int irq, void *data)
{
	generic_smp_call_function_interrupt();
	return IRQ_HANDLED;
}

static irqreturn_t reschedule_action(int irq, void *data)
{
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	scheduler_ipi();
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	return IRQ_HANDLED;
}

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static irqreturn_t tick_broadcast_ipi_action(int irq, void *data)
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{
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	tick_broadcast_ipi_handler();
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	return IRQ_HANDLED;
}

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#ifdef CONFIG_NMI_IPI
static irqreturn_t nmi_ipi_action(int irq, void *data)
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{
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	smp_handle_nmi_ipi(get_irq_regs());
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	return IRQ_HANDLED;
}
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#endif
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static irq_handler_t smp_ipi_action[] = {
	[PPC_MSG_CALL_FUNCTION] =  call_function_action,
	[PPC_MSG_RESCHEDULE] = reschedule_action,
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	[PPC_MSG_TICK_BROADCAST] = tick_broadcast_ipi_action,
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#ifdef CONFIG_NMI_IPI
	[PPC_MSG_NMI_IPI] = nmi_ipi_action,
#endif
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};

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/*
 * The NMI IPI is a fallback and not truly non-maskable. It is simpler
 * than going through the call function infrastructure, and strongly
 * serialized, so it is more appropriate for debugging.
 */
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const char *smp_ipi_name[] = {
	[PPC_MSG_CALL_FUNCTION] =  "ipi call function",
	[PPC_MSG_RESCHEDULE] = "ipi reschedule",
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	[PPC_MSG_TICK_BROADCAST] = "ipi tick-broadcast",
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	[PPC_MSG_NMI_IPI] = "nmi ipi",
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};

/* optional function to request ipi, for controllers with >= 4 ipis */
int smp_request_message_ipi(int virq, int msg)
{
	int err;

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	if (msg < 0 || msg > PPC_MSG_NMI_IPI)
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		return -EINVAL;
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#ifndef CONFIG_NMI_IPI
	if (msg == PPC_MSG_NMI_IPI)
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		return 1;
#endif
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	err = request_irq(virq, smp_ipi_action[msg],
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			  IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND,
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			  smp_ipi_name[msg], NULL);
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	WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
		virq, smp_ipi_name[msg], err);

	return err;
}

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#ifdef CONFIG_PPC_SMP_MUXED_IPI
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struct cpu_messages {
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	long messages;			/* current messages */
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};
static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message);

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void smp_muxed_ipi_set_message(int cpu, int msg)
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{
	struct cpu_messages *info = &per_cpu(ipi_message, cpu);
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	char *message = (char *)&info->messages;
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	/*
	 * Order previous accesses before accesses in the IPI handler.
	 */
	smp_mb();
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	message[msg] = 1;
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}

void smp_muxed_ipi_message_pass(int cpu, int msg)
{
	smp_muxed_ipi_set_message(cpu, msg);
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	/*
	 * cause_ipi functions are required to include a full barrier
	 * before doing whatever causes the IPI.
	 */
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	smp_ops->cause_ipi(cpu);
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}

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#ifdef __BIG_ENDIAN__
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#define IPI_MESSAGE(A) (1uL << ((BITS_PER_LONG - 8) - 8 * (A)))
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#else
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#define IPI_MESSAGE(A) (1uL << (8 * (A)))
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#endif

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irqreturn_t smp_ipi_demux(void)
{
	mb();	/* order any irq clear */
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	return smp_ipi_demux_relaxed();
}

/* sync-free variant. Callers should ensure synchronization */
irqreturn_t smp_ipi_demux_relaxed(void)
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{
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	struct cpu_messages *info;
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	unsigned long all;
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	info = this_cpu_ptr(&ipi_message);
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	do {
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		all = xchg(&info->messages, 0);
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#if defined(CONFIG_KVM_XICS) && defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE)
		/*
		 * Must check for PPC_MSG_RM_HOST_ACTION messages
		 * before PPC_MSG_CALL_FUNCTION messages because when
		 * a VM is destroyed, we call kick_all_cpus_sync()
		 * to ensure that any pending PPC_MSG_RM_HOST_ACTION
		 * messages have completed before we free any VCPUs.
		 */
		if (all & IPI_MESSAGE(PPC_MSG_RM_HOST_ACTION))
			kvmppc_xics_ipi_action();
#endif
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		if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNCTION))
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			generic_smp_call_function_interrupt();
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		if (all & IPI_MESSAGE(PPC_MSG_RESCHEDULE))
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			scheduler_ipi();
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		if (all & IPI_MESSAGE(PPC_MSG_TICK_BROADCAST))
			tick_broadcast_ipi_handler();
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#ifdef CONFIG_NMI_IPI
		if (all & IPI_MESSAGE(PPC_MSG_NMI_IPI))
			nmi_ipi_action(0, NULL);
#endif
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	} while (info->messages);

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	return IRQ_HANDLED;
}
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#endif /* CONFIG_PPC_SMP_MUXED_IPI */
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static inline void do_message_pass(int cpu, int msg)
{
	if (smp_ops->message_pass)
		smp_ops->message_pass(cpu, msg);
#ifdef CONFIG_PPC_SMP_MUXED_IPI
	else
		smp_muxed_ipi_message_pass(cpu, msg);
#endif
}

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void smp_send_reschedule(int cpu)
{
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	if (likely(smp_ops))
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		do_message_pass(cpu, PPC_MSG_RESCHEDULE);
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}
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EXPORT_SYMBOL_GPL(smp_send_reschedule);
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void arch_send_call_function_single_ipi(int cpu)
{
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	do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
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}

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void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
	unsigned int cpu;

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	for_each_cpu(cpu, mask)
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		do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
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}

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#ifdef CONFIG_NMI_IPI

/*
 * "NMI IPI" system.
 *
 * NMI IPIs may not be recoverable, so should not be used as ongoing part of
 * a running system. They can be used for crash, debug, halt/reboot, etc.
 *
 * NMI IPIs are globally single threaded. No more than one in progress at
 * any time.
 *
 * The IPI call waits with interrupts disabled until all targets enter the
 * NMI handler, then the call returns.
 *
 * No new NMI can be initiated until targets exit the handler.
 *
 * The IPI call may time out without all targets entering the NMI handler.
 * In that case, there is some logic to recover (and ignore subsequent
 * NMI interrupts that may eventually be raised), but the platform interrupt
 * handler may not be able to distinguish this from other exception causes,
 * which may cause a crash.
 */

static atomic_t __nmi_ipi_lock = ATOMIC_INIT(0);
static struct cpumask nmi_ipi_pending_mask;
static int nmi_ipi_busy_count = 0;
static void (*nmi_ipi_function)(struct pt_regs *) = NULL;

static void nmi_ipi_lock_start(unsigned long *flags)
{
	raw_local_irq_save(*flags);
	hard_irq_disable();
	while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1) {
		raw_local_irq_restore(*flags);
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		spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
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		raw_local_irq_save(*flags);
		hard_irq_disable();
	}
}

static void nmi_ipi_lock(void)
{
	while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1)
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		spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
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}

static void nmi_ipi_unlock(void)
{
	smp_mb();
	WARN_ON(atomic_read(&__nmi_ipi_lock) != 1);
	atomic_set(&__nmi_ipi_lock, 0);
}

static void nmi_ipi_unlock_end(unsigned long *flags)
{
	nmi_ipi_unlock();
	raw_local_irq_restore(*flags);
}

/*
 * Platform NMI handler calls this to ack
 */
int smp_handle_nmi_ipi(struct pt_regs *regs)
{
	void (*fn)(struct pt_regs *);
	unsigned long flags;
	int me = raw_smp_processor_id();
	int ret = 0;

	/*
	 * Unexpected NMIs are possible here because the interrupt may not
	 * be able to distinguish NMI IPIs from other types of NMIs, or
	 * because the caller may have timed out.
	 */
	nmi_ipi_lock_start(&flags);
	if (!nmi_ipi_busy_count)
		goto out;
	if (!cpumask_test_cpu(me, &nmi_ipi_pending_mask))
		goto out;

	fn = nmi_ipi_function;
	if (!fn)
		goto out;

	cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
	nmi_ipi_busy_count++;
	nmi_ipi_unlock();

	ret = 1;

	fn(regs);

	nmi_ipi_lock();
	nmi_ipi_busy_count--;
out:
	nmi_ipi_unlock_end(&flags);

	return ret;
}

static void do_smp_send_nmi_ipi(int cpu)
{
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	if (smp_ops->cause_nmi_ipi && smp_ops->cause_nmi_ipi(cpu))
		return;

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	if (cpu >= 0) {
		do_message_pass(cpu, PPC_MSG_NMI_IPI);
	} else {
		int c;

		for_each_online_cpu(c) {
			if (c == raw_smp_processor_id())
				continue;
			do_message_pass(c, PPC_MSG_NMI_IPI);
		}
	}
}

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void smp_flush_nmi_ipi(u64 delay_us)
{
	unsigned long flags;

	nmi_ipi_lock_start(&flags);
	while (nmi_ipi_busy_count) {
		nmi_ipi_unlock_end(&flags);
		udelay(1);
		if (delay_us) {
			delay_us--;
			if (!delay_us)
				return;
		}
		nmi_ipi_lock_start(&flags);
	}
	nmi_ipi_unlock_end(&flags);
}

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/*
 * - cpu is the target CPU (must not be this CPU), or NMI_IPI_ALL_OTHERS.
 * - fn is the target callback function.
 * - delay_us > 0 is the delay before giving up waiting for targets to
 *   enter the handler, == 0 specifies indefinite delay.
 */
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int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
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{
	unsigned long flags;
	int me = raw_smp_processor_id();
	int ret = 1;

	BUG_ON(cpu == me);
	BUG_ON(cpu < 0 && cpu != NMI_IPI_ALL_OTHERS);

	if (unlikely(!smp_ops))
		return 0;

	/* Take the nmi_ipi_busy count/lock with interrupts hard disabled */
	nmi_ipi_lock_start(&flags);
	while (nmi_ipi_busy_count) {
		nmi_ipi_unlock_end(&flags);
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		spin_until_cond(nmi_ipi_busy_count == 0);
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		nmi_ipi_lock_start(&flags);
	}

	nmi_ipi_function = fn;

	if (cpu < 0) {
		/* ALL_OTHERS */
		cpumask_copy(&nmi_ipi_pending_mask, cpu_online_mask);
		cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
	} else {
		/* cpumask starts clear */
		cpumask_set_cpu(cpu, &nmi_ipi_pending_mask);
	}
	nmi_ipi_busy_count++;
	nmi_ipi_unlock();

	do_smp_send_nmi_ipi(cpu);

	while (!cpumask_empty(&nmi_ipi_pending_mask)) {
		udelay(1);
		if (delay_us) {
			delay_us--;
			if (!delay_us)
				break;
		}
	}

	nmi_ipi_lock();
	if (!cpumask_empty(&nmi_ipi_pending_mask)) {
		/* Could not gather all CPUs */
		ret = 0;
		cpumask_clear(&nmi_ipi_pending_mask);
	}
	nmi_ipi_busy_count--;
	nmi_ipi_unlock_end(&flags);

	return ret;
}
#endif /* CONFIG_NMI_IPI */

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#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
void tick_broadcast(const struct cpumask *mask)
{
	unsigned int cpu;

	for_each_cpu(cpu, mask)
		do_message_pass(cpu, PPC_MSG_TICK_BROADCAST);
}
#endif

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#ifdef CONFIG_DEBUGGER
void debugger_ipi_callback(struct pt_regs *regs)
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{
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	debugger_ipi(regs);
}
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void smp_send_debugger_break(void)
{
	smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, debugger_ipi_callback, 1000000);
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}
#endif

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#ifdef CONFIG_KEXEC_CORE
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void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *))
{
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	int cpu;

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	smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, crash_ipi_callback, 1000000);
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	if (kdump_in_progress() && crash_wake_offline) {
		for_each_present_cpu(cpu) {
			if (cpu_online(cpu))
				continue;
			/*
			 * crash_ipi_callback will wait for
			 * all cpus, including offline CPUs.
			 * We don't care about nmi_ipi_function.
			 * Offline cpus will jump straight into
			 * crash_ipi_callback, we can skip the
			 * entire NMI dance and waiting for
			 * cpus to clear pending mask, etc.
			 */
			do_smp_send_nmi_ipi(cpu);
		}
	}
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}
#endif

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static void stop_this_cpu(void *dummy)
{
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	/* Remove this CPU */
	set_cpu_online(smp_processor_id(), false);

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	hard_irq_disable();
	spin_begin();
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	while (1)
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		spin_cpu_relax();
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}

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#ifdef CONFIG_NMI_IPI
static void nmi_stop_this_cpu(struct pt_regs *regs)
{
	/*
	 * This is a special case because it never returns, so the NMI IPI
	 * handling would never mark it as done, which makes any later
	 * smp_send_nmi_ipi() call spin forever. Mark it done now.
	 */
	nmi_ipi_lock();
	nmi_ipi_busy_count--;
	nmi_ipi_unlock();

	stop_this_cpu(NULL);
}
#endif

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void smp_send_stop(void)
{
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#ifdef CONFIG_NMI_IPI
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	smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, nmi_stop_this_cpu, 1000000);
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#else
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	smp_call_function(stop_this_cpu, NULL, 0);
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#endif
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}

struct thread_info *current_set[NR_CPUS];

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static void smp_store_cpu_info(int id)
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{
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	per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
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#ifdef CONFIG_PPC_FSL_BOOK3E
	per_cpu(next_tlbcam_idx, id)
		= (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
#endif
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}

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/*
 * Relationships between CPUs are maintained in a set of per-cpu cpumasks so
 * rather than just passing around the cpumask we pass around a function that
 * returns the that cpumask for the given CPU.
 */
static void set_cpus_related(int i, int j, struct cpumask *(*get_cpumask)(int))
{
	cpumask_set_cpu(i, get_cpumask(j));
	cpumask_set_cpu(j, get_cpumask(i));
}

#ifdef CONFIG_HOTPLUG_CPU
static void set_cpus_unrelated(int i, int j,
		struct cpumask *(*get_cpumask)(int))
{
	cpumask_clear_cpu(i, get_cpumask(j));
	cpumask_clear_cpu(j, get_cpumask(i));
}
#endif

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void __init smp_prepare_cpus(unsigned int max_cpus)
{
	unsigned int cpu;

	DBG("smp_prepare_cpus\n");

	/* 
	 * setup_cpu may need to be called on the boot cpu. We havent
	 * spun any cpus up but lets be paranoid.
	 */
	BUG_ON(boot_cpuid != smp_processor_id());

	/* Fixup boot cpu */
	smp_store_cpu_info(boot_cpuid);
	cpu_callin_map[boot_cpuid] = 1;

651 652 653
	for_each_possible_cpu(cpu) {
		zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu),
					GFP_KERNEL, cpu_to_node(cpu));
654 655
		zalloc_cpumask_var_node(&per_cpu(cpu_l2_cache_map, cpu),
					GFP_KERNEL, cpu_to_node(cpu));
656 657
		zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu),
					GFP_KERNEL, cpu_to_node(cpu));
658 659 660
		/*
		 * numa_node_id() works after this.
		 */
661 662 663 664 665
		if (cpu_present(cpu)) {
			set_cpu_numa_node(cpu, numa_cpu_lookup_table[cpu]);
			set_cpu_numa_mem(cpu,
				local_memory_node(numa_cpu_lookup_table[cpu]));
		}
666 667
	}

668
	/* Init the cpumasks so the boot CPU is related to itself */
669
	cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
670
	cpumask_set_cpu(boot_cpuid, cpu_l2_cache_mask(boot_cpuid));
671 672
	cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));

673 674
	if (smp_ops && smp_ops->probe)
		smp_ops->probe();
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}

677
void smp_prepare_boot_cpu(void)
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{
	BUG_ON(smp_processor_id() != boot_cpuid);
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#ifdef CONFIG_PPC64
681
	paca_ptrs[boot_cpuid]->__current = current;
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#endif
683
	set_numa_node(numa_cpu_lookup_table[boot_cpuid]);
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	current_set[boot_cpuid] = task_thread_info(current);
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}

#ifdef CONFIG_HOTPLUG_CPU

int generic_cpu_disable(void)
{
	unsigned int cpu = smp_processor_id();

	if (cpu == boot_cpuid)
		return -EBUSY;

696
	set_cpu_online(cpu, false);
697
#ifdef CONFIG_PPC64
698
	vdso_data->processorCount--;
699
#endif
700 701 702
	/* Update affinity of all IRQs previously aimed at this CPU */
	irq_migrate_all_off_this_cpu();

703 704 705 706 707 708 709 710
	/*
	 * Depending on the details of the interrupt controller, it's possible
	 * that one of the interrupts we just migrated away from this CPU is
	 * actually already pending on this CPU. If we leave it in that state
	 * the interrupt will never be EOI'ed, and will never fire again. So
	 * temporarily enable interrupts here, to allow any pending interrupt to
	 * be received (and EOI'ed), before we take this CPU offline.
	 */
711 712 713 714
	local_irq_enable();
	mdelay(1);
	local_irq_disable();

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	return 0;
}

void generic_cpu_die(unsigned int cpu)
{
	int i;

	for (i = 0; i < 100; i++) {
723
		smp_rmb();
724
		if (is_cpu_dead(cpu))
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			return;
		msleep(100);
	}
	printk(KERN_ERR "CPU%d didn't die...\n", cpu);
}

731 732 733 734
void generic_set_cpu_dead(unsigned int cpu)
{
	per_cpu(cpu_state, cpu) = CPU_DEAD;
}
735

736 737 738 739 740 741 742 743 744 745
/*
 * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise
 * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(),
 * which makes the delay in generic_cpu_die() not happen.
 */
void generic_set_cpu_up(unsigned int cpu)
{
	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
}

746 747 748 749
int generic_check_cpu_restart(unsigned int cpu)
{
	return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE;
}
750

751 752 753 754 755
int is_cpu_dead(unsigned int cpu)
{
	return per_cpu(cpu_state, cpu) == CPU_DEAD;
}

756
static bool secondaries_inhibited(void)
757
{
758
	return kvm_hv_mode_active();
759 760 761 762 763 764
}

#else /* HOTPLUG_CPU */

#define secondaries_inhibited()		0

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#endif

767
static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle)
768
{
769
	struct thread_info *ti = task_thread_info(idle);
770 771

#ifdef CONFIG_PPC64
772 773
	paca_ptrs[cpu]->__current = idle;
	paca_ptrs[cpu]->kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD;
774 775
#endif
	ti->cpu = cpu;
776
	secondary_ti = current_set[cpu] = ti;
777 778
}

779
int __cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
781
	int rc, c;
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783 784 785 786
	/*
	 * Don't allow secondary threads to come online if inhibited
	 */
	if (threads_per_core > 1 && secondaries_inhibited() &&
787
	    cpu_thread_in_subcore(cpu))
788 789
		return -EBUSY;

790 791
	if (smp_ops == NULL ||
	    (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu)))
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		return -EINVAL;

794
	cpu_idle_thread_init(cpu, tidle);
795

796 797 798 799 800 801 802 803 804 805
	/*
	 * The platform might need to allocate resources prior to bringing
	 * up the CPU
	 */
	if (smp_ops->prepare_cpu) {
		rc = smp_ops->prepare_cpu(cpu);
		if (rc)
			return rc;
	}

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	/* Make sure callin-map entry is 0 (can be leftover a CPU
	 * hotplug
	 */
	cpu_callin_map[cpu] = 0;

	/* The information for processor bringup must
	 * be written out to main store before we release
	 * the processor.
	 */
815
	smp_mb();
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	/* wake up cpus */
	DBG("smp: kicking cpu %d\n", cpu);
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	rc = smp_ops->kick_cpu(cpu);
	if (rc) {
		pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc);
		return rc;
	}
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	/*
	 * wait to see if the cpu made a callin (is actually up).
	 * use this value that I found through experimentation.
	 * -- Cort
	 */
	if (system_state < SYSTEM_RUNNING)
831
		for (c = 50000; c && !cpu_callin_map[cpu]; c--)
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			udelay(100);
#ifdef CONFIG_HOTPLUG_CPU
	else
		/*
		 * CPUs can take much longer to come up in the
		 * hotplug case.  Wait five seconds.
		 */
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		for (c = 5000; c && !cpu_callin_map[cpu]; c--)
			msleep(1);
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#endif

	if (!cpu_callin_map[cpu]) {
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		printk(KERN_ERR "Processor %u is stuck.\n", cpu);
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		return -ENOENT;
	}

848
	DBG("Processor %u found.\n", cpu);
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	if (smp_ops->give_timebase)
		smp_ops->give_timebase();

853
	/* Wait until cpu puts itself in the online & active maps */
854
	spin_until_cond(cpu_online(cpu));
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	return 0;
}

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/* Return the value of the reg property corresponding to the given
 * logical cpu.
 */
int cpu_to_core_id(int cpu)
{
	struct device_node *np;
865
	const __be32 *reg;
866 867 868 869 870 871 872 873 874 875
	int id = -1;

	np = of_get_cpu_node(cpu, NULL);
	if (!np)
		goto out;

	reg = of_get_property(np, "reg", NULL);
	if (!reg)
		goto out;

876
	id = be32_to_cpup(reg);
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out:
	of_node_put(np);
	return id;
}
881
EXPORT_SYMBOL_GPL(cpu_to_core_id);
882

883 884 885 886 887 888 889 890 891 892 893 894 895
/* Helper routines for cpu to core mapping */
int cpu_core_index_of_thread(int cpu)
{
	return cpu >> threads_shift;
}
EXPORT_SYMBOL_GPL(cpu_core_index_of_thread);

int cpu_first_thread_of_core(int core)
{
	return core << threads_shift;
}
EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);

896
/* Must be called when no change can occur to cpu_present_mask,
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 * i.e. during cpu online or offline.
 */
static struct device_node *cpu_to_l2cache(int cpu)
{
	struct device_node *np;
902
	struct device_node *cache;
903 904 905 906 907 908 909 910

	if (!cpu_present(cpu))
		return NULL;

	np = of_get_cpu_node(cpu, NULL);
	if (np == NULL)
		return NULL;

911 912
	cache = of_find_next_cache_node(np);

913 914
	of_node_put(np);

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	return cache;
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}
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static bool update_mask_by_l2(int cpu, struct cpumask *(*mask_fn)(int))
919
{
920
	struct device_node *l2_cache, *np;
921
	int i;
922

923
	l2_cache = cpu_to_l2cache(cpu);
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	if (!l2_cache)
		return false;

	for_each_cpu(i, cpu_online_mask) {
		/*
		 * when updating the marks the current CPU has not been marked
		 * online, but we need to update the cache masks
		 */
932
		np = cpu_to_l2cache(i);
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		if (!np)
			continue;
935 936 937 938

		if (np == l2_cache)
			set_cpus_related(cpu, i, mask_fn);

939 940 941
		of_node_put(np);
	}
	of_node_put(l2_cache);
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	return true;
}

#ifdef CONFIG_HOTPLUG_CPU
static void remove_cpu_from_masks(int cpu)
{
	int i;

	/* NB: cpu_core_mask is a superset of the others */
	for_each_cpu(i, cpu_core_mask(cpu)) {
		set_cpus_unrelated(cpu, i, cpu_core_mask);
954
		set_cpus_unrelated(cpu, i, cpu_l2_cache_mask);
955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976
		set_cpus_unrelated(cpu, i, cpu_sibling_mask);
	}
}
#endif

static void add_cpu_to_masks(int cpu)
{
	int first_thread = cpu_first_thread_sibling(cpu);
	int chipid = cpu_to_chip_id(cpu);
	int i;

	/*
	 * This CPU will not be in the online mask yet so we need to manually
	 * add it to it's own thread sibling mask.
	 */
	cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));

	for (i = first_thread; i < first_thread + threads_per_core; i++)
		if (cpu_online(i))
			set_cpus_related(i, cpu, cpu_sibling_mask);

	/*
977 978
	 * Copy the thread sibling mask into the cache sibling mask
	 * and mark any CPUs that share an L2 with this CPU.
979 980
	 */
	for_each_cpu(i, cpu_sibling_mask(cpu))
981 982 983 984 985 986 987 988
		set_cpus_related(cpu, i, cpu_l2_cache_mask);
	update_mask_by_l2(cpu, cpu_l2_cache_mask);

	/*
	 * Copy the cache sibling mask into core sibling mask and mark
	 * any CPUs on the same chip as this CPU.
	 */
	for_each_cpu(i, cpu_l2_cache_mask(cpu))
989 990
		set_cpus_related(cpu, i, cpu_core_mask);

991
	if (chipid == -1)
992 993 994 995 996
		return;

	for_each_cpu(i, cpu_online_mask)
		if (cpu_to_chip_id(i) == chipid)
			set_cpus_related(cpu, i, cpu_core_mask);
997 998
}

999 1000
static bool shared_caches;

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/* Activate a secondary processor. */
1002
void start_secondary(void *unused)
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{
	unsigned int cpu = smp_processor_id();

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	mmgrab(&init_mm);
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	current->active_mm = &init_mm;

	smp_store_cpu_info(cpu);
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	set_dec(tb_ticks_per_jiffy);
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	preempt_disable();
1012
	cpu_callin_map[cpu] = 1;
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1014 1015
	if (smp_ops->setup_cpu)
		smp_ops->setup_cpu(cpu);
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	if (smp_ops->take_timebase)
		smp_ops->take_timebase();

1019 1020
	secondary_cpu_time_init();

1021 1022 1023
#ifdef CONFIG_PPC64
	if (system_state == SYSTEM_RUNNING)
		vdso_data->processorCount++;
1024 1025

	vdso_getcpu_init();
1026
#endif
1027 1028
	/* Update topology CPU masks */
	add_cpu_to_masks(cpu);
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1030 1031 1032 1033 1034 1035 1036
	/*
	 * Check for any shared caches. Note that this must be done on a
	 * per-core basis because one core in the pair might be disabled.
	 */
	if (!cpumask_equal(cpu_l2_cache_mask(cpu), cpu_sibling_mask(cpu)))
		shared_caches = true;

1037 1038 1039
	set_numa_node(numa_cpu_lookup_table[cpu]);
	set_numa_mem(local_memory_node(numa_cpu_lookup_table[cpu]));

1040 1041 1042 1043
	smp_wmb();
	notify_cpu_starting(cpu);
	set_cpu_online(cpu, true);

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	local_irq_enable();

1046
	cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
1047 1048

	BUG();
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}

int setup_profiling_timer(unsigned int multiplier)
{
	return 0;
}

1056 1057
#ifdef CONFIG_SCHED_SMT
/* cpumask of CPUs with asymetric SMT dependancy */
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static int powerpc_smt_flags(void)
1059
{
1060
	int flags = SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES;
1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077

	if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
		printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
		flags |= SD_ASYM_PACKING;
	}
	return flags;
}
#endif

static struct sched_domain_topology_level powerpc_topology[] = {
#ifdef CONFIG_SCHED_SMT
	{ cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
#endif
	{ cpu_cpu_mask, SD_INIT_NAME(DIE) },
	{ NULL, },
};

1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106
/*
 * P9 has a slightly odd architecture where pairs of cores share an L2 cache.
 * This topology makes it *much* cheaper to migrate tasks between adjacent cores
 * since the migrated task remains cache hot. We want to take advantage of this
 * at the scheduler level so an extra topology level is required.
 */
static int powerpc_shared_cache_flags(void)
{
	return SD_SHARE_PKG_RESOURCES;
}

/*
 * We can't just pass cpu_l2_cache_mask() directly because
 * returns a non-const pointer and the compiler barfs on that.
 */
static const struct cpumask *shared_cache_mask(int cpu)
{
	return cpu_l2_cache_mask(cpu);
}

static struct sched_domain_topology_level power9_topology[] = {
#ifdef CONFIG_SCHED_SMT
	{ cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
#endif
	{ shared_cache_mask, powerpc_shared_cache_flags, SD_INIT_NAME(CACHE) },
	{ cpu_cpu_mask, SD_INIT_NAME(DIE) },
	{ NULL, },
};

1107 1108 1109
void __init smp_cpus_done(unsigned int max_cpus)
{
	/*
1110
	 * We are running pinned to the boot CPU, see rest_init().
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	 */
1112
	if (smp_ops && smp_ops->setup_cpu)
1113
		smp_ops->setup_cpu(boot_cpuid);
1114

1115 1116 1117
	if (smp_ops && smp_ops->bringup_done)
		smp_ops->bringup_done();

1118
	dump_numa_cpu_topology();
1119

1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130
	/*
	 * If any CPU detects that it's sharing a cache with another CPU then
	 * use the deeper topology that is aware of this sharing.
	 */
	if (shared_caches) {
		pr_info("Using shared cache scheduler topology\n");
		set_sched_topology(power9_topology);
	} else {
		pr_info("Using standard scheduler topology\n");
		set_sched_topology(powerpc_topology);
	}
1131 1132
}

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#ifdef CONFIG_HOTPLUG_CPU
int __cpu_disable(void)
{
1136 1137
	int cpu = smp_processor_id();
	int err;
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1139 1140 1141 1142 1143 1144 1145 1146
	if (!smp_ops->cpu_disable)
		return -ENOSYS;

	err = smp_ops->cpu_disable();
	if (err)
		return err;

	/* Update sibling maps */
1147
	remove_cpu_from_masks(cpu);
1148 1149

	return 0;
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}

void __cpu_die(unsigned int cpu)
{
	if (smp_ops->cpu_die)
		smp_ops->cpu_die(cpu);
}
1157

1158 1159 1160 1161
void cpu_die(void)
{
	if (ppc_md.cpu_die)
		ppc_md.cpu_die();
1162 1163 1164

	/* If we return, we re-enter start_secondary */
	start_secondary_resume();
1165
}
1166

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#endif