omapdss.h 25.0 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
/*
 * Copyright (C) 2008 Nokia Corporation
 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

18 19
#ifndef __OMAP_OMAPDSS_H
#define __OMAP_OMAPDSS_H
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

#include <linux/list.h>
#include <linux/kobject.h>
#include <linux/device.h>

#define DISPC_IRQ_FRAMEDONE		(1 << 0)
#define DISPC_IRQ_VSYNC			(1 << 1)
#define DISPC_IRQ_EVSYNC_EVEN		(1 << 2)
#define DISPC_IRQ_EVSYNC_ODD		(1 << 3)
#define DISPC_IRQ_ACBIAS_COUNT_STAT	(1 << 4)
#define DISPC_IRQ_PROG_LINE_NUM		(1 << 5)
#define DISPC_IRQ_GFX_FIFO_UNDERFLOW	(1 << 6)
#define DISPC_IRQ_GFX_END_WIN		(1 << 7)
#define DISPC_IRQ_PAL_GAMMA_MASK	(1 << 8)
#define DISPC_IRQ_OCP_ERR		(1 << 9)
#define DISPC_IRQ_VID1_FIFO_UNDERFLOW	(1 << 10)
#define DISPC_IRQ_VID1_END_WIN		(1 << 11)
#define DISPC_IRQ_VID2_FIFO_UNDERFLOW	(1 << 12)
#define DISPC_IRQ_VID2_END_WIN		(1 << 13)
#define DISPC_IRQ_SYNC_LOST		(1 << 14)
#define DISPC_IRQ_SYNC_LOST_DIGIT	(1 << 15)
#define DISPC_IRQ_WAKEUP		(1 << 16)
42 43
#define DISPC_IRQ_SYNC_LOST2		(1 << 17)
#define DISPC_IRQ_VSYNC2		(1 << 18)
44 45
#define DISPC_IRQ_VID3_END_WIN		(1 << 19)
#define DISPC_IRQ_VID3_FIFO_UNDERFLOW	(1 << 20)
46 47
#define DISPC_IRQ_ACBIAS_COUNT_STAT2	(1 << 21)
#define DISPC_IRQ_FRAMEDONE2		(1 << 22)
48 49 50
#define DISPC_IRQ_FRAMEDONEWB		(1 << 23)
#define DISPC_IRQ_FRAMEDONETV		(1 << 24)
#define DISPC_IRQ_WBBUFFEROVERFLOW	(1 << 25)
51 52 53 54
#define DISPC_IRQ_SYNC_LOST3		(1 << 27)
#define DISPC_IRQ_VSYNC3		(1 << 28)
#define DISPC_IRQ_ACBIAS_COUNT_STAT3	(1 << 29)
#define DISPC_IRQ_FRAMEDONE3		(1 << 30)
55 56 57

struct omap_dss_device;
struct omap_overlay_manager;
58
struct dss_lcd_mgr_config;
59 60
struct snd_aes_iec958;
struct snd_cea_861_aud_if;
61 62 63 64 65 66 67 68

enum omap_display_type {
	OMAP_DISPLAY_TYPE_NONE		= 0,
	OMAP_DISPLAY_TYPE_DPI		= 1 << 0,
	OMAP_DISPLAY_TYPE_DBI		= 1 << 1,
	OMAP_DISPLAY_TYPE_SDI		= 1 << 2,
	OMAP_DISPLAY_TYPE_DSI		= 1 << 3,
	OMAP_DISPLAY_TYPE_VENC		= 1 << 4,
69
	OMAP_DISPLAY_TYPE_HDMI		= 1 << 5,
70 71 72 73 74
};

enum omap_plane {
	OMAP_DSS_GFX	= 0,
	OMAP_DSS_VIDEO1	= 1,
75 76
	OMAP_DSS_VIDEO2	= 2,
	OMAP_DSS_VIDEO3	= 3,
77
	OMAP_DSS_WB	= 4,
78 79 80 81 82
};

enum omap_channel {
	OMAP_DSS_CHANNEL_LCD	= 0,
	OMAP_DSS_CHANNEL_DIGIT	= 1,
83
	OMAP_DSS_CHANNEL_LCD2	= 2,
84
	OMAP_DSS_CHANNEL_LCD3	= 3,
85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101
};

enum omap_color_mode {
	OMAP_DSS_COLOR_CLUT1	= 1 << 0,  /* BITMAP 1 */
	OMAP_DSS_COLOR_CLUT2	= 1 << 1,  /* BITMAP 2 */
	OMAP_DSS_COLOR_CLUT4	= 1 << 2,  /* BITMAP 4 */
	OMAP_DSS_COLOR_CLUT8	= 1 << 3,  /* BITMAP 8 */
	OMAP_DSS_COLOR_RGB12U	= 1 << 4,  /* RGB12, 16-bit container */
	OMAP_DSS_COLOR_ARGB16	= 1 << 5,  /* ARGB16 */
	OMAP_DSS_COLOR_RGB16	= 1 << 6,  /* RGB16 */
	OMAP_DSS_COLOR_RGB24U	= 1 << 7,  /* RGB24, 32-bit container */
	OMAP_DSS_COLOR_RGB24P	= 1 << 8,  /* RGB24, 24-bit container */
	OMAP_DSS_COLOR_YUV2	= 1 << 9,  /* YUV2 4:2:2 co-sited */
	OMAP_DSS_COLOR_UYVY	= 1 << 10, /* UYVY 4:2:2 co-sited */
	OMAP_DSS_COLOR_ARGB32	= 1 << 11, /* ARGB32 */
	OMAP_DSS_COLOR_RGBA32	= 1 << 12, /* RGBA32 */
	OMAP_DSS_COLOR_RGBX32	= 1 << 13, /* RGBx32 */
102 103 104 105 106
	OMAP_DSS_COLOR_NV12		= 1 << 14, /* NV12 format: YUV 4:2:0 */
	OMAP_DSS_COLOR_RGBA16		= 1 << 15, /* RGBA16 - 4444 */
	OMAP_DSS_COLOR_RGBX16		= 1 << 16, /* RGBx16 - 4444 */
	OMAP_DSS_COLOR_ARGB16_1555	= 1 << 17, /* ARGB16 - 1555 */
	OMAP_DSS_COLOR_XRGB16_1555	= 1 << 18, /* xRGB16 - 1555 */
107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125
};

enum omap_dss_load_mode {
	OMAP_DSS_LOAD_CLUT_AND_FRAME	= 0,
	OMAP_DSS_LOAD_CLUT_ONLY		= 1,
	OMAP_DSS_LOAD_FRAME_ONLY	= 2,
	OMAP_DSS_LOAD_CLUT_ONCE_FRAME	= 3,
};

enum omap_dss_trans_key_type {
	OMAP_DSS_COLOR_KEY_GFX_DST = 0,
	OMAP_DSS_COLOR_KEY_VID_SRC = 1,
};

enum omap_rfbi_te_mode {
	OMAP_DSS_RFBI_TE_MODE_1 = 1,
	OMAP_DSS_RFBI_TE_MODE_2 = 2,
};

126 127 128 129 130 131 132 133 134 135 136
enum omap_dss_signal_level {
	OMAPDSS_SIG_ACTIVE_HIGH	= 0,
	OMAPDSS_SIG_ACTIVE_LOW	= 1,
};

enum omap_dss_signal_edge {
	OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
	OMAPDSS_DRIVE_SIG_RISING_EDGE,
	OMAPDSS_DRIVE_SIG_FALLING_EDGE,
};

137 138 139 140 141
enum omap_dss_venc_type {
	OMAP_DSS_VENC_TYPE_COMPOSITE,
	OMAP_DSS_VENC_TYPE_SVIDEO,
};

142 143 144 145 146 147 148
enum omap_dss_dsi_pixel_format {
	OMAP_DSS_DSI_FMT_RGB888,
	OMAP_DSS_DSI_FMT_RGB666,
	OMAP_DSS_DSI_FMT_RGB666_PACKED,
	OMAP_DSS_DSI_FMT_RGB565,
};

149 150 151 152 153
enum omap_dss_dsi_mode {
	OMAP_DSS_DSI_CMD_MODE = 0,
	OMAP_DSS_DSI_VIDEO_MODE,
};

154 155 156 157 158 159 160 161 162 163
enum omap_display_caps {
	OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE	= 1 << 0,
	OMAP_DSS_DISPLAY_CAP_TEAR_ELIM		= 1 << 1,
};

enum omap_dss_display_state {
	OMAP_DSS_DISPLAY_DISABLED = 0,
	OMAP_DSS_DISPLAY_ACTIVE,
};

164 165 166 167 168 169 170
enum omap_dss_audio_state {
	OMAP_DSS_AUDIO_DISABLED = 0,
	OMAP_DSS_AUDIO_ENABLED,
	OMAP_DSS_AUDIO_CONFIGURED,
	OMAP_DSS_AUDIO_PLAYING,
};

171
enum omap_dss_rotation_type {
172 173 174
	OMAP_DSS_ROT_DMA	= 1 << 0,
	OMAP_DSS_ROT_VRFB	= 1 << 1,
	OMAP_DSS_ROT_TILER	= 1 << 2,
175 176 177 178 179 180 181 182 183 184 185 186
};

/* clockwise rotation angle */
enum omap_dss_rotation_angle {
	OMAP_DSS_ROT_0   = 0,
	OMAP_DSS_ROT_90  = 1,
	OMAP_DSS_ROT_180 = 2,
	OMAP_DSS_ROT_270 = 3,
};

enum omap_overlay_caps {
	OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
187 188
	OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
	OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
189
	OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
190 191
	OMAP_DSS_OVL_CAP_POS = 1 << 4,
	OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
192 193 194
};

enum omap_overlay_manager_caps {
195
	OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
196 197
};

198 199 200 201 202 203 204
enum omap_dss_clk_source {
	OMAP_DSS_CLK_SRC_FCK = 0,		/* OMAP2/3: DSS1_ALWON_FCLK
						 * OMAP4: DSS_FCLK */
	OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,	/* OMAP3: DSI1_PLL_FCLK
						 * OMAP4: PLL1_CLK1 */
	OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI,	/* OMAP3: DSI2_PLL_FCLK
						 * OMAP4: PLL1_CLK2 */
205 206
	OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,	/* OMAP4: PLL2_CLK1 */
	OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,	/* OMAP4: PLL2_CLK2 */
207 208
};

209 210 211 212
enum omap_hdmi_flags {
	OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
};

213 214 215 216 217 218 219 220 221 222
enum omap_dss_output_id {
	OMAP_DSS_OUTPUT_DPI	= 1 << 0,
	OMAP_DSS_OUTPUT_DBI	= 1 << 1,
	OMAP_DSS_OUTPUT_SDI	= 1 << 2,
	OMAP_DSS_OUTPUT_DSI1	= 1 << 3,
	OMAP_DSS_OUTPUT_DSI2	= 1 << 4,
	OMAP_DSS_OUTPUT_VENC	= 1 << 5,
	OMAP_DSS_OUTPUT_HDMI	= 1 << 6,
};

223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253
/* RFBI */

struct rfbi_timings {
	int cs_on_time;
	int cs_off_time;
	int we_on_time;
	int we_off_time;
	int re_on_time;
	int re_off_time;
	int we_cycle_time;
	int re_cycle_time;
	int cs_pulse_width;
	int access_time;

	int clk_div;

	u32 tim[5];             /* set by rfbi_convert_timings() */

	int converted;
};

void omap_rfbi_write_command(const void *buf, u32 len);
void omap_rfbi_read_data(void *buf, u32 len);
void omap_rfbi_write_data(const void *buf, u32 len);
void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
		u16 x, u16 y,
		u16 w, u16 h);
int omap_rfbi_enable_te(bool enable, unsigned line);
int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
			     unsigned hs_pulse_time, unsigned vs_pulse_time,
			     int hs_pol_inv, int vs_pol_inv, int extif_div);
254 255
void rfbi_bus_lock(void);
void rfbi_bus_unlock(void);
256 257

/* DSI */
258

259
struct omap_dss_dsi_videomode_timings {
260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283
	/* DSI video mode blanking data */
	/* Unit: byte clock cycles */
	u16 hsa;
	u16 hfp;
	u16 hbp;
	/* Unit: line clocks */
	u16 vsa;
	u16 vfp;
	u16 vbp;

	/* DSI blanking modes */
	int blanking_mode;
	int hsa_blanking_mode;
	int hbp_blanking_mode;
	int hfp_blanking_mode;

	/* Video port sync events */
	bool vp_vsync_end;
	bool vp_hsync_end;

	bool ddr_clk_always_on;
	int window_sync;
};

284 285 286 287
void dsi_bus_lock(struct omap_dss_device *dssdev);
void dsi_bus_unlock(struct omap_dss_device *dssdev);
int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
		int len);
288 289 290 291
int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data,
		int len);
int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd);
int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel);
292 293
int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
		u8 param);
294 295 296 297
int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel,
		u8 param);
int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel,
		u8 param1, u8 param2);
298 299
int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
		u8 *data, int len);
300 301
int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel,
		u8 *data, int len);
302 303
int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
		u8 *buf, int buflen);
304 305 306 307 308 309
int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf,
		int buflen);
int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param,
		u8 *buf, int buflen);
int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel,
		u8 param1, u8 param2, u8 *buf, int buflen);
310 311 312 313
int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
		u16 len);
int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
314 315
int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel);
void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel);
316

T
Tomi Valkeinen 已提交
317 318 319 320 321 322 323 324 325 326 327 328 329
enum omapdss_version {
	OMAPDSS_VER_UNKNOWN = 0,
	OMAPDSS_VER_OMAP24xx,
	OMAPDSS_VER_OMAP34xx_ES1,	/* OMAP3430 ES1.0, 2.0 */
	OMAPDSS_VER_OMAP34xx_ES3,	/* OMAP3430 ES3.0+ */
	OMAPDSS_VER_OMAP3630,
	OMAPDSS_VER_AM35xx,
	OMAPDSS_VER_OMAP4430_ES1,	/* OMAP4430 ES1.0 */
	OMAPDSS_VER_OMAP4430_ES2,	/* OMAP4430 ES2.0, 2.1, 2.2 */
	OMAPDSS_VER_OMAP4,		/* All other OMAP4s */
	OMAPDSS_VER_OMAP5,
};

330 331
/* Board specific data */
struct omap_dss_board_info {
332
	int (*get_context_loss_count)(struct device *dev);
333 334 335
	int num_devices;
	struct omap_dss_device **devices;
	struct omap_dss_device *default_device;
336 337
	int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
	void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
338
	int (*set_min_bus_tput)(struct device *dev, unsigned long r);
T
Tomi Valkeinen 已提交
339
	enum omapdss_version version;
340 341
};

342 343
/* Init with the board info */
extern int omap_display_init(struct omap_dss_board_info *board_data);
344
/* HDMI mux init*/
345
extern int omap_hdmi_init(enum omap_hdmi_flags flags);
346

347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365
struct omap_video_timings {
	/* Unit: pixels */
	u16 x_res;
	/* Unit: pixels */
	u16 y_res;
	/* Unit: KHz */
	u32 pixel_clock;
	/* Unit: pixel clocks */
	u16 hsw;	/* Horizontal synchronization pulse width */
	/* Unit: pixel clocks */
	u16 hfp;	/* Horizontal front porch */
	/* Unit: pixel clocks */
	u16 hbp;	/* Horizontal back porch */
	/* Unit: line clocks */
	u16 vsw;	/* Vertical synchronization pulse width */
	/* Unit: line clocks */
	u16 vfp;	/* Vertical front porch */
	/* Unit: line clocks */
	u16 vbp;	/* Vertical back porch */
366 367 368 369 370

	/* Vsync logic level */
	enum omap_dss_signal_level vsync_level;
	/* Hsync logic level */
	enum omap_dss_signal_level hsync_level;
371 372
	/* Interlaced or Progressive timings */
	bool interlace;
373 374 375 376 377 378
	/* Pixel clock edge to drive LCD data */
	enum omap_dss_signal_edge data_pclk_edge;
	/* Data enable logic level */
	enum omap_dss_signal_level de_level;
	/* Pixel clock edges to drive HSYNC and VSYNC signals */
	enum omap_dss_signal_edge sync_pclk_edge;
379 380 381 382 383 384 385
};

#ifdef CONFIG_OMAP2_DSS_VENC
/* Hardcoded timings for tv modes. Venc only uses these to
 * identify the mode, and does not actually use the configs
 * itself. However, the configs should be something that
 * a normal monitor can also show */
386 387
extern const struct omap_video_timings omap_dss_pal_timings;
extern const struct omap_video_timings omap_dss_ntsc_timings;
388 389
#endif

390 391 392 393 394 395
struct omap_dss_cpr_coefs {
	s16 rr, rg, rb;
	s16 gr, gg, gb;
	s16 br, bg, bb;
};

396 397
struct omap_overlay_info {
	u32 paddr;
398
	u32 p_uv_addr;  /* for NV12 format */
399 400 401 402 403 404 405 406 407 408 409 410 411
	u16 screen_width;
	u16 width;
	u16 height;
	enum omap_color_mode color_mode;
	u8 rotation;
	enum omap_dss_rotation_type rotation_type;
	bool mirror;

	u16 pos_x;
	u16 pos_y;
	u16 out_width;	/* if 0, out_width == width */
	u16 out_height;	/* if 0, out_height == height */
	u8 global_alpha;
412
	u8 pre_mult_alpha;
413
	u8 zorder;
414 415 416 417 418 419 420 421
};

struct omap_overlay {
	struct kobject kobj;
	struct list_head list;

	/* static fields */
	const char *name;
422
	enum omap_plane id;
423 424 425 426 427 428
	enum omap_color_mode supported_modes;
	enum omap_overlay_caps caps;

	/* dynamic fields */
	struct omap_overlay_manager *manager;

429 430 431 432 433 434 435 436 437 438 439
	/*
	 * The following functions do not block:
	 *
	 * is_enabled
	 * set_overlay_info
	 * get_overlay_info
	 *
	 * The rest of the functions may block and cannot be called from
	 * interrupt context
	 */

440 441 442 443
	int (*enable)(struct omap_overlay *ovl);
	int (*disable)(struct omap_overlay *ovl);
	bool (*is_enabled)(struct omap_overlay *ovl);

444 445 446 447 448 449 450 451 452 453
	int (*set_manager)(struct omap_overlay *ovl,
		struct omap_overlay_manager *mgr);
	int (*unset_manager)(struct omap_overlay *ovl);

	int (*set_overlay_info)(struct omap_overlay *ovl,
			struct omap_overlay_info *info);
	void (*get_overlay_info)(struct omap_overlay *ovl,
			struct omap_overlay_info *info);

	int (*wait_for_go)(struct omap_overlay *ovl);
454 455

	struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
456 457 458 459 460 461 462 463 464
};

struct omap_overlay_manager_info {
	u32 default_color;

	enum omap_dss_trans_key_type trans_key_type;
	u32 trans_key;
	bool trans_enabled;

465
	bool partial_alpha_enabled;
466 467 468

	bool cpr_enable;
	struct omap_dss_cpr_coefs cpr_coefs;
469 470 471 472 473 474 475
};

struct omap_overlay_manager {
	struct kobject kobj;

	/* static fields */
	const char *name;
476
	enum omap_channel id;
477
	enum omap_overlay_manager_caps caps;
478
	struct list_head overlays;
479
	enum omap_display_type supported_displays;
480
	enum omap_dss_output_id supported_outputs;
481 482

	/* dynamic fields */
483
	struct omap_dss_output *output;
484

485 486 487 488 489 490 491 492 493 494 495
	/*
	 * The following functions do not block:
	 *
	 * set_manager_info
	 * get_manager_info
	 * apply
	 *
	 * The rest of the functions may block and cannot be called from
	 * interrupt context
	 */

496 497 498
	int (*set_output)(struct omap_overlay_manager *mgr,
		struct omap_dss_output *output);
	int (*unset_output)(struct omap_overlay_manager *mgr);
499 500 501 502 503 504 505 506

	int (*set_manager_info)(struct omap_overlay_manager *mgr,
			struct omap_overlay_manager_info *info);
	void (*get_manager_info)(struct omap_overlay_manager *mgr,
			struct omap_overlay_manager_info *info);

	int (*apply)(struct omap_overlay_manager *mgr);
	int (*wait_for_go)(struct omap_overlay_manager *mgr);
T
Tomi Valkeinen 已提交
507
	int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
508 509

	struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
510 511
};

512 513 514 515 516 517 518 519 520 521 522 523 524 525 526
/* 22 pins means 1 clk lane and 10 data lanes */
#define OMAP_DSS_MAX_DSI_PINS 22

struct omap_dsi_pin_config {
	int num_pins;
	/*
	 * pin numbers in the following order:
	 * clk+, clk-
	 * data1+, data1-
	 * data2+, data2-
	 * ...
	 */
	int pins[OMAP_DSS_MAX_DSI_PINS];
};

527 528 529 530 531 532 533 534 535 536 537 538 539
struct omap_dss_writeback_info {
	u32 paddr;
	u32 p_uv_addr;
	u16 buf_width;
	u16 width;
	u16 height;
	enum omap_color_mode color_mode;
	u8 rotation;
	enum omap_dss_rotation_type rotation_type;
	bool mirror;
	u8 pre_mult_alpha;
};

540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557
struct omap_dss_output {
	struct list_head list;

	/* display type supported by the output */
	enum omap_display_type type;

	/* output instance */
	enum omap_dss_output_id id;

	/* output's platform device pointer */
	struct platform_device *pdev;

	/* dynamic fields */
	struct omap_overlay_manager *manager;

	struct omap_dss_device *device;
};

558 559 560 561 562
struct omap_dss_device {
	struct device dev;

	enum omap_display_type type;

563 564
	enum omap_channel channel;

565 566 567 568 569 570 571 572 573 574 575 576 577 578 579
	union {
		struct {
			u8 data_lines;
		} dpi;

		struct {
			u8 channel;
			u8 data_lines;
		} rfbi;

		struct {
			u8 datapairs;
		} sdi;

		struct {
580 581
			int module;

582 583 584 585 586 587 588 589 590 591
			bool ext_te;
			u8 ext_te_gpio;
		} dsi;

		struct {
			enum omap_dss_venc_type type;
			bool invert_polarity;
		} venc;
	} phy;

592 593
	struct {
		struct {
594 595 596 597 598 599 600
			struct {
				u16 lck_div;
				u16 pck_div;
				enum omap_dss_clk_source lcd_clk_src;
			} channel;

			enum omap_dss_clk_source dispc_fclk_src;
601 602 603
		} dispc;

		struct {
604
			/* regn is one greater than TRM's REGN value */
605 606 607 608 609 610
			u16 regn;
			u16 regm;
			u16 regm_dispc;
			u16 regm_dsi;

			u16 lp_clk_div;
611
			enum omap_dss_clk_source dsi_fclk_src;
612
		} dsi;
613 614

		struct {
615
			/* regn is one greater than TRM's REGN value */
616 617 618
			u16 regn;
			u16 regm2;
		} hdmi;
619 620
	} clocks;

621 622 623
	struct {
		struct omap_video_timings timings;

624
		enum omap_dss_dsi_pixel_format dsi_pix_fmt;
625
		enum omap_dss_dsi_mode dsi_mode;
626
		struct omap_dss_dsi_videomode_timings dsi_vm_timings;
627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651
	} panel;

	struct {
		u8 pixel_size;
		struct rfbi_timings rfbi_timings;
	} ctrl;

	int reset_gpio;

	int max_backlight_level;

	const char *name;

	/* used to match device to driver */
	const char *driver_name;

	void *data;

	struct omap_dss_driver *driver;

	/* helper variable for driver suspend/resume */
	bool activate_after_resume;

	enum omap_display_caps caps;

652
	struct omap_dss_output *output;
653 654 655

	enum omap_dss_display_state state;

656 657
	enum omap_dss_audio_state audio_state;

658 659 660 661 662 663 664
	/* platform specific  */
	int (*platform_enable)(struct omap_dss_device *dssdev);
	void (*platform_disable)(struct omap_dss_device *dssdev);
	int (*set_backlight)(struct omap_dss_device *dssdev, int level);
	int (*get_backlight)(struct omap_dss_device *dssdev);
};

T
Tomi Valkeinen 已提交
665 666
struct omap_dss_hdmi_data
{
667 668
	int ct_cp_hpd_gpio;
	int ls_oe_gpio;
T
Tomi Valkeinen 已提交
669 670 671
	int hpd_gpio;
};

672 673 674 675 676
struct omap_dss_audio {
	struct snd_aes_iec958 *iec;
	struct snd_cea_861_aud_if *cea;
};

677 678 679 680 681 682 683 684 685 686
struct omap_dss_driver {
	struct device_driver driver;

	int (*probe)(struct omap_dss_device *);
	void (*remove)(struct omap_dss_device *);

	int (*enable)(struct omap_dss_device *display);
	void (*disable)(struct omap_dss_device *display);
	int (*run_test)(struct omap_dss_device *display, int test);

687 688 689 690
	int (*update)(struct omap_dss_device *dssdev,
			       u16 x, u16 y, u16 w, u16 h);
	int (*sync)(struct omap_dss_device *dssdev);

691
	int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
692
	int (*get_te)(struct omap_dss_device *dssdev);
693 694 695 696 697 698 699 700 701 702

	u8 (*get_rotate)(struct omap_dss_device *dssdev);
	int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);

	bool (*get_mirror)(struct omap_dss_device *dssdev);
	int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);

	int (*memory_read)(struct omap_dss_device *dssdev,
			void *buf, size_t size,
			u16 x, u16 y, u16 w, u16 h);
703 704 705

	void (*get_resolution)(struct omap_dss_device *dssdev,
			u16 *xres, u16 *yres);
706 707
	void (*get_dimensions)(struct omap_dss_device *dssdev,
			u32 *width, u32 *height);
708
	int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
T
Tomi Valkeinen 已提交
709

710 711 712 713 714 715 716
	int (*check_timings)(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings);
	void (*set_timings)(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings);
	void (*get_timings)(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings);

T
Tomi Valkeinen 已提交
717 718
	int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
	u32 (*get_wss)(struct omap_dss_device *dssdev);
719 720

	int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
721
	bool (*detect)(struct omap_dss_device *dssdev);
722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739

	/*
	 * For display drivers that support audio. This encompasses
	 * HDMI and DisplayPort at the moment.
	 */
	/*
	 * Note: These functions might sleep. Do not call while
	 * holding a spinlock/readlock.
	 */
	int (*audio_enable)(struct omap_dss_device *dssdev);
	void (*audio_disable)(struct omap_dss_device *dssdev);
	bool (*audio_supported)(struct omap_dss_device *dssdev);
	int (*audio_config)(struct omap_dss_device *dssdev,
		struct omap_dss_audio *audio);
	/* Note: These functions may not sleep */
	int (*audio_start)(struct omap_dss_device *dssdev);
	void (*audio_stop)(struct omap_dss_device *dssdev);

740 741
};

742 743
enum omapdss_version omapdss_get_version(void);

744 745 746 747 748 749 750 751 752
int omap_dss_register_driver(struct omap_dss_driver *);
void omap_dss_unregister_driver(struct omap_dss_driver *);

void omap_dss_get_device(struct omap_dss_device *dssdev);
void omap_dss_put_device(struct omap_dss_device *dssdev);
#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
struct omap_dss_device *omap_dss_find_device(void *data,
		int (*match)(struct omap_dss_device *dssdev, void *data));
753
const char *omapdss_get_default_display_name(void);
754 755 756 757 758 759 760 761 762 763

int omap_dss_start_device(struct omap_dss_device *dssdev);
void omap_dss_stop_device(struct omap_dss_device *dssdev);

int omap_dss_get_num_overlay_managers(void);
struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);

int omap_dss_get_num_overlays(void);
struct omap_overlay *omap_dss_get_overlay(int num);

764
struct omap_dss_output *omap_dss_get_output(enum omap_dss_output_id id);
765 766 767
int omapdss_output_set_device(struct omap_dss_output *out,
		struct omap_dss_device *dssdev);
int omapdss_output_unset_device(struct omap_dss_output *out);
768

769 770
void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
		u16 *xres, u16 *yres);
771
int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
772 773
void omapdss_default_get_timings(struct omap_dss_device *dssdev,
		struct omap_video_timings *timings);
774

775 776 777 778 779 780 781
typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);

#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
#define to_dss_device(x) container_of((x), struct omap_dss_device, dev)

782 783
void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
		bool enable);
784
int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
785 786
void omapdss_dsi_set_timings(struct omap_dss_device *dssdev,
		struct omap_video_timings *timings);
787
void omapdss_dsi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h);
788 789
void omapdss_dsi_set_pixel_format(struct omap_dss_device *dssdev,
		enum omap_dss_dsi_pixel_format fmt);
790 791
void omapdss_dsi_set_operation_mode(struct omap_dss_device *dssdev,
		enum omap_dss_dsi_mode mode);
792 793
void omapdss_dsi_set_videomode_timings(struct omap_dss_device *dssdev,
		struct omap_dss_dsi_videomode_timings *timings);
794

795
int omap_dsi_update(struct omap_dss_device *dssdev, int channel,
796
		void (*callback)(int, void *), void *data);
797 798 799
int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
800 801
int omapdss_dsi_configure_pins(struct omap_dss_device *dssdev,
		const struct omap_dsi_pin_config *pin_cfg);
802 803
int omapdss_dsi_set_clocks(struct omap_dss_device *dssdev,
		unsigned long ddr_clk, unsigned long lp_clk);
804

805
int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
806
void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
807
		bool disconnect_lanes, bool enter_ulps);
808 809 810

int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
811 812
void omapdss_dpi_set_timings(struct omap_dss_device *dssdev,
		struct omap_video_timings *timings);
813 814
int dpi_check_timings(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings);
815
void omapdss_dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines);
816 817 818

int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
819 820
void omapdss_sdi_set_timings(struct omap_dss_device *dssdev,
		struct omap_video_timings *timings);
821
void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs);
822 823 824

int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
825 826
int omap_rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
		void *data);
827
int omap_rfbi_configure(struct omap_dss_device *dssdev);
828
void omapdss_rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h);
829 830
void omapdss_rfbi_set_pixel_size(struct omap_dss_device *dssdev,
		int pixel_size);
831 832
void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
		int data_lines);
833 834
void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
		struct rfbi_timings *timings);
835

836 837 838
int omapdss_compat_init(void);
void omapdss_compat_uninit(void);

839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866
struct dss_mgr_ops {
	void (*start_update)(struct omap_overlay_manager *mgr);
	int (*enable)(struct omap_overlay_manager *mgr);
	void (*disable)(struct omap_overlay_manager *mgr);
	void (*set_timings)(struct omap_overlay_manager *mgr,
			const struct omap_video_timings *timings);
	void (*set_lcd_config)(struct omap_overlay_manager *mgr,
			const struct dss_lcd_mgr_config *config);
	int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
			void (*handler)(void *), void *data);
	void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
			void (*handler)(void *), void *data);
};

int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
void dss_uninstall_mgr_ops(void);

void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
		const struct omap_video_timings *timings);
void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
		const struct dss_lcd_mgr_config *config);
int dss_mgr_enable(struct omap_overlay_manager *mgr);
void dss_mgr_disable(struct omap_overlay_manager *mgr);
void dss_mgr_start_update(struct omap_overlay_manager *mgr);
int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
		void (*handler)(void *), void *data);
void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
		void (*handler)(void *), void *data);
867
#endif