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/*
 *    S390 low-level entry points.
 *
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 *    Copyright IBM Corp. 1999, 2012
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 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
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 *		 Hartmut Penner (hp@de.ibm.com),
 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
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 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
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 */

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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/processor.h>
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#include <asm/cache.h>
#include <asm/errno.h>
#include <asm/ptrace.h>
#include <asm/thread_info.h>
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#include <asm/asm-offsets.h>
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#include <asm/unistd.h>
#include <asm/page.h>
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#include <asm/sigp.h>
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#include <asm/irq.h>
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#include <asm/fpu-internal.h>
#include <asm/vx-insn.h>
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__PT_R0      =	__PT_GPRS
__PT_R1      =	__PT_GPRS + 8
__PT_R2      =	__PT_GPRS + 16
__PT_R3      =	__PT_GPRS + 24
__PT_R4      =	__PT_GPRS + 32
__PT_R5      =	__PT_GPRS + 40
__PT_R6      =	__PT_GPRS + 48
__PT_R7      =	__PT_GPRS + 56
__PT_R8      =	__PT_GPRS + 64
__PT_R9      =	__PT_GPRS + 72
__PT_R10     =	__PT_GPRS + 80
__PT_R11     =	__PT_GPRS + 88
__PT_R12     =	__PT_GPRS + 96
__PT_R13     =	__PT_GPRS + 104
__PT_R14     =	__PT_GPRS + 112
__PT_R15     =	__PT_GPRS + 120
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STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
STACK_SIZE  = 1 << STACK_SHIFT
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STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
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_TIF_WORK	= (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
		   _TIF_UPROBE)
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_TIF_TRACE	= (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
		   _TIF_SYSCALL_TRACEPOINT)
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_CIF_WORK	= (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU)
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_PIF_WORK	= (_PIF_PER_TRAP)
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#define BASED(name) name-cleanup_critical(%r13)
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	.macro	TRACE_IRQS_ON
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#ifdef CONFIG_TRACE_IRQFLAGS
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	basr	%r2,%r0
	brasl	%r14,trace_hardirqs_on_caller
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#endif
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	.endm

	.macro	TRACE_IRQS_OFF
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#ifdef CONFIG_TRACE_IRQFLAGS
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	basr	%r2,%r0
	brasl	%r14,trace_hardirqs_off_caller
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#endif
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	.endm
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	.macro	LOCKDEP_SYS_EXIT
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#ifdef CONFIG_LOCKDEP
	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
	jz	.+10
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	brasl	%r14,lockdep_sys_exit
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#endif
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	.endm

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	.macro	CHECK_STACK stacksize,savearea
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#ifdef CONFIG_CHECK_STACK
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	tml	%r15,\stacksize - CONFIG_STACK_GUARD
	lghi	%r14,\savearea
	jz	stack_overflow
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#endif
	.endm

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	.macro	SWITCH_ASYNC savearea,stack,shift,timer
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	tmhh	%r8,0x0001		# interrupting from user ?
	jnz	1f
	lgr	%r14,%r9
	slg	%r14,BASED(.Lcritical_start)
	clg	%r14,BASED(.Lcritical_length)
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	jhe	0f
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	lghi	%r11,\savearea		# inside critical section, do cleanup
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	brasl	%r14,cleanup_critical
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	tmhh	%r8,0x0001		# retest problem state after cleanup
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	jnz	1f
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0:	lg	%r14,\stack		# are we already on the target stack?
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	slgr	%r14,%r15
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	srag	%r14,%r14,\shift
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	jnz	2f
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	CHECK_STACK 1<<\shift,\savearea
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	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
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	j	3f
1:	LAST_BREAK %r14
	UPDATE_VTIME %r14,%r15,\timer
2:	lg	%r15,\stack		# load target stack
3:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
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	.endm
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	.macro UPDATE_VTIME w1,w2,enter_timer
	lg	\w1,__LC_EXIT_TIMER
	lg	\w2,__LC_LAST_UPDATE_TIMER
	slg	\w1,\enter_timer
	slg	\w2,__LC_EXIT_TIMER
	alg	\w1,__LC_USER_TIMER
	alg	\w2,__LC_SYSTEM_TIMER
	stg	\w1,__LC_USER_TIMER
	stg	\w2,__LC_SYSTEM_TIMER
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	mvc	__LC_LAST_UPDATE_TIMER(8),\enter_timer
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	.endm

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	.macro	LAST_BREAK scratch
	srag	\scratch,%r10,23
	jz	.+10
	stg	%r10,__TI_last_break(%r12)
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	.endm

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	.macro REENABLE_IRQS
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	stg	%r8,__LC_RETURN_PSW
	ni	__LC_RETURN_PSW,0xbf
	ssm	__LC_RETURN_PSW
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	.endm

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	.macro STCK savearea
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#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
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	.insn	s,0xb27c0000,\savearea		# store clock fast
#else
	.insn	s,0xb2050000,\savearea		# store clock
#endif
	.endm

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	.section .kprobes.text, "ax"

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/*
 * Scheduler resume function, called by switch_to
 *  gpr2 = (task_struct *) prev
 *  gpr3 = (task_struct *) next
 * Returns:
 *  gpr2 = prev
 */
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ENTRY(__switch_to)
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	stmg	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task
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	lgr	%r1,%r2
	aghi	%r1,__TASK_thread		# thread_struct of prev task
	lg	%r4,__TASK_thread_info(%r2)	# get thread_info of prev
	lg	%r5,__TASK_thread_info(%r3)	# get thread_info of next
	stg	%r15,__THREAD_ksp(%r1)		# store kernel stack of prev
	lgr	%r1,%r3
	aghi	%r1,__TASK_thread		# thread_struct of next task
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	lgr	%r15,%r5
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	aghi	%r15,STACK_INIT			# end of kernel stack of next
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	stg	%r3,__LC_CURRENT		# store task struct of next
	stg	%r5,__LC_THREAD_INFO		# store thread info of next
	stg	%r15,__LC_KERNEL_STACK		# store end of kernel stack
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	lg	%r15,__THREAD_ksp(%r1)		# load kernel stack of next
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	lctl	%c4,%c4,__TASK_pid(%r3)		# load pid to control reg. 4
	mvc	__LC_CURRENT_PID+4(4,%r0),__TASK_pid(%r3) # store pid of next
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	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task
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	br	%r14

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.L__critical_start:
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#if IS_ENABLED(CONFIG_KVM)
/*
 * sie64a calling convention:
 * %r2 pointer to sie control block
 * %r3 guest register save area
 */
ENTRY(sie64a)
	stmg	%r6,%r14,__SF_GPRS(%r15)	# save kernel registers
	stg	%r2,__SF_EMPTY(%r15)		# save control block pointer
	stg	%r3,__SF_EMPTY+8(%r15)		# save guest register save area
	xc	__SF_EMPTY+16(16,%r15),__SF_EMPTY+16(%r15) # host id & reason
	tm	__LC_CPU_FLAGS+7,_CIF_FPU	# load guest fp/vx registers ?
	jno	.Lsie_load_guest_gprs
	lg	%r12,__LC_THREAD_INFO		# load fp/vx regs save area
	brasl	%r14,load_fpu_regs		# load guest fp/vx regs
.Lsie_load_guest_gprs:
	lmg	%r0,%r13,0(%r3)			# load guest gprs 0-13
	lg	%r14,__LC_GMAP			# get gmap pointer
	ltgr	%r14,%r14
	jz	.Lsie_gmap
	lctlg	%c1,%c1,__GMAP_ASCE(%r14)	# load primary asce
.Lsie_gmap:
	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
	oi	__SIE_PROG0C+3(%r14),1		# we are going into SIE now
	tm	__SIE_PROG20+3(%r14),3		# last exit...
	jnz	.Lsie_skip
	tm	__LC_CPU_FLAGS+7,_CIF_FPU
	jo	.Lsie_skip			# exit if fp/vx regs changed
	tm	__LC_MACHINE_FLAGS+6,0x20	# MACHINE_FLAG_LPP
	jz	.Lsie_enter
	.insn	s,0xb2800000,__SF_EMPTY(%r15)	# set guest id
.Lsie_enter:
	sie	0(%r14)
	tm	__LC_MACHINE_FLAGS+6,0x20	# MACHINE_FLAG_LPP
	jz	.Lsie_skip
	.insn	s,0xb2800000,__SF_EMPTY+16(%r15)# set host id
.Lsie_skip:
	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
.Lsie_done:
# some program checks are suppressing. C code (e.g. do_protection_exception)
# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
# instructions between sie64a and .Lsie_done should not cause program
# interrupts. So lets use a nop (47 00 00 00) as a landing pad.
# See also .Lcleanup_sie
.Lrewind_pad:
	nop	0
	.globl sie_exit
sie_exit:
	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area
	stmg	%r0,%r13,0(%r14)		# save guest gprs 0-13
	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers
	lg	%r2,__SF_EMPTY+24(%r15)		# return exit reason code
	br	%r14
.Lsie_fault:
	lghi	%r14,-EFAULT
	stg	%r14,__SF_EMPTY+24(%r15)	# set exit reason code
	j	sie_exit

	EX_TABLE(.Lrewind_pad,.Lsie_fault)
	EX_TABLE(sie_exit,.Lsie_fault)
#endif

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/*
 * SVC interrupt handler routine. System calls are synchronous events and
 * are executed with interrupts enabled.
 */

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ENTRY(system_call)
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	stpt	__LC_SYNC_ENTER_TIMER
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.Lsysc_stmg:
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	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
	lg	%r10,__LC_LAST_BREAK
	lg	%r12,__LC_THREAD_INFO
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	lghi	%r14,_PIF_SYSCALL
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.Lsysc_per:
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	lg	%r15,__LC_KERNEL_STACK
	la	%r11,STACK_FRAME_OVERHEAD(%r15)	# pointer to pt_regs
	LAST_BREAK %r13
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.Lsysc_vtime:
	UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER
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	stmg	%r0,%r7,__PT_R0(%r11)
	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
	mvc	__PT_PSW(16,%r11),__LC_SVC_OLD_PSW
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	mvc	__PT_INT_CODE(4,%r11),__LC_SVC_ILC
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	stg	%r14,__PT_FLAGS(%r11)
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.Lsysc_do_svc:
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	lg	%r10,__TI_sysc_table(%r12)	# address of system call table
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	llgh	%r8,__PT_INT_CODE+2(%r11)
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	slag	%r8,%r8,2			# shift and test for svc 0
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	jnz	.Lsysc_nr_ok
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	# svc 0: system call number in %r1
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	llgfr	%r1,%r1				# clear high word in r1
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	cghi	%r1,NR_syscalls
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	jnl	.Lsysc_nr_ok
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	sth	%r1,__PT_INT_CODE+2(%r11)
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	slag	%r8,%r1,2
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.Lsysc_nr_ok:
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	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
	stg	%r2,__PT_ORIG_GPR2(%r11)
	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
	lgf	%r9,0(%r8,%r10)			# get system call add.
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	tm	__TI_flags+7(%r12),_TIF_TRACE
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	jnz	.Lsysc_tracesys
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	basr	%r14,%r9			# call sys_xxxx
	stg	%r2,__PT_R2(%r11)		# store return value
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.Lsysc_return:
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	LOCKDEP_SYS_EXIT
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.Lsysc_tif:
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	tm	__PT_FLAGS+7(%r11),_PIF_WORK
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	jnz	.Lsysc_work
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	tm	__TI_flags+7(%r12),_TIF_WORK
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	jnz	.Lsysc_work			# check for work
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	tm	__LC_CPU_FLAGS+7,_CIF_WORK
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	jnz	.Lsysc_work
.Lsysc_restore:
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	lg	%r14,__LC_VDSO_PER_CPU
	lmg	%r0,%r10,__PT_R0(%r11)
	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
	stpt	__LC_EXIT_TIMER
	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
	lmg	%r11,%r15,__PT_R11(%r11)
	lpswe	__LC_RETURN_PSW
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.Lsysc_done:
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#
# One of the work bits is on. Find out which one.
#
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.Lsysc_work:
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	tm	__LC_CPU_FLAGS+7,_CIF_MCCK_PENDING
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	jo	.Lsysc_mcck_pending
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	tm	__TI_flags+7(%r12),_TIF_NEED_RESCHED
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	jo	.Lsysc_reschedule
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#ifdef CONFIG_UPROBES
	tm	__TI_flags+7(%r12),_TIF_UPROBE
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	jo	.Lsysc_uprobe_notify
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#endif
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	tm	__PT_FLAGS+7(%r11),_PIF_PER_TRAP
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	jo	.Lsysc_singlestep
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	tm	__TI_flags+7(%r12),_TIF_SIGPENDING
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	jo	.Lsysc_sigpending
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	tm	__TI_flags+7(%r12),_TIF_NOTIFY_RESUME
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	jo	.Lsysc_notify_resume
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	tm	__LC_CPU_FLAGS+7,_CIF_FPU
	jo	.Lsysc_vxrs
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	tm	__LC_CPU_FLAGS+7,_CIF_ASCE
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	jo	.Lsysc_uaccess
	j	.Lsysc_return		# beware of critical section cleanup
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#
# _TIF_NEED_RESCHED is set, call schedule
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#
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.Lsysc_reschedule:
	larl	%r14,.Lsysc_return
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	jg	schedule
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#
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# _CIF_MCCK_PENDING is set, call handler
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#
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.Lsysc_mcck_pending:
	larl	%r14,.Lsysc_return
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	jg	s390_handle_mcck	# TIF bit will be cleared by handler
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#
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# _CIF_ASCE is set, load user space asce
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#
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.Lsysc_uaccess:
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	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE
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	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
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	j	.Lsysc_return
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#
# CIF_FPU is set, restore floating-point controls and floating-point registers.
#
.Lsysc_vxrs:
	larl	%r14,.Lsysc_return
	jg	load_fpu_regs

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#
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# _TIF_SIGPENDING is set, call do_signal
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#
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.Lsysc_sigpending:
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	lgr	%r2,%r11		# pass pointer to pt_regs
	brasl	%r14,do_signal
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	tm	__PT_FLAGS+7(%r11),_PIF_SYSCALL
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	jno	.Lsysc_return
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	lmg	%r2,%r7,__PT_R2(%r11)	# load svc arguments
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	lg	%r10,__TI_sysc_table(%r12)	# address of system call table
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	lghi	%r8,0			# svc 0 returns -ENOSYS
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	llgh	%r1,__PT_INT_CODE+2(%r11)	# load new svc number
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	cghi	%r1,NR_syscalls
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	jnl	.Lsysc_nr_ok		# invalid svc number -> do svc 0
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	slag	%r8,%r1,2
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	j	.Lsysc_nr_ok		# restart svc
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#
# _TIF_NOTIFY_RESUME is set, call do_notify_resume
#
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.Lsysc_notify_resume:
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	lgr	%r2,%r11		# pass pointer to pt_regs
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	larl	%r14,.Lsysc_return
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	jg	do_notify_resume
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#
# _TIF_UPROBE is set, call uprobe_notify_resume
#
#ifdef CONFIG_UPROBES
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.Lsysc_uprobe_notify:
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	lgr	%r2,%r11		# pass pointer to pt_regs
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	larl	%r14,.Lsysc_return
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	jg	uprobe_notify_resume
#endif

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#
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# _PIF_PER_TRAP is set, call do_per_trap
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#
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.Lsysc_singlestep:
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	ni	__PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
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	lgr	%r2,%r11		# pass pointer to pt_regs
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	larl	%r14,.Lsysc_return
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	jg	do_per_trap
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#
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# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
# and after the system call
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#
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.Lsysc_tracesys:
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	lgr	%r2,%r11		# pass pointer to pt_regs
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	la	%r3,0
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	llgh	%r0,__PT_INT_CODE+2(%r11)
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	stg	%r0,__PT_R2(%r11)
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	brasl	%r14,do_syscall_trace_enter
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	lghi	%r0,NR_syscalls
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	clgr	%r0,%r2
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	jnh	.Lsysc_tracenogo
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	sllg	%r8,%r2,2
	lgf	%r9,0(%r8,%r10)
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.Lsysc_tracego:
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	lmg	%r3,%r7,__PT_R3(%r11)
	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
	lg	%r2,__PT_ORIG_GPR2(%r11)
	basr	%r14,%r9		# call sys_xxx
	stg	%r2,__PT_R2(%r11)	# store return value
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.Lsysc_tracenogo:
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	tm	__TI_flags+7(%r12),_TIF_TRACE
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	jz	.Lsysc_return
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	lgr	%r2,%r11		# pass pointer to pt_regs
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	larl	%r14,.Lsysc_return
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	jg	do_syscall_trace_exit
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#
# a new process exits the kernel with ret_from_fork
#
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ENTRY(ret_from_fork)
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	la	%r11,STACK_FRAME_OVERHEAD(%r15)
	lg	%r12,__LC_THREAD_INFO
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	brasl	%r14,schedule_tail
	TRACE_IRQS_ON
	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
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	tm	__PT_PSW+1(%r11),0x01	# forking a kernel thread ?
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	jne	.Lsysc_tracenogo
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	# it's a kernel thread
	lmg	%r9,%r10,__PT_R9(%r11)	# load gprs
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ENTRY(kernel_thread_starter)
	la	%r2,0(%r10)
	basr	%r14,%r9
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	j	.Lsysc_tracenogo
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/*
 * Program check handler routine
 */

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ENTRY(pgm_check_handler)
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	stpt	__LC_SYNC_ENTER_TIMER
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	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
	lg	%r10,__LC_LAST_BREAK
	lg	%r12,__LC_THREAD_INFO
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	larl	%r13,cleanup_critical
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	lmg	%r8,%r9,__LC_PGM_OLD_PSW
	tmhh	%r8,0x0001		# test problem state bit
454 455 456 457 458 459 460 461 462 463 464
	jnz	2f			# -> fault in user space
#if IS_ENABLED(CONFIG_KVM)
	# cleanup critical section for sie64a
	lgr	%r14,%r9
	slg	%r14,BASED(.Lsie_critical_start)
	clg	%r14,BASED(.Lsie_critical_length)
	jhe	0f
	brasl	%r14,.Lcleanup_sie
#endif
0:	tmhh	%r8,0x4000		# PER bit set in old PSW ?
	jnz	1f			# -> enabled, can't be a double fault
465
	tm	__LC_PGM_ILC+3,0x80	# check for per exception
466
	jnz	.Lpgm_svcper		# -> single stepped svc
467
1:	CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
468
	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
469
	j	3f
470 471
2:	LAST_BREAK %r14
	UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
472
	lg	%r15,__LC_KERNEL_STACK
473
	lg	%r14,__TI_task(%r12)
474
	aghi	%r14,__TASK_thread	# pointer to thread_struct
475 476
	lghi	%r13,__LC_PGM_TDB
	tm	__LC_PGM_ILC+2,0x02	# check for transaction abort
477
	jz	3f
478
	mvc	__THREAD_trap_tdb(256,%r14),0(%r13)
479
3:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
480 481 482
	stmg	%r0,%r7,__PT_R0(%r11)
	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
	stmg	%r8,%r9,__PT_PSW(%r11)
M
Martin Schwidefsky 已提交
483 484
	mvc	__PT_INT_CODE(4,%r11),__LC_PGM_ILC
	mvc	__PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
485
	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
486 487
	stg	%r10,__PT_ARGS(%r11)
	tm	__LC_PGM_ILC+3,0x80	# check for per exception
488
	jz	4f
489
	tmhh	%r8,0x0001		# kernel per event ?
490
	jz	.Lpgm_kprobe
491
	oi	__PT_FLAGS+7(%r11),_PIF_PER_TRAP
492
	mvc	__THREAD_per_address(8,%r14),__LC_PER_ADDRESS
493 494
	mvc	__THREAD_per_cause(2,%r14),__LC_PER_CODE
	mvc	__THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
495
4:	REENABLE_IRQS
496
	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
497
	larl	%r1,pgm_check_table
M
Martin Schwidefsky 已提交
498 499
	llgh	%r10,__PT_INT_CODE+2(%r11)
	nill	%r10,0x007f
500
	sll	%r10,2
501
	je	.Lpgm_return
502
	lgf	%r1,0(%r10,%r1)		# load address of handler routine
503
	lgr	%r2,%r11		# pass pointer to pt_regs
504
	basr	%r14,%r1		# branch to interrupt-handler
505 506 507 508 509
.Lpgm_return:
	LOCKDEP_SYS_EXIT
	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
	jno	.Lsysc_restore
	j	.Lsysc_tif
L
Linus Torvalds 已提交
510 511

#
512
# PER event in supervisor state, must be kprobes
L
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513
#
514
.Lpgm_kprobe:
515 516 517 518
	REENABLE_IRQS
	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
	lgr	%r2,%r11		# pass pointer to pt_regs
	brasl	%r14,do_per_trap
519
	j	.Lpgm_return
L
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520

M
Michael Grundy 已提交
521
#
522
# single stepped system call
M
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523
#
524
.Lpgm_svcper:
525
	mvc	__LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
526
	larl	%r14,.Lsysc_per
527
	stg	%r14,__LC_RETURN_PSW+8
528
	lghi	%r14,_PIF_SYSCALL | _PIF_PER_TRAP
529
	lpswe	__LC_RETURN_PSW		# branch to .Lsysc_per and enable irqs
M
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530

L
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531 532 533
/*
 * IO interrupt handler routine
 */
534
ENTRY(io_int_handler)
535
	STCK	__LC_INT_CLOCK
536
	stpt	__LC_ASYNC_ENTER_TIMER
537 538 539
	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
	lg	%r10,__LC_LAST_BREAK
	lg	%r12,__LC_THREAD_INFO
540
	larl	%r13,cleanup_critical
541
	lmg	%r8,%r9,__LC_IO_OLD_PSW
542 543
	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_STACK,STACK_SHIFT,\
		     __LC_ASYNC_ENTER_TIMER
544 545 546
	stmg	%r0,%r7,__PT_R0(%r11)
	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
	stmg	%r8,%r9,__PT_PSW(%r11)
547
	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
548
	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
549
	TRACE_IRQS_OFF
550
	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
551
.Lio_loop:
552
	lgr	%r2,%r11		# pass pointer to pt_regs
553 554
	lghi	%r3,IO_INTERRUPT
	tm	__PT_INT_CODE+8(%r11),0x80	# adapter interrupt ?
555
	jz	.Lio_call
556
	lghi	%r3,THIN_INTERRUPT
557
.Lio_call:
558
	brasl	%r14,do_IRQ
559
	tm	__LC_MACHINE_FLAGS+6,0x10	# MACHINE_FLAG_LPAR
560
	jz	.Lio_return
561
	tpi	0
562
	jz	.Lio_return
563
	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
564 565
	j	.Lio_loop
.Lio_return:
566 567
	LOCKDEP_SYS_EXIT
	TRACE_IRQS_ON
568
.Lio_tif:
569
	tm	__TI_flags+7(%r12),_TIF_WORK
570
	jnz	.Lio_work		# there is work to do (signals etc.)
571
	tm	__LC_CPU_FLAGS+7,_CIF_WORK
572 573
	jnz	.Lio_work
.Lio_restore:
574 575 576 577 578 579 580
	lg	%r14,__LC_VDSO_PER_CPU
	lmg	%r0,%r10,__PT_R0(%r11)
	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
	stpt	__LC_EXIT_TIMER
	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
	lmg	%r11,%r15,__PT_R11(%r11)
	lpswe	__LC_RETURN_PSW
581
.Lio_done:
L
Linus Torvalds 已提交
582

583
#
584
# There is work todo, find out in which context we have been interrupted:
585
# 1) if we return to user space we can do all _TIF_WORK work
586 587 588 589 590
# 2) if we return to kernel code and kvm is enabled check if we need to
#    modify the psw to leave SIE
# 3) if we return to kernel code and preemptive scheduling is enabled check
#    the preemption counter and if it is zero call preempt_schedule_irq
# Before any work can be done, a switch to the kernel stack is required.
591
#
592
.Lio_work:
593
	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
594
	jo	.Lio_work_user		# yes -> do resched & signal
595
#ifdef CONFIG_PREEMPT
596
	# check for preemptive scheduling
597
	icm	%r0,15,__TI_precount(%r12)
598
	jnz	.Lio_restore		# preemption is disabled
599
	tm	__TI_flags+7(%r12),_TIF_NEED_RESCHED
600
	jno	.Lio_restore
L
Linus Torvalds 已提交
601
	# switch to kernel stack
602 603 604 605 606
	lg	%r1,__PT_R15(%r11)
	aghi	%r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
	la	%r11,STACK_FRAME_OVERHEAD(%r1)
L
Linus Torvalds 已提交
607
	lgr	%r15,%r1
608
	# TRACE_IRQS_ON already done at .Lio_return, call
609 610 611
	# TRACE_IRQS_OFF to keep things symmetrical
	TRACE_IRQS_OFF
	brasl	%r14,preempt_schedule_irq
612
	j	.Lio_return
613
#else
614
	j	.Lio_restore
615
#endif
L
Linus Torvalds 已提交
616

617 618 619
#
# Need to do work before returning to userspace, switch to kernel stack
#
620
.Lio_work_user:
L
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621
	lg	%r1,__LC_KERNEL_STACK
622 623 624
	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
	la	%r11,STACK_FRAME_OVERHEAD(%r1)
L
Linus Torvalds 已提交
625
	lgr	%r15,%r1
626

L
Linus Torvalds 已提交
627 628 629
#
# One of the work bits is on. Find out which one.
#
630
.Lio_work_tif:
631
	tm	__LC_CPU_FLAGS+7,_CIF_MCCK_PENDING
632
	jo	.Lio_mcck_pending
633
	tm	__TI_flags+7(%r12),_TIF_NEED_RESCHED
634
	jo	.Lio_reschedule
635
	tm	__TI_flags+7(%r12),_TIF_SIGPENDING
636
	jo	.Lio_sigpending
637
	tm	__TI_flags+7(%r12),_TIF_NOTIFY_RESUME
638
	jo	.Lio_notify_resume
639 640
	tm	__LC_CPU_FLAGS+7,_CIF_FPU
	jo	.Lio_vxrs
641
	tm	__LC_CPU_FLAGS+7,_CIF_ASCE
642 643
	jo	.Lio_uaccess
	j	.Lio_return		# beware of critical section cleanup
644

645
#
646
# _CIF_MCCK_PENDING is set, call handler
647
#
648 649
.Lio_mcck_pending:
	# TRACE_IRQS_ON already done at .Lio_return
H
Heiko Carstens 已提交
650
	brasl	%r14,s390_handle_mcck	# TIF bit will be cleared by handler
651
	TRACE_IRQS_OFF
652
	j	.Lio_return
653

654
#
655
# _CIF_ASCE is set, load user space asce
656
#
657
.Lio_uaccess:
658
	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE
659
	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
660
	j	.Lio_return
661

662 663 664 665 666 667 668
#
# CIF_FPU is set, restore floating-point controls and floating-point registers.
#
.Lio_vxrs:
	larl	%r14,.Lio_return
	jg	load_fpu_regs

L
Linus Torvalds 已提交
669 670
#
# _TIF_NEED_RESCHED is set, call schedule
H
Heiko Carstens 已提交
671
#
672 673
.Lio_reschedule:
	# TRACE_IRQS_ON already done at .Lio_return
674
	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
H
Heiko Carstens 已提交
675
	brasl	%r14,schedule		# call scheduler
676
	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
677
	TRACE_IRQS_OFF
678
	j	.Lio_return
L
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679 680

#
681
# _TIF_SIGPENDING or is set, call do_signal
L
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682
#
683 684
.Lio_sigpending:
	# TRACE_IRQS_ON already done at .Lio_return
685 686 687 688
	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
	lgr	%r2,%r11		# pass pointer to pt_regs
	brasl	%r14,do_signal
	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
689
	TRACE_IRQS_OFF
690
	j	.Lio_return
L
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691

M
Martin Schwidefsky 已提交
692 693 694
#
# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
#
695 696
.Lio_notify_resume:
	# TRACE_IRQS_ON already done at .Lio_return
697 698 699 700
	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
	lgr	%r2,%r11		# pass pointer to pt_regs
	brasl	%r14,do_notify_resume
	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
M
Martin Schwidefsky 已提交
701
	TRACE_IRQS_OFF
702
	j	.Lio_return
M
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703

L
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704 705 706
/*
 * External interrupt handler routine
 */
707
ENTRY(ext_int_handler)
708
	STCK	__LC_INT_CLOCK
709
	stpt	__LC_ASYNC_ENTER_TIMER
710 711 712
	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
	lg	%r10,__LC_LAST_BREAK
	lg	%r12,__LC_THREAD_INFO
713
	larl	%r13,cleanup_critical
714
	lmg	%r8,%r9,__LC_EXT_OLD_PSW
715 716
	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_STACK,STACK_SHIFT,\
		     __LC_ASYNC_ENTER_TIMER
717 718 719
	stmg	%r0,%r7,__PT_R0(%r11)
	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
	stmg	%r8,%r9,__PT_PSW(%r11)
720 721 722 723
	lghi	%r1,__LC_EXT_PARAMS2
	mvc	__PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
	mvc	__PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
	mvc	__PT_INT_PARM_LONG(8,%r11),0(%r1)
724
	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
725
	TRACE_IRQS_OFF
726
	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
727
	lgr	%r2,%r11		# pass pointer to pt_regs
728 729
	lghi	%r3,EXT_INTERRUPT
	brasl	%r14,do_IRQ
730
	j	.Lio_return
L
Linus Torvalds 已提交
731

M
Martin Schwidefsky 已提交
732
/*
733
 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
M
Martin Schwidefsky 已提交
734 735
 */
ENTRY(psw_idle)
736
	stg	%r3,__SF_EMPTY(%r15)
737
	larl	%r1,.Lpsw_idle_lpsw+4
M
Martin Schwidefsky 已提交
738
	stg	%r1,__SF_EMPTY+8(%r15)
739 740
	STCK	__CLOCK_IDLE_ENTER(%r2)
	stpt	__TIMER_IDLE_ENTER(%r2)
741
.Lpsw_idle_lpsw:
M
Martin Schwidefsky 已提交
742 743
	lpswe	__SF_EMPTY(%r15)
	br	%r14
744
.Lpsw_idle_end:
M
Martin Schwidefsky 已提交
745

746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860
/* Store floating-point controls and floating-point or vector extension
 * registers instead.  A critical section cleanup assures that the registers
 * are stored even if interrupted for some other work.	The register %r2
 * designates a struct fpu to store register contents.	If the specified
 * structure does not contain a register save area, the register store is
 * omitted (see also comments in arch_dup_task_struct()).
 *
 * The CIF_FPU flag is set in any case.  The CIF_FPU triggers a lazy restore
 * of the register contents at system call or io return.
 */
ENTRY(save_fpu_regs)
	tm	__LC_CPU_FLAGS+7,_CIF_FPU
	bor	%r14
	stfpc	__FPU_fpc(%r2)
.Lsave_fpu_regs_fpc_end:
	lg	%r3,__FPU_regs(%r2)
	ltgr	%r3,%r3
	jz	.Lsave_fpu_regs_done	  # no save area -> set CIF_FPU
	tm	__FPU_flags+3(%r2),FPU_USE_VX
	jz	.Lsave_fpu_regs_fp	  # no -> store FP regs
.Lsave_fpu_regs_vx_low:
	VSTM	%v0,%v15,0,%r3		  # vstm 0,15,0(3)
.Lsave_fpu_regs_vx_high:
	VSTM	%v16,%v31,256,%r3	  # vstm 16,31,256(3)
	j	.Lsave_fpu_regs_done	  # -> set CIF_FPU flag
.Lsave_fpu_regs_fp:
	std	0,0(%r3)
	std	1,8(%r3)
	std	2,16(%r3)
	std	3,24(%r3)
	std	4,32(%r3)
	std	5,40(%r3)
	std	6,48(%r3)
	std	7,56(%r3)
	std	8,64(%r3)
	std	9,72(%r3)
	std	10,80(%r3)
	std	11,88(%r3)
	std	12,96(%r3)
	std	13,104(%r3)
	std	14,112(%r3)
	std	15,120(%r3)
.Lsave_fpu_regs_done:
	oi	__LC_CPU_FLAGS+7,_CIF_FPU
	br	%r14
.Lsave_fpu_regs_end:

/* Load floating-point controls and floating-point or vector extension
 * registers.  A critical section cleanup assures that the register contents
 * are loaded even if interrupted for some other work.	Depending on the saved
 * FP/VX state, the vector-enablement control, CR0.46, is either set or cleared.
 *
 * There are special calling conventions to fit into sysc and io return work:
 *	%r12:	__LC_THREAD_INFO
 *	%r15:	<kernel stack>
 * The function requires:
 *	%r4 and __SF_EMPTY+32(%r15)
 */
load_fpu_regs:
	tm	__LC_CPU_FLAGS+7,_CIF_FPU
	bnor	%r14
	lg	%r4,__TI_task(%r12)
	la	%r4,__THREAD_fpu(%r4)
	lfpc	__FPU_fpc(%r4)
	stctg	%c0,%c0,__SF_EMPTY+32(%r15)	# store CR0
	tm	__FPU_flags+3(%r4),FPU_USE_VX	# VX-enabled task ?
	lg	%r4,__FPU_regs(%r4)		# %r4 <- reg save area
	jz	.Lload_fpu_regs_fp_ctl		# -> no VX, load FP regs
.Lload_fpu_regs_vx_ctl:
	tm	__SF_EMPTY+32+5(%r15),2		# test VX control
	jo	.Lload_fpu_regs_vx
	oi	__SF_EMPTY+32+5(%r15),2		# set VX control
	lctlg	%c0,%c0,__SF_EMPTY+32(%r15)
.Lload_fpu_regs_vx:
	VLM	%v0,%v15,0,%r4
.Lload_fpu_regs_vx_high:
	VLM	%v16,%v31,256,%r4
	j	.Lload_fpu_regs_done
.Lload_fpu_regs_fp_ctl:
	tm	__SF_EMPTY+32+5(%r15),2		# test VX control
	jz	.Lload_fpu_regs_fp
	ni	__SF_EMPTY+32+5(%r15),253	# clear VX control
	lctlg	%c0,%c0,__SF_EMPTY+32(%r15)
.Lload_fpu_regs_fp:
	ld	0,0(%r4)
	ld	1,8(%r4)
	ld	2,16(%r4)
	ld	3,24(%r4)
	ld	4,32(%r4)
	ld	5,40(%r4)
	ld	6,48(%r4)
	ld	7,56(%r4)
	ld	8,64(%r4)
	ld	9,72(%r4)
	ld	10,80(%r4)
	ld	11,88(%r4)
	ld	12,96(%r4)
	ld	13,104(%r4)
	ld	14,112(%r4)
	ld	15,120(%r4)
.Lload_fpu_regs_done:
	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
	br	%r14
.Lload_fpu_regs_end:

/* Test and set the vector enablement control in CR0.46 */
ENTRY(__ctl_set_vx)
	stctg	%c0,%c0,__SF_EMPTY(%r15)
	tm	__SF_EMPTY+5(%r15),2
	bor	%r14
	oi	__SF_EMPTY+5(%r15),2
	lctlg	%c0,%c0,__SF_EMPTY(%r15)
	br	%r14
.L__ctl_set_vx_end:

861
.L__critical_end:
862

L
Linus Torvalds 已提交
863 864 865
/*
 * Machine check handler routines
 */
866
ENTRY(mcck_int_handler)
867
	STCK	__LC_MCCK_CLOCK
868 869
	la	%r1,4095		# revalidate r1
	spt	__LC_CPU_TIMER_SAVE_AREA-4095(%r1)	# revalidate cpu timer
H
Heiko Carstens 已提交
870
	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
871 872
	lg	%r10,__LC_LAST_BREAK
	lg	%r12,__LC_THREAD_INFO
873
	larl	%r13,cleanup_critical
874
	lmg	%r8,%r9,__LC_MCK_OLD_PSW
H
Heiko Carstens 已提交
875
	tm	__LC_MCCK_CODE,0x80	# system damage?
876
	jo	.Lmcck_panic		# yes -> rest of mcck code invalid
877 878
	lghi	%r14,__LC_CPU_TIMER_SAVE_AREA
	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
879
	tm	__LC_MCCK_CODE+5,0x02	# stored cpu timer value valid?
880
	jo	3f
881 882 883 884 885
	la	%r14,__LC_SYNC_ENTER_TIMER
	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
	jl	0f
	la	%r14,__LC_ASYNC_ENTER_TIMER
0:	clc	0(8,%r14),__LC_EXIT_TIMER
886
	jl	1f
887
	la	%r14,__LC_EXIT_TIMER
888 889
1:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
	jl	2f
890
	la	%r14,__LC_LAST_UPDATE_TIMER
891
2:	spt	0(%r14)
892
	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
893
3:	tm	__LC_MCCK_CODE+2,0x09	# mwp + ia of old psw valid?
894
	jno	.Lmcck_panic		# no -> skip cleanup critical
895 896
	SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_PANIC_STACK,PAGE_SHIFT,\
		     __LC_MCCK_ENTER_TIMER
897
.Lmcck_skip:
898 899 900
	lghi	%r14,__LC_GPREGS_SAVE_AREA+64
	stmg	%r0,%r7,__PT_R0(%r11)
	mvc	__PT_R8(64,%r11),0(%r14)
901
	stmg	%r8,%r9,__PT_PSW(%r11)
902
	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
903 904
	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
	lgr	%r2,%r11		# pass pointer to pt_regs
905
	brasl	%r14,s390_do_machine_check
906
	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
907
	jno	.Lmcck_return
908
	lg	%r1,__LC_KERNEL_STACK	# switch to kernel stack
909 910 911
	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
	la	%r11,STACK_FRAME_OVERHEAD(%r1)
912
	lgr	%r15,%r1
913
	ssm	__LC_PGM_NEW_PSW	# turn dat on, keep irqs off
914
	tm	__LC_CPU_FLAGS+7,_CIF_MCCK_PENDING
915
	jno	.Lmcck_return
916
	TRACE_IRQS_OFF
917
	brasl	%r14,s390_handle_mcck
918
	TRACE_IRQS_ON
919
.Lmcck_return:
920 921 922
	lg	%r14,__LC_VDSO_PER_CPU
	lmg	%r0,%r10,__PT_R0(%r11)
	mvc	__LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
923 924 925
	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
	jno	0f
	stpt	__LC_EXIT_TIMER
926 927 928 929
	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
0:	lmg	%r11,%r15,__PT_R11(%r11)
	lpswe	__LC_RETURN_MCCK_PSW

930
.Lmcck_panic:
931 932 933 934 935 936
	lg	%r14,__LC_PANIC_STACK
	slgr	%r14,%r15
	srag	%r14,%r14,PAGE_SHIFT
	jz	0f
	lg	%r15,__LC_PANIC_STACK
0:	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
937
	j	.Lmcck_skip
L
Linus Torvalds 已提交
938

939 940 941
#
# PSW restart interrupt handler
#
M
Martin Schwidefsky 已提交
942
ENTRY(restart_int_handler)
943
	stg	%r15,__LC_SAVE_AREA_RESTART
M
Martin Schwidefsky 已提交
944
	lg	%r15,__LC_RESTART_STACK
945
	aghi	%r15,-__PT_SIZE			# create pt_regs on stack
M
Martin Schwidefsky 已提交
946
	xc	0(__PT_SIZE,%r15),0(%r15)
947 948 949
	stmg	%r0,%r14,__PT_R0(%r15)
	mvc	__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
	mvc	__PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
M
Martin Schwidefsky 已提交
950 951
	aghi	%r15,-STACK_FRAME_OVERHEAD	# create stack frame on stack
	xc	0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
952 953 954
	lg	%r1,__LC_RESTART_FN		# load fn, parm & source cpu
	lg	%r2,__LC_RESTART_DATA
	lg	%r3,__LC_RESTART_SOURCE
M
Martin Schwidefsky 已提交
955 956
	ltgr	%r3,%r3				# test source cpu address
	jm	1f				# negative -> skip source stop
957
0:	sigp	%r4,%r3,SIGP_SENSE		# sigp sense to source cpu
M
Martin Schwidefsky 已提交
958 959 960 961
	brc	10,0b				# wait for status stored
1:	basr	%r14,%r1			# call function
	stap	__SF_EMPTY(%r15)		# store cpu address
	llgh	%r3,__SF_EMPTY(%r15)
962
2:	sigp	%r4,%r3,SIGP_STOP		# sigp stop to current cpu
M
Martin Schwidefsky 已提交
963 964
	brc	2,2b
3:	j	3b
965

966 967
	.section .kprobes.text, "ax"

L
Linus Torvalds 已提交
968 969 970 971 972 973 974
#ifdef CONFIG_CHECK_STACK
/*
 * The synchronous or the asynchronous stack overflowed. We are dead.
 * No need to properly save the registers, we are going to panic anyway.
 * Setup a pt_regs so that show_trace can provide a good call trace.
 */
stack_overflow:
975 976
	lg	%r15,__LC_PANIC_STACK	# change to panic stack
	la	%r11,STACK_FRAME_OVERHEAD(%r15)
977 978 979 980 981 982
	stmg	%r0,%r7,__PT_R0(%r11)
	stmg	%r8,%r9,__PT_PSW(%r11)
	mvc	__PT_R8(64,%r11),0(%r14)
	stg	%r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
	lgr	%r2,%r11		# pass pointer to pt_regs
L
Linus Torvalds 已提交
983 984 985 986
	jg	kernel_stack_overflow
#endif

cleanup_critical:
987 988 989 990 991 992
#if IS_ENABLED(CONFIG_KVM)
	clg	%r9,BASED(.Lcleanup_table_sie)	# .Lsie_gmap
	jl	0f
	clg	%r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
	jl	.Lcleanup_sie
#endif
993
	clg	%r9,BASED(.Lcleanup_table)	# system_call
L
Linus Torvalds 已提交
994
	jl	0f
995 996 997
	clg	%r9,BASED(.Lcleanup_table+8)	# .Lsysc_do_svc
	jl	.Lcleanup_system_call
	clg	%r9,BASED(.Lcleanup_table+16)	# .Lsysc_tif
L
Linus Torvalds 已提交
998
	jl	0f
999 1000 1001 1002 1003
	clg	%r9,BASED(.Lcleanup_table+24)	# .Lsysc_restore
	jl	.Lcleanup_sysc_tif
	clg	%r9,BASED(.Lcleanup_table+32)	# .Lsysc_done
	jl	.Lcleanup_sysc_restore
	clg	%r9,BASED(.Lcleanup_table+40)	# .Lio_tif
1004
	jl	0f
1005 1006 1007 1008 1009
	clg	%r9,BASED(.Lcleanup_table+48)	# .Lio_restore
	jl	.Lcleanup_io_tif
	clg	%r9,BASED(.Lcleanup_table+56)	# .Lio_done
	jl	.Lcleanup_io_restore
	clg	%r9,BASED(.Lcleanup_table+64)	# psw_idle
M
Martin Schwidefsky 已提交
1010
	jl	0f
1011 1012
	clg	%r9,BASED(.Lcleanup_table+72)	# .Lpsw_idle_end
	jl	.Lcleanup_idle
1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024
	clg	%r9,BASED(.Lcleanup_table+80)	# save_fpu_regs
	jl	0f
	clg	%r9,BASED(.Lcleanup_table+88)	# .Lsave_fpu_regs_end
	jl	.Lcleanup_save_fpu_regs
	clg	%r9,BASED(.Lcleanup_table+96)	# load_fpu_regs
	jl	0f
	clg	%r9,BASED(.Lcleanup_table+104)	# .Lload_fpu_regs_end
	jl	.Lcleanup_load_fpu_regs
	clg	%r9,BASED(.Lcleanup_table+112)	# __ctl_set_vx
	jl	0f
	clg	%r9,BASED(.Lcleanup_table+120)	# .L__ctl_set_vx_end
	jl	.Lcleanup___ctl_set_vx
1025 1026
0:	br	%r14

1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060
	.align	8
.Lcleanup_table:
	.quad	system_call
	.quad	.Lsysc_do_svc
	.quad	.Lsysc_tif
	.quad	.Lsysc_restore
	.quad	.Lsysc_done
	.quad	.Lio_tif
	.quad	.Lio_restore
	.quad	.Lio_done
	.quad	psw_idle
	.quad	.Lpsw_idle_end
	.quad	save_fpu_regs
	.quad	.Lsave_fpu_regs_end
	.quad	load_fpu_regs
	.quad	.Lload_fpu_regs_end
	.quad	__ctl_set_vx
	.quad	.L__ctl_set_vx_end

#if IS_ENABLED(CONFIG_KVM)
.Lcleanup_table_sie:
	.quad	.Lsie_gmap
	.quad	.Lsie_done

.Lcleanup_sie:
	lg	%r9,__SF_EMPTY(%r15)		# get control block pointer
	tm	__LC_MACHINE_FLAGS+6,0x20	# MACHINE_FLAG_LPP
	jz	0f
	.insn	s,0xb2800000,__SF_EMPTY+16(%r15)# set host id
0:	ni	__SIE_PROG0C+3(%r9),0xfe	# no longer in SIE
	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
	larl	%r9,sie_exit			# skip forward to sie_exit
	br	%r14
#endif
L
Linus Torvalds 已提交
1061

1062
.Lcleanup_system_call:
1063
	# check if stpt has been executed
1064
	clg	%r9,BASED(.Lcleanup_system_call_insn)
L
Linus Torvalds 已提交
1065 1066
	jh	0f
	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1067
	cghi	%r11,__LC_SAVE_AREA_ASYNC
1068
	je	0f
1069 1070
	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
0:	# check if stmg has been executed
1071
	clg	%r9,BASED(.Lcleanup_system_call_insn+8)
L
Linus Torvalds 已提交
1072
	jh	0f
1073 1074
	mvc	__LC_SAVE_AREA_SYNC(64),0(%r11)
0:	# check if base register setup + TIF bit load has been done
1075
	clg	%r9,BASED(.Lcleanup_system_call_insn+16)
1076 1077 1078 1079 1080
	jhe	0f
	# set up saved registers r10 and r12
	stg	%r10,16(%r11)		# r10 last break
	stg	%r12,32(%r11)		# r12 thread-info pointer
0:	# check if the user time update has been done
1081
	clg	%r9,BASED(.Lcleanup_system_call_insn+24)
1082 1083 1084 1085 1086 1087
	jh	0f
	lg	%r15,__LC_EXIT_TIMER
	slg	%r15,__LC_SYNC_ENTER_TIMER
	alg	%r15,__LC_USER_TIMER
	stg	%r15,__LC_USER_TIMER
0:	# check if the system time update has been done
1088
	clg	%r9,BASED(.Lcleanup_system_call_insn+32)
1089 1090 1091 1092 1093 1094
	jh	0f
	lg	%r15,__LC_LAST_UPDATE_TIMER
	slg	%r15,__LC_EXIT_TIMER
	alg	%r15,__LC_SYSTEM_TIMER
	stg	%r15,__LC_SYSTEM_TIMER
0:	# update accounting time stamp
L
Linus Torvalds 已提交
1095
	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1096 1097 1098
	# do LAST_BREAK
	lg	%r9,16(%r11)
	srag	%r9,%r9,23
1099
	jz	0f
1100 1101 1102
	mvc	__TI_last_break(8,%r12),16(%r11)
0:	# set up saved register r11
	lg	%r15,__LC_KERNEL_STACK
1103 1104
	la	%r9,STACK_FRAME_OVERHEAD(%r15)
	stg	%r9,24(%r11)		# r11 pt_regs pointer
1105
	# fill pt_regs
1106 1107 1108 1109
	mvc	__PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
	stmg	%r0,%r7,__PT_R0(%r9)
	mvc	__PT_PSW(16,%r9),__LC_SVC_OLD_PSW
	mvc	__PT_INT_CODE(4,%r9),__LC_SVC_ILC
1110 1111
	xc	__PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
	mvi	__PT_FLAGS+7(%r9),_PIF_SYSCALL
1112 1113 1114
	# setup saved register r15
	stg	%r15,56(%r11)		# r15 stack pointer
	# set new psw address and exit
1115
	larl	%r9,.Lsysc_do_svc
L
Linus Torvalds 已提交
1116
	br	%r14
1117
.Lcleanup_system_call_insn:
H
Heiko Carstens 已提交
1118
	.quad	system_call
1119 1120
	.quad	.Lsysc_stmg
	.quad	.Lsysc_per
1121
	.quad	.Lsysc_vtime+36
1122
	.quad	.Lsysc_vtime+42
L
Linus Torvalds 已提交
1123

1124 1125
.Lcleanup_sysc_tif:
	larl	%r9,.Lsysc_tif
L
Linus Torvalds 已提交
1126 1127
	br	%r14

1128 1129
.Lcleanup_sysc_restore:
	clg	%r9,BASED(.Lcleanup_sysc_restore_insn)
1130
	je	0f
1131 1132 1133 1134 1135
	lg	%r9,24(%r11)		# get saved pointer to pt_regs
	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
	mvc	0(64,%r11),__PT_R8(%r9)
	lmg	%r0,%r7,__PT_R0(%r9)
0:	lmg	%r8,%r9,__LC_RETURN_PSW
L
Linus Torvalds 已提交
1136
	br	%r14
1137 1138
.Lcleanup_sysc_restore_insn:
	.quad	.Lsysc_done - 4
L
Linus Torvalds 已提交
1139

1140 1141
.Lcleanup_io_tif:
	larl	%r9,.Lio_tif
1142 1143
	br	%r14

1144 1145
.Lcleanup_io_restore:
	clg	%r9,BASED(.Lcleanup_io_restore_insn)
1146 1147 1148 1149 1150 1151
	je	0f
	lg	%r9,24(%r11)		# get saved r11 pointer to pt_regs
	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
	mvc	0(64,%r11),__PT_R8(%r9)
	lmg	%r0,%r7,__PT_R0(%r9)
0:	lmg	%r8,%r9,__LC_RETURN_PSW
1152
	br	%r14
1153 1154
.Lcleanup_io_restore_insn:
	.quad	.Lio_done - 4
1155

1156
.Lcleanup_idle:
M
Martin Schwidefsky 已提交
1157
	# copy interrupt clock & cpu timer
1158 1159
	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
M
Martin Schwidefsky 已提交
1160 1161
	cghi	%r11,__LC_SAVE_AREA_ASYNC
	je	0f
1162 1163
	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
M
Martin Schwidefsky 已提交
1164
0:	# check if stck & stpt have been executed
1165
	clg	%r9,BASED(.Lcleanup_idle_insn)
M
Martin Schwidefsky 已提交
1166
	jhe	1f
1167 1168 1169
	mvc	__CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
	mvc	__TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1:	# account system time going idle
M
Martin Schwidefsky 已提交
1170
	lg	%r9,__LC_STEAL_TIMER
1171
	alg	%r9,__CLOCK_IDLE_ENTER(%r2)
M
Martin Schwidefsky 已提交
1172 1173
	slg	%r9,__LC_LAST_UPDATE_CLOCK
	stg	%r9,__LC_STEAL_TIMER
1174
	mvc	__LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
M
Martin Schwidefsky 已提交
1175 1176
	lg	%r9,__LC_SYSTEM_TIMER
	alg	%r9,__LC_LAST_UPDATE_TIMER
1177
	slg	%r9,__TIMER_IDLE_ENTER(%r2)
M
Martin Schwidefsky 已提交
1178
	stg	%r9,__LC_SYSTEM_TIMER
1179
	mvc	__LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
M
Martin Schwidefsky 已提交
1180
	# prepare return psw
1181
	nihh	%r8,0xfcfd		# clear irq & wait state bits
M
Martin Schwidefsky 已提交
1182 1183
	lg	%r9,48(%r11)		# return from psw_idle
	br	%r14
1184 1185
.Lcleanup_idle_insn:
	.quad	.Lpsw_idle_lpsw
M
Martin Schwidefsky 已提交
1186

1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325
.Lcleanup_save_fpu_regs:
	tm	__LC_CPU_FLAGS+7,_CIF_FPU
	bor	%r14
	clg	%r9,BASED(.Lcleanup_save_fpu_regs_done)
	jhe	5f
	clg	%r9,BASED(.Lcleanup_save_fpu_regs_fp)
	jhe	4f
	clg	%r9,BASED(.Lcleanup_save_fpu_regs_vx_high)
	jhe	3f
	clg	%r9,BASED(.Lcleanup_save_fpu_regs_vx_low)
	jhe	2f
	clg	%r9,BASED(.Lcleanup_save_fpu_fpc_end)
	jhe	1f
0:	# Store floating-point controls
	stfpc	__FPU_fpc(%r2)
1:	# Load register save area and check if VX is active
	lg	%r3,__FPU_regs(%r2)
	ltgr	%r3,%r3
	jz	5f			  # no save area -> set CIF_FPU
	tm	__FPU_flags+3(%r2),FPU_USE_VX
	jz	4f			  # no VX -> store FP regs
2:	# Store vector registers (V0-V15)
	VSTM	%v0,%v15,0,%r3		  # vstm 0,15,0(3)
3:	# Store vector registers (V16-V31)
	VSTM	%v16,%v31,256,%r3	  # vstm 16,31,256(3)
	j	5f			  # -> done, set CIF_FPU flag
4:	# Store floating-point registers
	std	0,0(%r3)
	std	1,8(%r3)
	std	2,16(%r3)
	std	3,24(%r3)
	std	4,32(%r3)
	std	5,40(%r3)
	std	6,48(%r3)
	std	7,56(%r3)
	std	8,64(%r3)
	std	9,72(%r3)
	std	10,80(%r3)
	std	11,88(%r3)
	std	12,96(%r3)
	std	13,104(%r3)
	std	14,112(%r3)
	std	15,120(%r3)
5:	# Set CIF_FPU flag
	oi	__LC_CPU_FLAGS+7,_CIF_FPU
	lg	%r9,48(%r11)		# return from save_fpu_regs
	br	%r14
.Lcleanup_save_fpu_fpc_end:
	.quad	.Lsave_fpu_regs_fpc_end
.Lcleanup_save_fpu_regs_vx_low:
	.quad	.Lsave_fpu_regs_vx_low
.Lcleanup_save_fpu_regs_vx_high:
	.quad	.Lsave_fpu_regs_vx_high
.Lcleanup_save_fpu_regs_fp:
	.quad	.Lsave_fpu_regs_fp
.Lcleanup_save_fpu_regs_done:
	.quad	.Lsave_fpu_regs_done

.Lcleanup_load_fpu_regs:
	tm	__LC_CPU_FLAGS+7,_CIF_FPU
	bnor	%r14
	clg	%r9,BASED(.Lcleanup_load_fpu_regs_done)
	jhe	1f
	clg	%r9,BASED(.Lcleanup_load_fpu_regs_fp)
	jhe	2f
	clg	%r9,BASED(.Lcleanup_load_fpu_regs_fp_ctl)
	jhe	3f
	clg	%r9,BASED(.Lcleanup_load_fpu_regs_vx_high)
	jhe	4f
	clg	%r9,BASED(.Lcleanup_load_fpu_regs_vx)
	jhe	5f
	clg	%r9,BASED(.Lcleanup_load_fpu_regs_vx_ctl)
	jhe	6f
	lg	%r4,__TI_task(%r12)
	la	%r4,__THREAD_fpu(%r4)
	lfpc	__FPU_fpc(%r4)
	tm	__FPU_flags+3(%r4),FPU_USE_VX	# VX-enabled task ?
	lg	%r4,__FPU_regs(%r4)		# %r4 <- reg save area
	jz	3f				# -> no VX, load FP regs
6:	# Set VX-enablement control
	stctg	%c0,%c0,__SF_EMPTY+32(%r15)	# store CR0
	tm	__SF_EMPTY+32+5(%r15),2		# test VX control
	jo	5f
	oi	__SF_EMPTY+32+5(%r15),2		# set VX control
	lctlg	%c0,%c0,__SF_EMPTY+32(%r15)
5:	# Load V0 ..V15 registers
	VLM	%v0,%v15,0,%r4
4:	# Load V16..V31 registers
	VLM	%v16,%v31,256,%r4
	j	1f
3:	# Clear VX-enablement control for FP
	stctg	%c0,%c0,__SF_EMPTY+32(%r15)	# store CR0
	tm	__SF_EMPTY+32+5(%r15),2		# test VX control
	jz	2f
	ni	__SF_EMPTY+32+5(%r15),253	# clear VX control
	lctlg	%c0,%c0,__SF_EMPTY+32(%r15)
2:	# Load floating-point registers
	ld	0,0(%r4)
	ld	1,8(%r4)
	ld	2,16(%r4)
	ld	3,24(%r4)
	ld	4,32(%r4)
	ld	5,40(%r4)
	ld	6,48(%r4)
	ld	7,56(%r4)
	ld	8,64(%r4)
	ld	9,72(%r4)
	ld	10,80(%r4)
	ld	11,88(%r4)
	ld	12,96(%r4)
	ld	13,104(%r4)
	ld	14,112(%r4)
	ld	15,120(%r4)
1:	# Clear CIF_FPU bit
	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
	lg	%r9,48(%r11)		# return from load_fpu_regs
	br	%r14
.Lcleanup_load_fpu_regs_vx_ctl:
	.quad	.Lload_fpu_regs_vx_ctl
.Lcleanup_load_fpu_regs_vx:
	.quad	.Lload_fpu_regs_vx
.Lcleanup_load_fpu_regs_vx_high:
	.quad	.Lload_fpu_regs_vx_high
.Lcleanup_load_fpu_regs_fp_ctl:
	.quad	.Lload_fpu_regs_fp_ctl
.Lcleanup_load_fpu_regs_fp:
	.quad	.Lload_fpu_regs_fp
.Lcleanup_load_fpu_regs_done:
	.quad	.Lload_fpu_regs_done

.Lcleanup___ctl_set_vx:
	stctg	%c0,%c0,__SF_EMPTY(%r15)
	tm	__SF_EMPTY+5(%r15),2
	bor	%r14
	oi	__SF_EMPTY+5(%r15),2
	lctlg	%c0,%c0,__SF_EMPTY(%r15)
	lg	%r9,48(%r11)		# return from __ctl_set_vx
	br	%r14

L
Linus Torvalds 已提交
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/*
 * Integer constants
 */
1329
	.align	8
L
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.Lcritical_start:
1331
	.quad	.L__critical_start
1332
.Lcritical_length:
1333
	.quad	.L__critical_end - .L__critical_start
1334
#if IS_ENABLED(CONFIG_KVM)
1335
.Lsie_critical_start:
1336
	.quad	.Lsie_gmap
1337
.Lsie_critical_length:
1338
	.quad	.Lsie_done - .Lsie_gmap
1339 1340
#endif

H
Heiko Carstens 已提交
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	.section .rodata, "a"
#define SYSCALL(esame,emu)	.long esame
1343
	.globl	sys_call_table
L
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sys_call_table:
#include "syscalls.S"
#undef SYSCALL

1348
#ifdef CONFIG_COMPAT
L
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1349

H
Heiko Carstens 已提交
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#define SYSCALL(esame,emu)	.long emu
1351
	.globl	sys_call_table_emu
L
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sys_call_table_emu:
#include "syscalls.S"
#undef SYSCALL
#endif