/* * Internal interface between the core pin control system and the * pin config portions * * Copyright (C) 2011 ST-Ericsson SA * Written on behalf of Linaro for ST-Ericsson * Based on bits of regulator core, gpio core and clk core * * Author: Linus Walleij <linus.walleij@linaro.org> * * License terms: GNU General Public License (GPL) version 2 */#ifdef CONFIG_PINCONFintpinconf_check_ops(conststructpinconf_ops*ops);voidpinconf_init_device_debugfs(structdentry*devroot,structpinctrl_dev*pctldev);intpin_config_get_for_pin(structpinctrl_dev*pctldev,unsignedpin,unsignedlong*config);intpin_config_set_for_pin(structpinctrl_dev*pctldev,unsignedpin,unsignedlongconfig);#elsestaticinlineintpinconf_check_ops(conststructpinconf_ops*ops){return0;}staticinlinevoidpinconf_init_device_debugfs(structdentry*devroot,structpinctrl_dev*pctldev){}#endif