8250.c 84.6 KB
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/*
 *  linux/drivers/char/8250.c
 *
 *  Driver for 8250/16550-type serial ports
 *
 *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
 *
 *  Copyright (C) 2001 Russell King.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * A note about mapbase / membase
 *
 *  mapbase is the physical address of the IO port.
 *  membase is an 'ioremapped' cookie.
 */

#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/sysrq.h>
#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/tty.h>
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#include <linux/ratelimit.h>
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#include <linux/tty_flip.h>
#include <linux/serial_reg.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
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#include <linux/nmi.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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#include <asm/io.h>
#include <asm/irq.h>

#include "8250.h"

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#ifdef CONFIG_SPARC
#include "suncore.h"
#endif

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/*
 * Configuration:
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 *   share_irqs - whether we pass IRQF_SHARED to request_irq().  This option
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 *                is unsafe when used on edge-triggered interrupts.
 */
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static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
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static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;

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static struct uart_driver serial8250_reg;

static int serial_index(struct uart_port *port)
{
	return (serial8250_reg.minor - 64) + port->line;
}

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static unsigned int skip_txen_test; /* force skip of txen test at init time */

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/*
 * Debugging.
 */
#if 0
#define DEBUG_AUTOCONF(fmt...)	printk(fmt)
#else
#define DEBUG_AUTOCONF(fmt...)	do { } while (0)
#endif

#if 0
#define DEBUG_INTR(fmt...)	printk(fmt)
#else
#define DEBUG_INTR(fmt...)	do { } while (0)
#endif

#define PASS_LIMIT	256

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#define BOTH_EMPTY 	(UART_LSR_TEMT | UART_LSR_THRE)


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/*
 * We default to IRQ0 for the "no irq" hack.   Some
 * machine types want others as well - they're free
 * to redefine this in their header file.
 */
#define is_real_interrupt(irq)	((irq) != 0)

#ifdef CONFIG_SERIAL_8250_DETECT_IRQ
#define CONFIG_SERIAL_DETECT_IRQ 1
#endif
#ifdef CONFIG_SERIAL_8250_MANY_PORTS
#define CONFIG_SERIAL_MANY_PORTS 1
#endif

/*
 * HUB6 is always on.  This will be removed once the header
 * files have been cleaned.
 */
#define CONFIG_HUB6 1

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#include <asm/serial.h>
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/*
 * SERIAL_PORT_DFNS tells us about built-in ports that have no
 * standard enumeration mechanism.   Platforms that can find all
 * serial ports via mechanisms like ACPI or PCI need not supply it.
 */
#ifndef SERIAL_PORT_DFNS
#define SERIAL_PORT_DFNS
#endif

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static const struct old_serial_port old_serial_port[] = {
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	SERIAL_PORT_DFNS /* defined in asm/serial.h */
};

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#define UART_NR	CONFIG_SERIAL_8250_NR_UARTS
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#ifdef CONFIG_SERIAL_8250_RSA

#define PORT_RSA_MAX 4
static unsigned long probe_rsa[PORT_RSA_MAX];
static unsigned int probe_rsa_count;
#endif /* CONFIG_SERIAL_8250_RSA  */

struct uart_8250_port {
	struct uart_port	port;
	struct timer_list	timer;		/* "no irq" timer */
	struct list_head	list;		/* ports on this IRQ */
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	unsigned short		capabilities;	/* port capabilities */
	unsigned short		bugs;		/* port bugs */
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	unsigned int		tx_loadsz;	/* transmit fifo load size */
	unsigned char		acr;
	unsigned char		ier;
	unsigned char		lcr;
	unsigned char		mcr;
	unsigned char		mcr_mask;	/* mask of user bits */
	unsigned char		mcr_force;	/* mask of forced bits */
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	unsigned char		cur_iotype;	/* Running I/O type */
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	/*
	 * Some bits in registers are cleared on a read, so they must
	 * be saved whenever the register is read but the bits will not
	 * be immediately processed.
	 */
#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
	unsigned char		lsr_saved_flags;
#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
	unsigned char		msr_saved_flags;
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};

struct irq_info {
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	struct			hlist_node node;
	int			irq;
	spinlock_t		lock;	/* Protects list not the hash */
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	struct list_head	*head;
};

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#define NR_IRQ_HASH		32	/* Can be adjusted later */
static struct hlist_head irq_lists[NR_IRQ_HASH];
static DEFINE_MUTEX(hash_mutex);	/* Used to walk the hash */
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/*
 * Here we define the default xmit fifo size used for each type of UART.
 */
static const struct serial8250_config uart_config[] = {
	[PORT_UNKNOWN] = {
		.name		= "unknown",
		.fifo_size	= 1,
		.tx_loadsz	= 1,
	},
	[PORT_8250] = {
		.name		= "8250",
		.fifo_size	= 1,
		.tx_loadsz	= 1,
	},
	[PORT_16450] = {
		.name		= "16450",
		.fifo_size	= 1,
		.tx_loadsz	= 1,
	},
	[PORT_16550] = {
		.name		= "16550",
		.fifo_size	= 1,
		.tx_loadsz	= 1,
	},
	[PORT_16550A] = {
		.name		= "16550A",
		.fifo_size	= 16,
		.tx_loadsz	= 16,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
		.flags		= UART_CAP_FIFO,
	},
	[PORT_CIRRUS] = {
		.name		= "Cirrus",
		.fifo_size	= 1,
		.tx_loadsz	= 1,
	},
	[PORT_16650] = {
		.name		= "ST16650",
		.fifo_size	= 1,
		.tx_loadsz	= 1,
		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
	},
	[PORT_16650V2] = {
		.name		= "ST16650V2",
		.fifo_size	= 32,
		.tx_loadsz	= 16,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
				  UART_FCR_T_TRIG_00,
		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
	},
	[PORT_16750] = {
		.name		= "TI16750",
		.fifo_size	= 64,
		.tx_loadsz	= 64,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
				  UART_FCR7_64BYTE,
		.flags		= UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
	},
	[PORT_STARTECH] = {
		.name		= "Startech",
		.fifo_size	= 1,
		.tx_loadsz	= 1,
	},
	[PORT_16C950] = {
		.name		= "16C950/954",
		.fifo_size	= 128,
		.tx_loadsz	= 128,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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		/* UART_CAP_EFR breaks billionon CF bluetooth card. */
		.flags		= UART_CAP_FIFO | UART_CAP_SLEEP,
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	},
	[PORT_16654] = {
		.name		= "ST16654",
		.fifo_size	= 64,
		.tx_loadsz	= 32,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
				  UART_FCR_T_TRIG_10,
		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
	},
	[PORT_16850] = {
		.name		= "XR16850",
		.fifo_size	= 128,
		.tx_loadsz	= 128,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
	},
	[PORT_RSA] = {
		.name		= "RSA",
		.fifo_size	= 2048,
		.tx_loadsz	= 2048,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
		.flags		= UART_CAP_FIFO,
	},
	[PORT_NS16550A] = {
		.name		= "NS16550A",
		.fifo_size	= 16,
		.tx_loadsz	= 16,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
		.flags		= UART_CAP_FIFO | UART_NATSEMI,
	},
	[PORT_XSCALE] = {
		.name		= "XScale",
		.fifo_size	= 32,
		.tx_loadsz	= 32,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
		.flags		= UART_CAP_FIFO | UART_CAP_UUE,
	},
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	[PORT_RM9000] = {
		.name		= "RM9000",
		.fifo_size	= 16,
		.tx_loadsz	= 16,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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		.flags		= UART_CAP_FIFO,
	},
	[PORT_OCTEON] = {
		.name		= "OCTEON",
		.fifo_size	= 64,
		.tx_loadsz	= 64,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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		.flags		= UART_CAP_FIFO,
	},
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	[PORT_AR7] = {
		.name		= "AR7",
		.fifo_size	= 16,
		.tx_loadsz	= 16,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
		.flags		= UART_CAP_FIFO | UART_CAP_AFE,
	},
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	[PORT_U6_16550A] = {
		.name		= "U6_16550A",
		.fifo_size	= 64,
		.tx_loadsz	= 64,
		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
		.flags		= UART_CAP_FIFO | UART_CAP_AFE,
	},
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};

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#if defined(CONFIG_MIPS_ALCHEMY)
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/* Au1x00 UART hardware has a weird register layout */
static const u8 au_io_in_map[] = {
	[UART_RX]  = 0,
	[UART_IER] = 2,
	[UART_IIR] = 3,
	[UART_LCR] = 5,
	[UART_MCR] = 6,
	[UART_LSR] = 7,
	[UART_MSR] = 8,
};

static const u8 au_io_out_map[] = {
	[UART_TX]  = 1,
	[UART_IER] = 2,
	[UART_FCR] = 4,
	[UART_LCR] = 5,
	[UART_MCR] = 6,
};

/* sane hardware needs no mapping */
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static inline int map_8250_in_reg(struct uart_port *p, int offset)
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{
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	if (p->iotype != UPIO_AU)
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		return offset;
	return au_io_in_map[offset];
}

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static inline int map_8250_out_reg(struct uart_port *p, int offset)
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{
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	if (p->iotype != UPIO_AU)
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		return offset;
	return au_io_out_map[offset];
}

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#elif defined(CONFIG_SERIAL_8250_RM9K)
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static const u8
	regmap_in[8] = {
		[UART_RX]	= 0x00,
		[UART_IER]	= 0x0c,
		[UART_IIR]	= 0x14,
		[UART_LCR]	= 0x1c,
		[UART_MCR]	= 0x20,
		[UART_LSR]	= 0x24,
		[UART_MSR]	= 0x28,
		[UART_SCR]	= 0x2c
	},
	regmap_out[8] = {
		[UART_TX] 	= 0x04,
		[UART_IER]	= 0x0c,
		[UART_FCR]	= 0x18,
		[UART_LCR]	= 0x1c,
		[UART_MCR]	= 0x20,
		[UART_LSR]	= 0x24,
		[UART_MSR]	= 0x28,
		[UART_SCR]	= 0x2c
	};

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static inline int map_8250_in_reg(struct uart_port *p, int offset)
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{
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	if (p->iotype != UPIO_RM9000)
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		return offset;
	return regmap_in[offset];
}

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static inline int map_8250_out_reg(struct uart_port *p, int offset)
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{
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		return offset;
	return regmap_out[offset];
}

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#else

/* sane hardware needs no mapping */
#define map_8250_in_reg(up, offset) (offset)
#define map_8250_out_reg(up, offset) (offset)

#endif

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static unsigned int hub6_serial_in(struct uart_port *p, int offset)
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{
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	offset = map_8250_in_reg(p, offset) << p->regshift;
	outb(p->hub6 - 1 + offset, p->iobase);
	return inb(p->iobase + 1);
}
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static void hub6_serial_out(struct uart_port *p, int offset, int value)
{
	offset = map_8250_out_reg(p, offset) << p->regshift;
	outb(p->hub6 - 1 + offset, p->iobase);
	outb(value, p->iobase + 1);
}
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static unsigned int mem_serial_in(struct uart_port *p, int offset)
{
	offset = map_8250_in_reg(p, offset) << p->regshift;
	return readb(p->membase + offset);
}
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static void mem_serial_out(struct uart_port *p, int offset, int value)
{
	offset = map_8250_out_reg(p, offset) << p->regshift;
	writeb(value, p->membase + offset);
}

static void mem32_serial_out(struct uart_port *p, int offset, int value)
{
	offset = map_8250_out_reg(p, offset) << p->regshift;
	writel(value, p->membase + offset);
}

static unsigned int mem32_serial_in(struct uart_port *p, int offset)
{
	offset = map_8250_in_reg(p, offset) << p->regshift;
	return readl(p->membase + offset);
}
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static unsigned int au_serial_in(struct uart_port *p, int offset)
{
	offset = map_8250_in_reg(p, offset) << p->regshift;
	return __raw_readl(p->membase + offset);
}

static void au_serial_out(struct uart_port *p, int offset, int value)
{
	offset = map_8250_out_reg(p, offset) << p->regshift;
	__raw_writel(value, p->membase + offset);
}
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static unsigned int tsi_serial_in(struct uart_port *p, int offset)
{
	unsigned int tmp;
	offset = map_8250_in_reg(p, offset) << p->regshift;
	if (offset == UART_IIR) {
		tmp = readl(p->membase + (UART_IIR & ~3));
		return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
	} else
		return readb(p->membase + offset);
}
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static void tsi_serial_out(struct uart_port *p, int offset, int value)
{
	offset = map_8250_out_reg(p, offset) << p->regshift;
	if (!((offset == UART_IER) && (value & UART_IER_UUE)))
		writeb(value, p->membase + offset);
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}

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/* Save the LCR value so it can be re-written when a Busy Detect IRQ occurs. */
static inline void dwapb_save_out_value(struct uart_port *p, int offset,
					int value)
{
	struct uart_8250_port *up =
		container_of(p, struct uart_8250_port, port);

	if (offset == UART_LCR)
		up->lcr = value;
}

/* Read the IER to ensure any interrupt is cleared before returning from ISR. */
static inline void dwapb_check_clear_ier(struct uart_port *p, int offset)
{
	if (offset == UART_TX || offset == UART_IER)
		p->serial_in(p, UART_IER);
}

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static void dwapb_serial_out(struct uart_port *p, int offset, int value)
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{
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	int save_offset = offset;
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	offset = map_8250_out_reg(p, offset) << p->regshift;
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	dwapb_save_out_value(p, save_offset, value);
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	writeb(value, p->membase + offset);
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	dwapb_check_clear_ier(p, save_offset);
}

static void dwapb32_serial_out(struct uart_port *p, int offset, int value)
{
	int save_offset = offset;
	offset = map_8250_out_reg(p, offset) << p->regshift;
	dwapb_save_out_value(p, save_offset, value);
	writel(value, p->membase + offset);
	dwapb_check_clear_ier(p, save_offset);
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}
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static unsigned int io_serial_in(struct uart_port *p, int offset)
{
	offset = map_8250_in_reg(p, offset) << p->regshift;
	return inb(p->iobase + offset);
}

static void io_serial_out(struct uart_port *p, int offset, int value)
{
	offset = map_8250_out_reg(p, offset) << p->regshift;
	outb(value, p->iobase + offset);
}

static void set_io_from_upio(struct uart_port *p)
{
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	struct uart_8250_port *up =
		container_of(p, struct uart_8250_port, port);
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	switch (p->iotype) {
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	case UPIO_HUB6:
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		p->serial_in = hub6_serial_in;
		p->serial_out = hub6_serial_out;
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		break;

	case UPIO_MEM:
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		p->serial_in = mem_serial_in;
		p->serial_out = mem_serial_out;
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		break;

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	case UPIO_RM9000:
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	case UPIO_MEM32:
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		p->serial_in = mem32_serial_in;
		p->serial_out = mem32_serial_out;
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		break;

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	case UPIO_AU:
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		p->serial_in = au_serial_in;
		p->serial_out = au_serial_out;
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		break;
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	case UPIO_TSI:
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		p->serial_in = tsi_serial_in;
		p->serial_out = tsi_serial_out;
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		break;
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	case UPIO_DWAPB:
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		p->serial_in = mem_serial_in;
		p->serial_out = dwapb_serial_out;
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		break;

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	case UPIO_DWAPB32:
		p->serial_in = mem32_serial_in;
		p->serial_out = dwapb32_serial_out;
		break;

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	default:
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		p->serial_in = io_serial_in;
		p->serial_out = io_serial_out;
		break;
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	}
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	/* Remember loaded iotype */
	up->cur_iotype = p->iotype;
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}

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static void
serial_out_sync(struct uart_8250_port *up, int offset, int value)
{
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	struct uart_port *p = &up->port;
	switch (p->iotype) {
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	case UPIO_MEM:
	case UPIO_MEM32:
	case UPIO_AU:
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	case UPIO_DWAPB:
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	case UPIO_DWAPB32:
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		p->serial_out(p, offset, value);
		p->serial_in(p, UART_LCR);	/* safe, no side-effects */
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		break;
	default:
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		p->serial_out(p, offset, value);
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	}
}

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#define serial_in(up, offset)		\
	(up->port.serial_in(&(up)->port, (offset)))
#define serial_out(up, offset, value)	\
	(up->port.serial_out(&(up)->port, (offset), (value)))
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/*
 * We used to support using pause I/O for certain machines.  We
 * haven't supported this for a while, but just in case it's badly
 * needed for certain old 386 machines, I've left these #define's
 * in....
 */
#define serial_inp(up, offset)		serial_in(up, offset)
#define serial_outp(up, offset, value)	serial_out(up, offset, value)

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/* Uart divisor latch read */
static inline int _serial_dl_read(struct uart_8250_port *up)
{
	return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
}

/* Uart divisor latch write */
static inline void _serial_dl_write(struct uart_8250_port *up, int value)
{
	serial_outp(up, UART_DLL, value & 0xff);
	serial_outp(up, UART_DLM, value >> 8 & 0xff);
}

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#if defined(CONFIG_MIPS_ALCHEMY)
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/* Au1x00 haven't got a standard divisor latch */
static int serial_dl_read(struct uart_8250_port *up)
{
	if (up->port.iotype == UPIO_AU)
		return __raw_readl(up->port.membase + 0x28);
	else
		return _serial_dl_read(up);
}

static void serial_dl_write(struct uart_8250_port *up, int value)
{
	if (up->port.iotype == UPIO_AU)
		__raw_writel(value, up->port.membase + 0x28);
	else
		_serial_dl_write(up, value);
}
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#elif defined(CONFIG_SERIAL_8250_RM9K)
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static int serial_dl_read(struct uart_8250_port *up)
{
	return	(up->port.iotype == UPIO_RM9000) ?
		(((__raw_readl(up->port.membase + 0x10) << 8) |
		(__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
		_serial_dl_read(up);
}

static void serial_dl_write(struct uart_8250_port *up, int value)
{
	if (up->port.iotype == UPIO_RM9000) {
		__raw_writel(value, up->port.membase + 0x08);
		__raw_writel(value >> 8, up->port.membase + 0x10);
	} else {
		_serial_dl_write(up, value);
	}
}
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#else
#define serial_dl_read(up) _serial_dl_read(up)
#define serial_dl_write(up, value) _serial_dl_write(up, value)
#endif
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/*
 * For the 16C950
 */
static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
{
	serial_out(up, UART_SCR, offset);
	serial_out(up, UART_ICR, value);
}

static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
{
	unsigned int value;

	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
	serial_out(up, UART_SCR, offset);
	value = serial_in(up, UART_ICR);
	serial_icr_write(up, UART_ACR, up->acr);

	return value;
}

/*
 * FIFO support.
 */
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static void serial8250_clear_fifos(struct uart_8250_port *p)
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{
	if (p->capabilities & UART_CAP_FIFO) {
		serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
		serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
			       UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
		serial_outp(p, UART_FCR, 0);
	}
}

/*
 * IER sleep support.  UARTs which have EFRs need the "extended
 * capability" bit enabled.  Note that on XR16C850s, we need to
 * reset LCR to write to IER.
 */
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static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
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{
	if (p->capabilities & UART_CAP_SLEEP) {
		if (p->capabilities & UART_CAP_EFR) {
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			serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
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			serial_outp(p, UART_EFR, UART_EFR_ECB);
			serial_outp(p, UART_LCR, 0);
		}
		serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
		if (p->capabilities & UART_CAP_EFR) {
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			serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
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			serial_outp(p, UART_EFR, 0);
			serial_outp(p, UART_LCR, 0);
		}
	}
}

#ifdef CONFIG_SERIAL_8250_RSA
/*
 * Attempts to turn on the RSA FIFO.  Returns zero on failure.
 * We set the port uart clock rate if we succeed.
 */
static int __enable_rsa(struct uart_8250_port *up)
{
	unsigned char mode;
	int result;

	mode = serial_inp(up, UART_RSA_MSR);
	result = mode & UART_RSA_MSR_FIFO;

	if (!result) {
		serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
		mode = serial_inp(up, UART_RSA_MSR);
		result = mode & UART_RSA_MSR_FIFO;
	}

	if (result)
		up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;

	return result;
}

static void enable_rsa(struct uart_8250_port *up)
{
	if (up->port.type == PORT_RSA) {
		if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
			spin_lock_irq(&up->port.lock);
			__enable_rsa(up);
			spin_unlock_irq(&up->port.lock);
		}
		if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
			serial_outp(up, UART_RSA_FRR, 0);
	}
}

/*
 * Attempts to turn off the RSA FIFO.  Returns zero on failure.
 * It is unknown why interrupts were disabled in here.  However,
 * the caller is expected to preserve this behaviour by grabbing
 * the spinlock before calling this function.
 */
static void disable_rsa(struct uart_8250_port *up)
{
	unsigned char mode;
	int result;

	if (up->port.type == PORT_RSA &&
	    up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
		spin_lock_irq(&up->port.lock);

		mode = serial_inp(up, UART_RSA_MSR);
		result = !(mode & UART_RSA_MSR_FIFO);

		if (!result) {
			serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
			mode = serial_inp(up, UART_RSA_MSR);
			result = !(mode & UART_RSA_MSR_FIFO);
		}

		if (result)
			up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
		spin_unlock_irq(&up->port.lock);
	}
}
#endif /* CONFIG_SERIAL_8250_RSA */

/*
 * This is a quickie test to see how big the FIFO is.
 * It doesn't work at all the time, more's the pity.
 */
static int size_fifo(struct uart_8250_port *up)
{
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	unsigned char old_fcr, old_mcr, old_lcr;
	unsigned short old_dl;
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	int count;

	old_lcr = serial_inp(up, UART_LCR);
	serial_outp(up, UART_LCR, 0);
	old_fcr = serial_inp(up, UART_FCR);
	old_mcr = serial_inp(up, UART_MCR);
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
		    UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
	serial_outp(up, UART_MCR, UART_MCR_LOOP);
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	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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	old_dl = serial_dl_read(up);
	serial_dl_write(up, 0x0001);
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	serial_outp(up, UART_LCR, 0x03);
	for (count = 0; count < 256; count++)
		serial_outp(up, UART_TX, count);
	mdelay(20);/* FIXME - schedule_timeout */
	for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
	     (count < 256); count++)
		serial_inp(up, UART_RX);
	serial_outp(up, UART_FCR, old_fcr);
	serial_outp(up, UART_MCR, old_mcr);
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	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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	serial_dl_write(up, old_dl);
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	serial_outp(up, UART_LCR, old_lcr);

	return count;
}

/*
 * Read UART ID using the divisor method - set DLL and DLM to zero
 * and the revision will be in DLL and device type in DLM.  We
 * preserve the device state across this.
 */
static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
{
	unsigned char old_dll, old_dlm, old_lcr;
	unsigned int id;

	old_lcr = serial_inp(p, UART_LCR);
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	serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_A);
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	old_dll = serial_inp(p, UART_DLL);
	old_dlm = serial_inp(p, UART_DLM);

	serial_outp(p, UART_DLL, 0);
	serial_outp(p, UART_DLM, 0);

	id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;

	serial_outp(p, UART_DLL, old_dll);
	serial_outp(p, UART_DLM, old_dlm);
	serial_outp(p, UART_LCR, old_lcr);

	return id;
}

/*
 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
 * When this function is called we know it is at least a StarTech
 * 16650 V2, but it might be one of several StarTech UARTs, or one of
 * its clones.  (We treat the broken original StarTech 16650 V1 as a
 * 16550, and why not?  Startech doesn't seem to even acknowledge its
 * existence.)
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 *
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 * What evil have men's minds wrought...
 */
static void autoconfig_has_efr(struct uart_8250_port *up)
{
	unsigned int id1, id2, id3, rev;

	/*
	 * Everything with an EFR has SLEEP
	 */
	up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;

	/*
	 * First we check to see if it's an Oxford Semiconductor UART.
	 *
	 * If we have to do this here because some non-National
	 * Semiconductor clone chips lock up if you try writing to the
	 * LSR register (which serial_icr_read does)
	 */

	/*
	 * Check for Oxford Semiconductor 16C950.
	 *
	 * EFR [4] must be set else this test fails.
	 *
	 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
	 * claims that it's needed for 952 dual UART's (which are not
	 * recommended for new designs).
	 */
	up->acr = 0;
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	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
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	serial_out(up, UART_EFR, UART_EFR_ECB);
	serial_out(up, UART_LCR, 0x00);
	id1 = serial_icr_read(up, UART_ID1);
	id2 = serial_icr_read(up, UART_ID2);
	id3 = serial_icr_read(up, UART_ID3);
	rev = serial_icr_read(up, UART_REV);

	DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);

	if (id1 == 0x16 && id2 == 0xC9 &&
	    (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
		up->port.type = PORT_16C950;
879 880 881 882 883 884 885 886

		/*
		 * Enable work around for the Oxford Semiconductor 952 rev B
		 * chip which causes it to seriously miscalculate baud rates
		 * when DLL is 0.
		 */
		if (id3 == 0x52 && rev == 0x01)
			up->bugs |= UART_BUG_QUOT;
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		return;
	}
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	/*
	 * We check for a XR16C850 by setting DLL and DLM to 0, and then
	 * reading back DLL and DLM.  The chip type depends on the DLM
	 * value read back:
	 *  0x10 - XR16C850 and the DLL contains the chip revision.
	 *  0x12 - XR16C2850.
	 *  0x14 - XR16C854.
	 */
	id1 = autoconfig_read_divisor_id(up);
	DEBUG_AUTOCONF("850id=%04x ", id1);

	id2 = id1 >> 8;
	if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
		up->port.type = PORT_16850;
		return;
	}

	/*
	 * It wasn't an XR16C850.
	 *
	 * We distinguish between the '654 and the '650 by counting
	 * how many bytes are in the FIFO.  I'm using this for now,
	 * since that's the technique that was sent to me in the
	 * serial driver update, but I'm not convinced this works.
	 * I've had problems doing this in the past.  -TYT
	 */
	if (size_fifo(up) == 64)
		up->port.type = PORT_16654;
	else
		up->port.type = PORT_16650V2;
}

/*
 * We detected a chip without a FIFO.  Only two fall into
 * this category - the original 8250 and the 16450.  The
 * 16450 has a scratch register (accessible with LCR=0)
 */
static void autoconfig_8250(struct uart_8250_port *up)
{
	unsigned char scratch, status1, status2;

	up->port.type = PORT_8250;

	scratch = serial_in(up, UART_SCR);
	serial_outp(up, UART_SCR, 0xa5);
	status1 = serial_in(up, UART_SCR);
	serial_outp(up, UART_SCR, 0x5a);
	status2 = serial_in(up, UART_SCR);
	serial_outp(up, UART_SCR, scratch);

	if (status1 == 0xa5 && status2 == 0x5a)
		up->port.type = PORT_16450;
}

static int broken_efr(struct uart_8250_port *up)
{
	/*
	 * Exar ST16C2550 "A2" devices incorrectly detect as
	 * having an EFR, and report an ID of 0x0201.  See
949
	 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html 
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	 */
	if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
		return 1;

	return 0;
}

/*
 * We know that the chip has FIFOs.  Does it have an EFR?  The
 * EFR is located in the same register position as the IIR and
 * we know the top two bits of the IIR are currently set.  The
 * EFR should contain zero.  Try to read the EFR.
 */
static void autoconfig_16550a(struct uart_8250_port *up)
{
	unsigned char status1, status2;
	unsigned int iersave;

	up->port.type = PORT_16550A;
	up->capabilities |= UART_CAP_FIFO;

	/*
	 * Check for presence of the EFR when DLAB is set.
	 * Only ST16C650V1 UARTs pass this test.
	 */
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	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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	if (serial_in(up, UART_EFR) == 0) {
		serial_outp(up, UART_EFR, 0xA8);
		if (serial_in(up, UART_EFR) != 0) {
			DEBUG_AUTOCONF("EFRv1 ");
			up->port.type = PORT_16650;
			up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
		} else {
			DEBUG_AUTOCONF("Motorola 8xxx DUART ");
		}
		serial_outp(up, UART_EFR, 0);
		return;
	}

	/*
	 * Maybe it requires 0xbf to be written to the LCR.
	 * (other ST16C650V2 UARTs, TI16C752A, etc)
	 */
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	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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	if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
		DEBUG_AUTOCONF("EFRv2 ");
		autoconfig_has_efr(up);
		return;
	}

	/*
	 * Check for a National Semiconductor SuperIO chip.
	 * Attempt to switch to bank 2, read the value of the LOOP bit
	 * from EXCR1. Switch back to bank 0, change it in MCR. Then
	 * switch back to bank 2, read it from EXCR1 again and check
	 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
	 */
	serial_outp(up, UART_LCR, 0);
	status1 = serial_in(up, UART_MCR);
	serial_outp(up, UART_LCR, 0xE0);
	status2 = serial_in(up, 0x02); /* EXCR1 */

	if (!((status2 ^ status1) & UART_MCR_LOOP)) {
		serial_outp(up, UART_LCR, 0);
		serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
		serial_outp(up, UART_LCR, 0xE0);
		status2 = serial_in(up, 0x02); /* EXCR1 */
		serial_outp(up, UART_LCR, 0);
		serial_outp(up, UART_MCR, status1);

		if ((status2 ^ status1) & UART_MCR_LOOP) {
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			unsigned short quot;

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			serial_outp(up, UART_LCR, 0xE0);
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			quot = serial_dl_read(up);
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			quot <<= 3;

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			status1 = serial_in(up, 0x04); /* EXCR2 */
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			status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
			status1 |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
			serial_outp(up, 0x04, status1);
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			serial_dl_write(up, quot);
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			serial_outp(up, UART_LCR, 0);

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			up->port.uartclk = 921600*16;
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			up->port.type = PORT_NS16550A;
			up->capabilities |= UART_NATSEMI;
			return;
		}
	}

	/*
	 * No EFR.  Try to detect a TI16750, which only sets bit 5 of
	 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
	 * Try setting it with and without DLAB set.  Cheap clones
	 * set bit 5 without DLAB set.
	 */
	serial_outp(up, UART_LCR, 0);
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
	status1 = serial_in(up, UART_IIR) >> 5;
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
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	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
	status2 = serial_in(up, UART_IIR) >> 5;
	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
	serial_outp(up, UART_LCR, 0);

	DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);

	if (status1 == 6 && status2 == 7) {
		up->port.type = PORT_16750;
		up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
		return;
	}

	/*
	 * Try writing and reading the UART_IER_UUE bit (b6).
	 * If it works, this is probably one of the Xscale platform's
	 * internal UARTs.
	 * We're going to explicitly set the UUE bit to 0 before
	 * trying to write and read a 1 just to make sure it's not
	 * already a 1 and maybe locked there before we even start start.
	 */
	iersave = serial_in(up, UART_IER);
	serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
	if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
		/*
		 * OK it's in a known zero state, try writing and reading
		 * without disturbing the current state of the other bits.
		 */
		serial_outp(up, UART_IER, iersave | UART_IER_UUE);
		if (serial_in(up, UART_IER) & UART_IER_UUE) {
			/*
			 * It's an Xscale.
			 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
			 */
			DEBUG_AUTOCONF("Xscale ");
			up->port.type = PORT_XSCALE;
			up->capabilities |= UART_CAP_UUE;
			return;
		}
	} else {
		/*
		 * If we got here we couldn't force the IER_UUE bit to 0.
		 * Log it and continue.
		 */
		DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
	}
	serial_outp(up, UART_IER, iersave);
1102 1103 1104 1105 1106 1107 1108 1109 1110

	/*
	 * We distinguish between 16550A and U6 16550A by counting
	 * how many bytes are in the FIFO.
	 */
	if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
		up->port.type = PORT_U6_16550A;
		up->capabilities |= UART_CAP_AFE;
	}
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1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128
}

/*
 * This routine is called by rs_init() to initialize a specific serial
 * port.  It determines what type of UART chip this serial port is
 * using: 8250, 16450, 16550, 16550A.  The important question is
 * whether or not this UART is a 16550A or not, since this will
 * determine whether or not we can use its FIFO features or not.
 */
static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
{
	unsigned char status1, scratch, scratch2, scratch3;
	unsigned char save_lcr, save_mcr;
	unsigned long flags;

	if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
		return;

1129
	DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1130
		       serial_index(&up->port), up->port.iobase, up->port.membase);
L
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1131 1132 1133 1134 1135 1136 1137 1138

	/*
	 * We really do need global IRQs disabled here - we're going to
	 * be frobbing the chips IRQ enable register to see if it exists.
	 */
	spin_lock_irqsave(&up->port.lock, flags);

	up->capabilities = 0;
1139
	up->bugs = 0;
L
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1140 1141 1142 1143 1144

	if (!(up->port.flags & UPF_BUGGY_UART)) {
		/*
		 * Do a simple existence test first; if we fail this,
		 * there's no point trying anything else.
T
Thomas Koeller 已提交
1145
		 *
L
Linus Torvalds 已提交
1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159
		 * 0x80 is used as a nonsense port to prevent against
		 * false positives due to ISA bus float.  The
		 * assumption is that 0x80 is a non-existent port;
		 * which should be safe since include/asm/io.h also
		 * makes this assumption.
		 *
		 * Note: this is safe as long as MCR bit 4 is clear
		 * and the device is in "PC" mode.
		 */
		scratch = serial_inp(up, UART_IER);
		serial_outp(up, UART_IER, 0);
#ifdef __i386__
		outb(0xff, 0x080);
#endif
1160 1161 1162 1163 1164
		/*
		 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
		 * 16C754B) allow only to modify them if an EFR bit is set.
		 */
		scratch2 = serial_inp(up, UART_IER) & 0x0f;
L
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1165 1166 1167 1168
		serial_outp(up, UART_IER, 0x0F);
#ifdef __i386__
		outb(0, 0x080);
#endif
1169
		scratch3 = serial_inp(up, UART_IER) & 0x0f;
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1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183
		serial_outp(up, UART_IER, scratch);
		if (scratch2 != 0 || scratch3 != 0x0F) {
			/*
			 * We failed; there's nothing here
			 */
			DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
				       scratch2, scratch3);
			goto out;
		}
	}

	save_mcr = serial_in(up, UART_MCR);
	save_lcr = serial_in(up, UART_LCR);

T
Thomas Koeller 已提交
1184
	/*
L
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1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206
	 * Check to see if a UART is really there.  Certain broken
	 * internal modems based on the Rockwell chipset fail this
	 * test, because they apparently don't implement the loopback
	 * test mode.  So this test is skipped on the COM 1 through
	 * COM 4 ports.  This *should* be safe, since no board
	 * manufacturer would be stupid enough to design a board
	 * that conflicts with COM 1-4 --- we hope!
	 */
	if (!(up->port.flags & UPF_SKIP_TEST)) {
		serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
		status1 = serial_inp(up, UART_MSR) & 0xF0;
		serial_outp(up, UART_MCR, save_mcr);
		if (status1 != 0x90) {
			DEBUG_AUTOCONF("LOOP test failed (%02x) ",
				       status1);
			goto out;
		}
	}

	/*
	 * We're pretty sure there's a port here.  Lets find out what
	 * type of port it is.  The IIR top two bits allows us to find
R
Russell King 已提交
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	 * out if it's 8250 or 16450, 16550, 16550A or later.  This
L
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1208 1209 1210 1211 1212
	 * determines what we test for next.
	 *
	 * We also initialise the EFR (if any) to zero for later.  The
	 * EFR occupies the same register location as the FCR and IIR.
	 */
1213
	serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252
	serial_outp(up, UART_EFR, 0);
	serial_outp(up, UART_LCR, 0);

	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
	scratch = serial_in(up, UART_IIR) >> 6;

	DEBUG_AUTOCONF("iir=%d ", scratch);

	switch (scratch) {
	case 0:
		autoconfig_8250(up);
		break;
	case 1:
		up->port.type = PORT_UNKNOWN;
		break;
	case 2:
		up->port.type = PORT_16550;
		break;
	case 3:
		autoconfig_16550a(up);
		break;
	}

#ifdef CONFIG_SERIAL_8250_RSA
	/*
	 * Only probe for RSA ports if we got the region.
	 */
	if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
		int i;

		for (i = 0 ; i < probe_rsa_count; ++i) {
			if (probe_rsa[i] == up->port.iobase &&
			    __enable_rsa(up)) {
				up->port.type = PORT_RSA;
				break;
			}
		}
	}
#endif
1253

L
Linus Torvalds 已提交
1254 1255 1256 1257 1258
	serial_outp(up, UART_LCR, save_lcr);

	if (up->capabilities != uart_config[up->port.type].flags) {
		printk(KERN_WARNING
		       "ttyS%d: detected caps %08x should be %08x\n",
1259 1260
		       serial_index(&up->port), up->capabilities,
		       uart_config[up->port.type].flags);
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Linus Torvalds 已提交
1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278
	}

	up->port.fifosize = uart_config[up->port.type].fifo_size;
	up->capabilities = uart_config[up->port.type].flags;
	up->tx_loadsz = uart_config[up->port.type].tx_loadsz;

	if (up->port.type == PORT_UNKNOWN)
		goto out;

	/*
	 * Reset the UART.
	 */
#ifdef CONFIG_SERIAL_8250_RSA
	if (up->port.type == PORT_RSA)
		serial_outp(up, UART_RSA_FRR, 0);
#endif
	serial_outp(up, UART_MCR, save_mcr);
	serial8250_clear_fifos(up);
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Alex Williamson 已提交
1279
	serial_in(up, UART_RX);
1280 1281 1282 1283
	if (up->capabilities & UART_CAP_UUE)
		serial_outp(up, UART_IER, UART_IER_UUE);
	else
		serial_outp(up, UART_IER, 0);
L
Linus Torvalds 已提交
1284

T
Thomas Koeller 已提交
1285
 out:
L
Linus Torvalds 已提交
1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309
	spin_unlock_irqrestore(&up->port.lock, flags);
	DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
}

static void autoconfig_irq(struct uart_8250_port *up)
{
	unsigned char save_mcr, save_ier;
	unsigned char save_ICP = 0;
	unsigned int ICP = 0;
	unsigned long irqs;
	int irq;

	if (up->port.flags & UPF_FOURPORT) {
		ICP = (up->port.iobase & 0xfe0) | 0x1f;
		save_ICP = inb_p(ICP);
		outb_p(0x80, ICP);
		(void) inb_p(ICP);
	}

	/* forget possible initially masked and pending IRQ */
	probe_irq_off(probe_irq_on());
	save_mcr = serial_inp(up, UART_MCR);
	save_ier = serial_inp(up, UART_IER);
	serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
T
Thomas Koeller 已提交
1310

L
Linus Torvalds 已提交
1311 1312
	irqs = probe_irq_on();
	serial_outp(up, UART_MCR, 0);
A
Alan Cox 已提交
1313 1314
	udelay(10);
	if (up->port.flags & UPF_FOURPORT) {
L
Linus Torvalds 已提交
1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326
		serial_outp(up, UART_MCR,
			    UART_MCR_DTR | UART_MCR_RTS);
	} else {
		serial_outp(up, UART_MCR,
			    UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
	}
	serial_outp(up, UART_IER, 0x0f);	/* enable all intrs */
	(void)serial_inp(up, UART_LSR);
	(void)serial_inp(up, UART_RX);
	(void)serial_inp(up, UART_IIR);
	(void)serial_inp(up, UART_MSR);
	serial_outp(up, UART_TX, 0xFF);
A
Alan Cox 已提交
1327
	udelay(20);
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Linus Torvalds 已提交
1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338
	irq = probe_irq_off(irqs);

	serial_outp(up, UART_MCR, save_mcr);
	serial_outp(up, UART_IER, save_ier);

	if (up->port.flags & UPF_FOURPORT)
		outb_p(save_ICP, ICP);

	up->port.irq = (irq > 0) ? irq : 0;
}

1339 1340 1341 1342 1343 1344 1345 1346
static inline void __stop_tx(struct uart_8250_port *p)
{
	if (p->ier & UART_IER_THRI) {
		p->ier &= ~UART_IER_THRI;
		serial_out(p, UART_IER, p->ier);
	}
}

1347
static void serial8250_stop_tx(struct uart_port *port)
L
Linus Torvalds 已提交
1348
{
1349 1350
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
1351

1352
	__stop_tx(up);
L
Linus Torvalds 已提交
1353 1354

	/*
1355
	 * We really want to stop the transmitter from sending.
L
Linus Torvalds 已提交
1356
	 */
1357
	if (up->port.type == PORT_16C950) {
L
Linus Torvalds 已提交
1358 1359 1360 1361 1362
		up->acr |= UART_ACR_TXDIS;
		serial_icr_write(up, UART_ACR, up->acr);
	}
}

1363 1364
static void transmit_chars(struct uart_8250_port *up);

1365
static void serial8250_start_tx(struct uart_port *port)
L
Linus Torvalds 已提交
1366
{
1367 1368
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
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1369 1370 1371 1372

	if (!(up->ier & UART_IER_THRI)) {
		up->ier |= UART_IER_THRI;
		serial_out(up, UART_IER, up->ier);
1373

1374
		if (up->bugs & UART_BUG_TXEN) {
1375
			unsigned char lsr;
1376
			lsr = serial_in(up, UART_LSR);
1377
			up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
T
Thomas Koeller 已提交
1378
			if ((up->port.type == PORT_RM9000) ?
1379 1380
				(lsr & UART_LSR_THRE) :
				(lsr & UART_LSR_TEMT))
1381 1382
				transmit_chars(up);
		}
L
Linus Torvalds 已提交
1383
	}
1384

L
Linus Torvalds 已提交
1385
	/*
1386
	 * Re-enable the transmitter if we disabled it.
L
Linus Torvalds 已提交
1387
	 */
1388
	if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
L
Linus Torvalds 已提交
1389 1390 1391 1392 1393 1394 1395
		up->acr &= ~UART_ACR_TXDIS;
		serial_icr_write(up, UART_ACR, up->acr);
	}
}

static void serial8250_stop_rx(struct uart_port *port)
{
1396 1397
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
1398 1399 1400 1401 1402 1403 1404 1405

	up->ier &= ~UART_IER_RLSI;
	up->port.read_status_mask &= ~UART_LSR_DR;
	serial_out(up, UART_IER, up->ier);
}

static void serial8250_enable_ms(struct uart_port *port)
{
1406 1407
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
1408

1409 1410 1411 1412
	/* no MSR capabilities */
	if (up->bugs & UART_BUG_NOMSR)
		return;

L
Linus Torvalds 已提交
1413 1414 1415 1416
	up->ier |= UART_IER_MSI;
	serial_out(up, UART_IER, up->ier);
}

R
Russell King 已提交
1417
static void
1418
receive_chars(struct uart_8250_port *up, unsigned int *status)
L
Linus Torvalds 已提交
1419
{
A
Alan Cox 已提交
1420
	struct tty_struct *tty = up->port.state->port.tty;
L
Linus Torvalds 已提交
1421 1422 1423 1424 1425
	unsigned char ch, lsr = *status;
	int max_count = 256;
	char flag;

	do {
1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437
		if (likely(lsr & UART_LSR_DR))
			ch = serial_inp(up, UART_RX);
		else
			/*
			 * Intel 82571 has a Serial Over Lan device that will
			 * set UART_LSR_BI without setting UART_LSR_DR when
			 * it receives a break. To avoid reading from the
			 * receive buffer without UART_LSR_DR bit set, we
			 * just force the read character to be 0
			 */
			ch = 0;

L
Linus Torvalds 已提交
1438 1439 1440
		flag = TTY_NORMAL;
		up->port.icount.rx++;

1441 1442
		lsr |= up->lsr_saved_flags;
		up->lsr_saved_flags = 0;
L
Linus Torvalds 已提交
1443

1444
		if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
L
Linus Torvalds 已提交
1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466
			/*
			 * For statistics only
			 */
			if (lsr & UART_LSR_BI) {
				lsr &= ~(UART_LSR_FE | UART_LSR_PE);
				up->port.icount.brk++;
				/*
				 * We do the SysRQ and SAK checking
				 * here because otherwise the break
				 * may get masked by ignore_status_mask
				 * or read_status_mask.
				 */
				if (uart_handle_break(&up->port))
					goto ignore_char;
			} else if (lsr & UART_LSR_PE)
				up->port.icount.parity++;
			else if (lsr & UART_LSR_FE)
				up->port.icount.frame++;
			if (lsr & UART_LSR_OE)
				up->port.icount.overrun++;

			/*
1467
			 * Mask off conditions which should be ignored.
L
Linus Torvalds 已提交
1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478
			 */
			lsr &= up->port.read_status_mask;

			if (lsr & UART_LSR_BI) {
				DEBUG_INTR("handling break....");
				flag = TTY_BREAK;
			} else if (lsr & UART_LSR_PE)
				flag = TTY_PARITY;
			else if (lsr & UART_LSR_FE)
				flag = TTY_FRAME;
		}
1479
		if (uart_handle_sysrq_char(&up->port, ch))
L
Linus Torvalds 已提交
1480
			goto ignore_char;
1481 1482 1483

		uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);

A
Alan Cox 已提交
1484
ignore_char:
L
Linus Torvalds 已提交
1485
		lsr = serial_inp(up, UART_LSR);
1486
	} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
L
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1487 1488 1489 1490 1491 1492
	spin_unlock(&up->port.lock);
	tty_flip_buffer_push(tty);
	spin_lock(&up->port.lock);
	*status = lsr;
}

R
Russell King 已提交
1493
static void transmit_chars(struct uart_8250_port *up)
L
Linus Torvalds 已提交
1494
{
A
Alan Cox 已提交
1495
	struct circ_buf *xmit = &up->port.state->xmit;
L
Linus Torvalds 已提交
1496 1497 1498 1499 1500 1501 1502 1503
	int count;

	if (up->port.x_char) {
		serial_outp(up, UART_TX, up->port.x_char);
		up->port.icount.tx++;
		up->port.x_char = 0;
		return;
	}
1504 1505 1506 1507 1508
	if (uart_tx_stopped(&up->port)) {
		serial8250_stop_tx(&up->port);
		return;
	}
	if (uart_circ_empty(xmit)) {
1509
		__stop_tx(up);
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Linus Torvalds 已提交
1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527
		return;
	}

	count = up->tx_loadsz;
	do {
		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		up->port.icount.tx++;
		if (uart_circ_empty(xmit))
			break;
	} while (--count > 0);

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(&up->port);

	DEBUG_INTR("THRE...");

	if (uart_circ_empty(xmit))
1528
		__stop_tx(up);
L
Linus Torvalds 已提交
1529 1530
}

1531
static unsigned int check_modem_status(struct uart_8250_port *up)
L
Linus Torvalds 已提交
1532
{
1533 1534
	unsigned int status = serial_in(up, UART_MSR);

1535 1536
	status |= up->msr_saved_flags;
	up->msr_saved_flags = 0;
1537
	if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
A
Alan Cox 已提交
1538
	    up->port.state != NULL) {
1539 1540 1541 1542 1543 1544 1545 1546 1547
		if (status & UART_MSR_TERI)
			up->port.icount.rng++;
		if (status & UART_MSR_DDSR)
			up->port.icount.dsr++;
		if (status & UART_MSR_DDCD)
			uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
		if (status & UART_MSR_DCTS)
			uart_handle_cts_change(&up->port, status & UART_MSR_CTS);

1548
		wake_up_interruptible(&up->port.state->port.delta_msr_wait);
1549
	}
L
Linus Torvalds 已提交
1550

1551
	return status;
L
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1552 1553 1554 1555 1556
}

/*
 * This handles the interrupt from one port.
 */
1557
static void serial8250_handle_port(struct uart_8250_port *up)
L
Linus Torvalds 已提交
1558
{
1559
	unsigned int status;
1560
	unsigned long flags;
1561

1562
	spin_lock_irqsave(&up->port.lock, flags);
1563 1564

	status = serial_inp(up, UART_LSR);
L
Linus Torvalds 已提交
1565 1566 1567

	DEBUG_INTR("status = %x...", status);

1568
	if (status & (UART_LSR_DR | UART_LSR_BI))
1569
		receive_chars(up, &status);
L
Linus Torvalds 已提交
1570 1571 1572
	check_modem_status(up);
	if (status & UART_LSR_THRE)
		transmit_chars(up);
1573

1574
	spin_unlock_irqrestore(&up->port.lock, flags);
L
Linus Torvalds 已提交
1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590
}

/*
 * This is the serial driver's interrupt routine.
 *
 * Arjan thinks the old way was overly complex, so it got simplified.
 * Alan disagrees, saying that need the complexity to handle the weird
 * nature of ISA shared interrupts.  (This is a special exception.)
 *
 * In order to handle ISA shared interrupts properly, we need to check
 * that all ports have been serviced, and therefore the ISA interrupt
 * line has been de-asserted.
 *
 * This means we need to loop through all ports. checking that they
 * don't have an interrupt pending.
 */
1591
static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
L
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1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609
{
	struct irq_info *i = dev_id;
	struct list_head *l, *end = NULL;
	int pass_counter = 0, handled = 0;

	DEBUG_INTR("serial8250_interrupt(%d)...", irq);

	spin_lock(&i->lock);

	l = i->head;
	do {
		struct uart_8250_port *up;
		unsigned int iir;

		up = list_entry(l, struct uart_8250_port, list);

		iir = serial_in(up, UART_IIR);
		if (!(iir & UART_IIR_NO_INT)) {
1610
			serial8250_handle_port(up);
L
Linus Torvalds 已提交
1611 1612 1613

			handled = 1;

M
Marc St-Jean 已提交
1614
			end = NULL;
1615 1616
		} else if ((up->port.iotype == UPIO_DWAPB ||
			    up->port.iotype == UPIO_DWAPB32) &&
M
Marc St-Jean 已提交
1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627
			  (iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
			/* The DesignWare APB UART has an Busy Detect (0x07)
			 * interrupt meaning an LCR write attempt occured while the
			 * UART was busy. The interrupt must be cleared by reading
			 * the UART status register (USR) and the LCR re-written. */
			unsigned int status;
			status = *(volatile u32 *)up->port.private_data;
			serial_out(up, UART_LCR, up->lcr);

			handled = 1;

L
Linus Torvalds 已提交
1628 1629 1630 1631 1632 1633 1634 1635
			end = NULL;
		} else if (end == NULL)
			end = l;

		l = l->next;

		if (l == i->head && pass_counter++ > PASS_LIMIT) {
			/* If we hit this, we're dead. */
1636 1637
			printk_ratelimited(KERN_ERR
				"serial8250: too much work for irq%d\n", irq);
L
Linus Torvalds 已提交
1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668
			break;
		}
	} while (l != end);

	spin_unlock(&i->lock);

	DEBUG_INTR("end.\n");

	return IRQ_RETVAL(handled);
}

/*
 * To support ISA shared interrupts, we need to have one interrupt
 * handler that ensures that the IRQ line has been deasserted
 * before returning.  Failing to do this will result in the IRQ
 * line being stuck active, and, since ISA irqs are edge triggered,
 * no more IRQs will be seen.
 */
static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
{
	spin_lock_irq(&i->lock);

	if (!list_empty(i->head)) {
		if (i->head == &up->list)
			i->head = i->head->next;
		list_del(&up->list);
	} else {
		BUG_ON(i->head != &up->list);
		i->head = NULL;
	}
	spin_unlock_irq(&i->lock);
A
Alan Cox 已提交
1669 1670 1671 1672 1673
	/* List empty so throw away the hash node */
	if (i->head == NULL) {
		hlist_del(&i->node);
		kfree(i);
	}
L
Linus Torvalds 已提交
1674 1675 1676 1677
}

static int serial_link_irq_chain(struct uart_8250_port *up)
{
A
Alan Cox 已提交
1678 1679 1680
	struct hlist_head *h;
	struct hlist_node *n;
	struct irq_info *i;
1681
	int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
L
Linus Torvalds 已提交
1682

A
Alan Cox 已提交
1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704
	mutex_lock(&hash_mutex);

	h = &irq_lists[up->port.irq % NR_IRQ_HASH];

	hlist_for_each(n, h) {
		i = hlist_entry(n, struct irq_info, node);
		if (i->irq == up->port.irq)
			break;
	}

	if (n == NULL) {
		i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
		if (i == NULL) {
			mutex_unlock(&hash_mutex);
			return -ENOMEM;
		}
		spin_lock_init(&i->lock);
		i->irq = up->port.irq;
		hlist_add_head(&i->node, h);
	}
	mutex_unlock(&hash_mutex);

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Linus Torvalds 已提交
1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715
	spin_lock_irq(&i->lock);

	if (i->head) {
		list_add(&up->list, i->head);
		spin_unlock_irq(&i->lock);

		ret = 0;
	} else {
		INIT_LIST_HEAD(&up->list);
		i->head = &up->list;
		spin_unlock_irq(&i->lock);
1716
		irq_flags |= up->port.irqflags;
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Linus Torvalds 已提交
1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727
		ret = request_irq(up->port.irq, serial8250_interrupt,
				  irq_flags, "serial", i);
		if (ret < 0)
			serial_do_unlink(i, up);
	}

	return ret;
}

static void serial_unlink_irq_chain(struct uart_8250_port *up)
{
A
Alan Cox 已提交
1728 1729 1730
	struct irq_info *i;
	struct hlist_node *n;
	struct hlist_head *h;
L
Linus Torvalds 已提交
1731

A
Alan Cox 已提交
1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742
	mutex_lock(&hash_mutex);

	h = &irq_lists[up->port.irq % NR_IRQ_HASH];

	hlist_for_each(n, h) {
		i = hlist_entry(n, struct irq_info, node);
		if (i->irq == up->port.irq)
			break;
	}

	BUG_ON(n == NULL);
L
Linus Torvalds 已提交
1743 1744 1745 1746 1747 1748
	BUG_ON(i->head == NULL);

	if (list_empty(i->head))
		free_irq(up->port.irq, i);

	serial_do_unlink(i, up);
A
Alan Cox 已提交
1749
	mutex_unlock(&hash_mutex);
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Linus Torvalds 已提交
1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763
}

/*
 * This function is used to handle ports that do not have an
 * interrupt.  This doesn't work very well for 16450's, but gives
 * barely passable results for a 16550A.  (Although at the expense
 * of much CPU overhead).
 */
static void serial8250_timeout(unsigned long data)
{
	struct uart_8250_port *up = (struct uart_8250_port *)data;
	unsigned int iir;

	iir = serial_in(up, UART_IIR);
1764
	if (!(iir & UART_IIR_NO_INT))
1765
		serial8250_handle_port(up);
1766
	mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
A
Alex Williamson 已提交
1767 1768 1769 1770 1771
}

static void serial8250_backup_timeout(unsigned long data)
{
	struct uart_8250_port *up = (struct uart_8250_port *)data;
1772 1773
	unsigned int iir, ier = 0, lsr;
	unsigned long flags;
A
Alex Williamson 已提交
1774 1775 1776 1777 1778 1779 1780 1781 1782

	/*
	 * Must disable interrupts or else we risk racing with the interrupt
	 * based handler.
	 */
	if (is_real_interrupt(up->port.irq)) {
		ier = serial_in(up, UART_IER);
		serial_out(up, UART_IER, 0);
	}
L
Linus Torvalds 已提交
1783

A
Alex Williamson 已提交
1784 1785 1786 1787 1788 1789 1790 1791
	iir = serial_in(up, UART_IIR);

	/*
	 * This should be a safe test for anyone who doesn't trust the
	 * IIR bits on their UART, but it's specifically designed for
	 * the "Diva" UART used on the management processor on many HP
	 * ia64 and parisc boxes.
	 */
1792 1793 1794 1795
	spin_lock_irqsave(&up->port.lock, flags);
	lsr = serial_in(up, UART_LSR);
	up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
	spin_unlock_irqrestore(&up->port.lock, flags);
A
Alex Williamson 已提交
1796
	if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
A
Alan Cox 已提交
1797
	    (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1798
	    (lsr & UART_LSR_THRE)) {
A
Alex Williamson 已提交
1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809
		iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
		iir |= UART_IIR_THRI;
	}

	if (!(iir & UART_IIR_NO_INT))
		serial8250_handle_port(up);

	if (is_real_interrupt(up->port.irq))
		serial_out(up, UART_IER, ier);

	/* Standard timer interval plus 0.2s to keep the port running */
A
Alan Cox 已提交
1810
	mod_timer(&up->timer,
1811
		jiffies + uart_poll_timeout(&up->port) + HZ / 5);
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Linus Torvalds 已提交
1812 1813 1814 1815
}

static unsigned int serial8250_tx_empty(struct uart_port *port)
{
1816 1817
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
1818
	unsigned long flags;
1819
	unsigned int lsr;
L
Linus Torvalds 已提交
1820 1821

	spin_lock_irqsave(&up->port.lock, flags);
1822 1823
	lsr = serial_in(up, UART_LSR);
	up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
L
Linus Torvalds 已提交
1824 1825
	spin_unlock_irqrestore(&up->port.lock, flags);

1826
	return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
L
Linus Torvalds 已提交
1827 1828 1829 1830
}

static unsigned int serial8250_get_mctrl(struct uart_port *port)
{
1831 1832
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
1833
	unsigned int status;
L
Linus Torvalds 已提交
1834 1835
	unsigned int ret;

1836
	status = check_modem_status(up);
L
Linus Torvalds 已提交
1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851

	ret = 0;
	if (status & UART_MSR_DCD)
		ret |= TIOCM_CAR;
	if (status & UART_MSR_RI)
		ret |= TIOCM_RNG;
	if (status & UART_MSR_DSR)
		ret |= TIOCM_DSR;
	if (status & UART_MSR_CTS)
		ret |= TIOCM_CTS;
	return ret;
}

static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
1852 1853
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873
	unsigned char mcr = 0;

	if (mctrl & TIOCM_RTS)
		mcr |= UART_MCR_RTS;
	if (mctrl & TIOCM_DTR)
		mcr |= UART_MCR_DTR;
	if (mctrl & TIOCM_OUT1)
		mcr |= UART_MCR_OUT1;
	if (mctrl & TIOCM_OUT2)
		mcr |= UART_MCR_OUT2;
	if (mctrl & TIOCM_LOOP)
		mcr |= UART_MCR_LOOP;

	mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;

	serial_out(up, UART_MCR, mcr);
}

static void serial8250_break_ctl(struct uart_port *port, int break_state)
{
1874 1875
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886
	unsigned long flags;

	spin_lock_irqsave(&up->port.lock, flags);
	if (break_state == -1)
		up->lcr |= UART_LCR_SBC;
	else
		up->lcr &= ~UART_LCR_SBC;
	serial_out(up, UART_LCR, up->lcr);
	spin_unlock_irqrestore(&up->port.lock, flags);
}

A
Alex Williamson 已提交
1887 1888 1889
/*
 *	Wait for transmitter & holding register to empty
 */
1890
static void wait_for_xmitr(struct uart_8250_port *up, int bits)
A
Alex Williamson 已提交
1891 1892 1893 1894
{
	unsigned int status, tmout = 10000;

	/* Wait up to 10ms for the character(s) to be sent. */
1895
	for (;;) {
A
Alex Williamson 已提交
1896 1897
		status = serial_in(up, UART_LSR);

1898
		up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
A
Alex Williamson 已提交
1899

1900 1901
		if ((status & bits) == bits)
			break;
A
Alex Williamson 已提交
1902 1903 1904
		if (--tmout == 0)
			break;
		udelay(1);
1905
	}
A
Alex Williamson 已提交
1906 1907 1908

	/* Wait up to 1s for flow control if necessary */
	if (up->port.flags & UPF_CONS_FLOW) {
1909 1910 1911 1912 1913 1914
		unsigned int tmout;
		for (tmout = 1000000; tmout; tmout--) {
			unsigned int msr = serial_in(up, UART_MSR);
			up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
			if (msr & UART_MSR_CTS)
				break;
A
Alex Williamson 已提交
1915 1916 1917 1918 1919 1920
			udelay(1);
			touch_nmi_watchdog();
		}
	}
}

J
Jason Wessel 已提交
1921 1922 1923 1924 1925 1926 1927 1928
#ifdef CONFIG_CONSOLE_POLL
/*
 * Console polling routines for writing and reading from the uart while
 * in an interrupt or debug context.
 */

static int serial8250_get_poll_char(struct uart_port *port)
{
1929 1930
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
J
Jason Wessel 已提交
1931 1932
	unsigned char lsr = serial_inp(up, UART_LSR);

1933 1934
	if (!(lsr & UART_LSR_DR))
		return NO_POLL_CHAR;
J
Jason Wessel 已提交
1935 1936 1937 1938 1939 1940 1941 1942 1943

	return serial_inp(up, UART_RX);
}


static void serial8250_put_poll_char(struct uart_port *port,
			 unsigned char c)
{
	unsigned int ier;
1944 1945
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
J
Jason Wessel 已提交
1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976

	/*
	 *	First save the IER then disable the interrupts
	 */
	ier = serial_in(up, UART_IER);
	if (up->capabilities & UART_CAP_UUE)
		serial_out(up, UART_IER, UART_IER_UUE);
	else
		serial_out(up, UART_IER, 0);

	wait_for_xmitr(up, BOTH_EMPTY);
	/*
	 *	Send the character out.
	 *	If a LF, also do CR...
	 */
	serial_out(up, UART_TX, c);
	if (c == 10) {
		wait_for_xmitr(up, BOTH_EMPTY);
		serial_out(up, UART_TX, 13);
	}

	/*
	 *	Finally, wait for transmitter to become empty
	 *	and restore the IER
	 */
	wait_for_xmitr(up, BOTH_EMPTY);
	serial_out(up, UART_IER, ier);
}

#endif /* CONFIG_CONSOLE_POLL */

L
Linus Torvalds 已提交
1977 1978
static int serial8250_startup(struct uart_port *port)
{
1979 1980
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
1981
	unsigned long flags;
1982
	unsigned char lsr, iir;
L
Linus Torvalds 已提交
1983 1984
	int retval;

O
Ondrej Puzman 已提交
1985 1986
	up->port.fifosize = uart_config[up->port.type].fifo_size;
	up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
L
Linus Torvalds 已提交
1987 1988 1989
	up->capabilities = uart_config[up->port.type].flags;
	up->mcr = 0;

A
Alan Cox 已提交
1990 1991 1992
	if (up->port.iotype != up->cur_iotype)
		set_io_from_upio(port);

L
Linus Torvalds 已提交
1993 1994 1995
	if (up->port.type == PORT_16C950) {
		/* Wake up and initialize UART */
		up->acr = 0;
1996
		serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
L
Linus Torvalds 已提交
1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015
		serial_outp(up, UART_EFR, UART_EFR_ECB);
		serial_outp(up, UART_IER, 0);
		serial_outp(up, UART_LCR, 0);
		serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
		serial_outp(up, UART_LCR, 0xBF);
		serial_outp(up, UART_EFR, UART_EFR_ECB);
		serial_outp(up, UART_LCR, 0);
	}

#ifdef CONFIG_SERIAL_8250_RSA
	/*
	 * If this is an RSA port, see if we can kick it up to the
	 * higher speed clock.
	 */
	enable_rsa(up);
#endif

	/*
	 * Clear the FIFO buffers and disable them.
A
Alexey Dobriyan 已提交
2016
	 * (they will be reenabled in set_termios())
L
Linus Torvalds 已提交
2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034
	 */
	serial8250_clear_fifos(up);

	/*
	 * Clear the interrupt registers.
	 */
	(void) serial_inp(up, UART_LSR);
	(void) serial_inp(up, UART_RX);
	(void) serial_inp(up, UART_IIR);
	(void) serial_inp(up, UART_MSR);

	/*
	 * At this point, there's no way the LSR could still be 0xff;
	 * if it is, then bail out, because there's likely no UART
	 * here.
	 */
	if (!(up->port.flags & UPF_BUGGY_UART) &&
	    (serial_inp(up, UART_LSR) == 0xff)) {
2035 2036
		printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
		       serial_index(&up->port));
L
Linus Torvalds 已提交
2037 2038 2039 2040 2041 2042 2043 2044 2045
		return -ENODEV;
	}

	/*
	 * For a XR16C850, we need to set the trigger levels
	 */
	if (up->port.type == PORT_16850) {
		unsigned char fctr;

2046
		serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
L
Linus Torvalds 已提交
2047 2048 2049 2050 2051 2052 2053 2054 2055 2056

		fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
		serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
		serial_outp(up, UART_TRG, UART_TRG_96);
		serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
		serial_outp(up, UART_TRG, UART_TRG_96);

		serial_outp(up, UART_LCR, 0);
	}

A
Alex Williamson 已提交
2057
	if (is_real_interrupt(up->port.irq)) {
2058
		unsigned char iir1;
A
Alex Williamson 已提交
2059 2060 2061 2062 2063 2064 2065 2066
		/*
		 * Test for UARTs that do not reassert THRE when the
		 * transmitter is idle and the interrupt has already
		 * been cleared.  Real 16550s should always reassert
		 * this interrupt whenever the transmitter is idle and
		 * the interrupt is enabled.  Delays are necessary to
		 * allow register changes to become visible.
		 */
B
Borislav Petkov 已提交
2067
		spin_lock_irqsave(&up->port.lock, flags);
2068
		if (up->port.irqflags & IRQF_SHARED)
2069
			disable_irq_nosync(up->port.irq);
A
Alex Williamson 已提交
2070 2071 2072 2073

		wait_for_xmitr(up, UART_LSR_THRE);
		serial_out_sync(up, UART_IER, UART_IER_THRI);
		udelay(1); /* allow THRE to set */
2074
		iir1 = serial_in(up, UART_IIR);
A
Alex Williamson 已提交
2075 2076 2077 2078 2079 2080
		serial_out(up, UART_IER, 0);
		serial_out_sync(up, UART_IER, UART_IER_THRI);
		udelay(1); /* allow a working UART time to re-assert THRE */
		iir = serial_in(up, UART_IIR);
		serial_out(up, UART_IER, 0);

2081
		if (up->port.irqflags & IRQF_SHARED)
2082
			enable_irq(up->port.irq);
B
Borislav Petkov 已提交
2083
		spin_unlock_irqrestore(&up->port.lock, flags);
A
Alex Williamson 已提交
2084 2085 2086 2087 2088

		/*
		 * If the interrupt is not reasserted, setup a timer to
		 * kick the UART on a regular basis.
		 */
2089
		if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
2090
			up->bugs |= UART_BUG_THRE;
2091 2092
			pr_debug("ttyS%d - using backup timer\n",
				 serial_index(port));
A
Alex Williamson 已提交
2093 2094 2095
		}
	}

2096 2097 2098 2099 2100 2101 2102 2103
	/*
	 * The above check will only give an accurate result the first time
	 * the port is opened so this value needs to be preserved.
	 */
	if (up->bugs & UART_BUG_THRE) {
		up->timer.function = serial8250_backup_timeout;
		up->timer.data = (unsigned long)up;
		mod_timer(&up->timer, jiffies +
2104
			uart_poll_timeout(port) + HZ / 5);
2105 2106
	}

L
Linus Torvalds 已提交
2107 2108 2109 2110 2111 2112 2113
	/*
	 * If the "interrupt" for this port doesn't correspond with any
	 * hardware interrupt, we use a timer-based system.  The original
	 * driver used to do this with IRQ0.
	 */
	if (!is_real_interrupt(up->port.irq)) {
		up->timer.data = (unsigned long)up;
2114
		mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
L
Linus Torvalds 已提交
2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137
	} else {
		retval = serial_link_irq_chain(up);
		if (retval)
			return retval;
	}

	/*
	 * Now, initialize the UART
	 */
	serial_outp(up, UART_LCR, UART_LCR_WLEN8);

	spin_lock_irqsave(&up->port.lock, flags);
	if (up->port.flags & UPF_FOURPORT) {
		if (!is_real_interrupt(up->port.irq))
			up->port.mctrl |= TIOCM_OUT1;
	} else
		/*
		 * Most PC uarts need OUT2 raised to enable interrupts.
		 */
		if (is_real_interrupt(up->port.irq))
			up->port.mctrl |= TIOCM_OUT2;

	serial8250_set_mctrl(&up->port, up->port.mctrl);
2138

2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149
	/* Serial over Lan (SoL) hack:
	   Intel 8257x Gigabit ethernet chips have a
	   16550 emulation, to be used for Serial Over Lan.
	   Those chips take a longer time than a normal
	   serial device to signalize that a transmission
	   data was queued. Due to that, the above test generally
	   fails. One solution would be to delay the reading of
	   iir. However, this is not reliable, since the timeout
	   is variable. So, let's just don't test if we receive
	   TX irq. This way, we'll never enable UART_BUG_TXEN.
	 */
2150
	if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2151 2152
		goto dont_test_tx_en;

2153 2154 2155 2156 2157 2158 2159 2160 2161 2162
	/*
	 * Do a quick test to see if we receive an
	 * interrupt when we enable the TX irq.
	 */
	serial_outp(up, UART_IER, UART_IER_THRI);
	lsr = serial_in(up, UART_LSR);
	iir = serial_in(up, UART_IIR);
	serial_outp(up, UART_IER, 0);

	if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2163 2164
		if (!(up->bugs & UART_BUG_TXEN)) {
			up->bugs |= UART_BUG_TXEN;
2165
			pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2166
				 serial_index(port));
2167 2168
		}
	} else {
2169
		up->bugs &= ~UART_BUG_TXEN;
2170 2171
	}

2172
dont_test_tx_en:
L
Linus Torvalds 已提交
2173 2174
	spin_unlock_irqrestore(&up->port.lock, flags);

2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186
	/*
	 * Clear the interrupt registers again for luck, and clear the
	 * saved flags to avoid getting false values from polling
	 * routines or the previous session.
	 */
	serial_inp(up, UART_LSR);
	serial_inp(up, UART_RX);
	serial_inp(up, UART_IIR);
	serial_inp(up, UART_MSR);
	up->lsr_saved_flags = 0;
	up->msr_saved_flags = 0;

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2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209
	/*
	 * Finally, enable interrupts.  Note: Modem status interrupts
	 * are set via set_termios(), which will be occurring imminently
	 * anyway, so we don't enable them here.
	 */
	up->ier = UART_IER_RLSI | UART_IER_RDI;
	serial_outp(up, UART_IER, up->ier);

	if (up->port.flags & UPF_FOURPORT) {
		unsigned int icp;
		/*
		 * Enable interrupts on the AST Fourport board
		 */
		icp = (up->port.iobase & 0xfe0) | 0x01f;
		outb_p(0x80, icp);
		(void) inb_p(icp);
	}

	return 0;
}

static void serial8250_shutdown(struct uart_port *port)
{
2210 2211
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249
	unsigned long flags;

	/*
	 * Disable interrupts from this port
	 */
	up->ier = 0;
	serial_outp(up, UART_IER, 0);

	spin_lock_irqsave(&up->port.lock, flags);
	if (up->port.flags & UPF_FOURPORT) {
		/* reset interrupts on the AST Fourport board */
		inb((up->port.iobase & 0xfe0) | 0x1f);
		up->port.mctrl |= TIOCM_OUT1;
	} else
		up->port.mctrl &= ~TIOCM_OUT2;

	serial8250_set_mctrl(&up->port, up->port.mctrl);
	spin_unlock_irqrestore(&up->port.lock, flags);

	/*
	 * Disable break condition and FIFOs
	 */
	serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
	serial8250_clear_fifos(up);

#ifdef CONFIG_SERIAL_8250_RSA
	/*
	 * Reset the RSA board back to 115kbps compat mode.
	 */
	disable_rsa(up);
#endif

	/*
	 * Read data port to reset things, and then unlink from
	 * the IRQ chain.
	 */
	(void) serial_in(up, UART_RX);

A
Alex Williamson 已提交
2250 2251 2252
	del_timer_sync(&up->timer);
	up->timer.function = serial8250_timeout;
	if (is_real_interrupt(up->port.irq))
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Linus Torvalds 已提交
2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275
		serial_unlink_irq_chain(up);
}

static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
{
	unsigned int quot;

	/*
	 * Handle magic divisors for baud rates above baud_base on
	 * SMSC SuperIO chips.
	 */
	if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
	    baud == (port->uartclk/4))
		quot = 0x8001;
	else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
		 baud == (port->uartclk/8))
		quot = 0x8002;
	else
		quot = uart_get_divisor(port, baud);

	return quot;
}

2276 2277 2278
void
serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
		          struct ktermios *old)
L
Linus Torvalds 已提交
2279
{
2280 2281
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
2282 2283 2284 2285 2286 2287
	unsigned char cval, fcr = 0;
	unsigned long flags;
	unsigned int baud, quot;

	switch (termios->c_cflag & CSIZE) {
	case CS5:
2288
		cval = UART_LCR_WLEN5;
L
Linus Torvalds 已提交
2289 2290
		break;
	case CS6:
2291
		cval = UART_LCR_WLEN6;
L
Linus Torvalds 已提交
2292 2293
		break;
	case CS7:
2294
		cval = UART_LCR_WLEN7;
L
Linus Torvalds 已提交
2295 2296 2297
		break;
	default:
	case CS8:
2298
		cval = UART_LCR_WLEN8;
L
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2299 2300 2301 2302
		break;
	}

	if (termios->c_cflag & CSTOPB)
2303
		cval |= UART_LCR_STOP;
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2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315
	if (termios->c_cflag & PARENB)
		cval |= UART_LCR_PARITY;
	if (!(termios->c_cflag & PARODD))
		cval |= UART_LCR_EPAR;
#ifdef CMSPAR
	if (termios->c_cflag & CMSPAR)
		cval |= UART_LCR_SPAR;
#endif

	/*
	 * Ask the core to calculate the divisor for us.
	 */
2316 2317 2318
	baud = uart_get_baud_rate(port, termios, old,
				  port->uartclk / 16 / 0xffff,
				  port->uartclk / 16);
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2319 2320 2321
	quot = serial8250_get_divisor(port, baud);

	/*
2322
	 * Oxford Semi 952 rev B workaround
L
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2323
	 */
2324
	if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
A
Alan Cox 已提交
2325
		quot++;
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2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389

	if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
		if (baud < 2400)
			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
		else
			fcr = uart_config[up->port.type].fcr;
	}

	/*
	 * MCR-based auto flow control.  When AFE is enabled, RTS will be
	 * deasserted when the receive FIFO contains more characters than
	 * the trigger, or the MCR RTS bit is cleared.  In the case where
	 * the remote UART is not using CTS auto flow control, we must
	 * have sufficient FIFO entries for the latency of the remote
	 * UART to respond.  IOW, at least 32 bytes of FIFO.
	 */
	if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
		up->mcr &= ~UART_MCR_AFE;
		if (termios->c_cflag & CRTSCTS)
			up->mcr |= UART_MCR_AFE;
	}

	/*
	 * Ok, we're now changing the port state.  Do it with
	 * interrupts disabled.
	 */
	spin_lock_irqsave(&up->port.lock, flags);

	/*
	 * Update the per-port timeout.
	 */
	uart_update_timeout(port, termios->c_cflag, baud);

	up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
	if (termios->c_iflag & INPCK)
		up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
	if (termios->c_iflag & (BRKINT | PARMRK))
		up->port.read_status_mask |= UART_LSR_BI;

	/*
	 * Characteres to ignore
	 */
	up->port.ignore_status_mask = 0;
	if (termios->c_iflag & IGNPAR)
		up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
	if (termios->c_iflag & IGNBRK) {
		up->port.ignore_status_mask |= UART_LSR_BI;
		/*
		 * If we're ignoring parity and break indicators,
		 * ignore overruns too (for real raw support).
		 */
		if (termios->c_iflag & IGNPAR)
			up->port.ignore_status_mask |= UART_LSR_OE;
	}

	/*
	 * ignore all characters if CREAD is not set
	 */
	if ((termios->c_cflag & CREAD) == 0)
		up->port.ignore_status_mask |= UART_LSR_DR;

	/*
	 * CTS flow control flag and modem status interrupts
	 */
2390
	up->ier &= ~UART_IER_MSI;
2391 2392
	if (!(up->bugs & UART_BUG_NOMSR) &&
			UART_ENABLE_MS(&up->port, termios->c_cflag))
L
Linus Torvalds 已提交
2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408
		up->ier |= UART_IER_MSI;
	if (up->capabilities & UART_CAP_UUE)
		up->ier |= UART_IER_UUE | UART_IER_RTOIE;

	serial_out(up, UART_IER, up->ier);

	if (up->capabilities & UART_CAP_EFR) {
		unsigned char efr = 0;
		/*
		 * TI16C752/Startech hardware flow control.  FIXME:
		 * - TI16C752 requires control thresholds to be set.
		 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
		 */
		if (termios->c_cflag & CRTSCTS)
			efr |= UART_EFR_CTS;

2409
		serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
L
Linus Torvalds 已提交
2410 2411 2412
		serial_outp(up, UART_EFR, efr);
	}

2413
#ifdef CONFIG_ARCH_OMAP
2414
	/* Workaround to enable 115200 baud on OMAP1510 internal ports */
2415
	if (cpu_is_omap1510() && is_omap_port(up)) {
2416 2417 2418 2419 2420 2421 2422 2423
		if (baud == 115200) {
			quot = 1;
			serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
		} else
			serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
	}
#endif

L
Linus Torvalds 已提交
2424 2425 2426 2427 2428 2429 2430
	if (up->capabilities & UART_NATSEMI) {
		/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
		serial_outp(up, UART_LCR, 0xe0);
	} else {
		serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
	}

2431
	serial_dl_write(up, quot);
L
Linus Torvalds 已提交
2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450

	/*
	 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
	 * is written without DLAB set, this mode will be disabled.
	 */
	if (up->port.type == PORT_16750)
		serial_outp(up, UART_FCR, fcr);

	serial_outp(up, UART_LCR, cval);		/* reset DLAB */
	up->lcr = cval;					/* Save LCR */
	if (up->port.type != PORT_16750) {
		if (fcr & UART_FCR_ENABLE_FIFO) {
			/* emulated UARTs (Lucent Venus 167x) need two steps */
			serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
		}
		serial_outp(up, UART_FCR, fcr);		/* set fcr */
	}
	serial8250_set_mctrl(&up->port, up->port.mctrl);
	spin_unlock_irqrestore(&up->port.lock, flags);
A
Alan Cox 已提交
2451 2452 2453
	/* Don't rewrite B0 */
	if (tty_termios_baud_rate(termios))
		tty_termios_encode_baud_rate(termios, baud, baud);
L
Linus Torvalds 已提交
2454
}
2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465
EXPORT_SYMBOL(serial8250_do_set_termios);

static void
serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
		       struct ktermios *old)
{
	if (port->set_termios)
		port->set_termios(port, termios, old);
	else
		serial8250_do_set_termios(port, termios, old);
}
L
Linus Torvalds 已提交
2466

2467
static void
A
Arnd Bergmann 已提交
2468
serial8250_set_ldisc(struct uart_port *port, int new)
2469
{
A
Arnd Bergmann 已提交
2470
	if (new == N_PPS) {
2471 2472 2473 2474 2475 2476
		port->flags |= UPF_HARDPPS_CD;
		serial8250_enable_ms(port);
	} else
		port->flags &= ~UPF_HARDPPS_CD;
}

2477 2478 2479

void serial8250_do_pm(struct uart_port *port, unsigned int state,
		      unsigned int oldstate)
L
Linus Torvalds 已提交
2480
{
2481 2482
	struct uart_8250_port *p =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
2483 2484

	serial8250_set_sleep(p, state != 0);
2485 2486
}
EXPORT_SYMBOL(serial8250_do_pm);
L
Linus Torvalds 已提交
2487

2488 2489 2490 2491 2492 2493 2494 2495
static void
serial8250_pm(struct uart_port *port, unsigned int state,
	      unsigned int oldstate)
{
	if (port->pm)
		port->pm(port, state, oldstate);
	else
		serial8250_do_pm(port, state, oldstate);
L
Linus Torvalds 已提交
2496 2497
}

2498 2499 2500
static unsigned int serial8250_port_size(struct uart_8250_port *pt)
{
	if (pt->port.iotype == UPIO_AU)
2501
		return 0x1000;
2502 2503 2504 2505 2506 2507 2508
#ifdef CONFIG_ARCH_OMAP
	if (is_omap_port(pt))
		return 0x16 << pt->port.regshift;
#endif
	return 8 << pt->port.regshift;
}

L
Linus Torvalds 已提交
2509 2510 2511 2512 2513
/*
 * Resource handling.
 */
static int serial8250_request_std_resource(struct uart_8250_port *up)
{
2514
	unsigned int size = serial8250_port_size(up);
L
Linus Torvalds 已提交
2515 2516 2517
	int ret = 0;

	switch (up->port.iotype) {
2518
	case UPIO_AU:
2519 2520
	case UPIO_TSI:
	case UPIO_MEM32:
L
Linus Torvalds 已提交
2521
	case UPIO_MEM:
M
Marc St-Jean 已提交
2522
	case UPIO_DWAPB:
2523
	case UPIO_DWAPB32:
L
Linus Torvalds 已提交
2524 2525 2526 2527 2528 2529 2530 2531 2532
		if (!up->port.mapbase)
			break;

		if (!request_mem_region(up->port.mapbase, size, "serial")) {
			ret = -EBUSY;
			break;
		}

		if (up->port.flags & UPF_IOREMAP) {
2533 2534
			up->port.membase = ioremap_nocache(up->port.mapbase,
									size);
L
Linus Torvalds 已提交
2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552
			if (!up->port.membase) {
				release_mem_region(up->port.mapbase, size);
				ret = -ENOMEM;
			}
		}
		break;

	case UPIO_HUB6:
	case UPIO_PORT:
		if (!request_region(up->port.iobase, size, "serial"))
			ret = -EBUSY;
		break;
	}
	return ret;
}

static void serial8250_release_std_resource(struct uart_8250_port *up)
{
2553
	unsigned int size = serial8250_port_size(up);
L
Linus Torvalds 已提交
2554 2555

	switch (up->port.iotype) {
2556
	case UPIO_AU:
2557 2558
	case UPIO_TSI:
	case UPIO_MEM32:
L
Linus Torvalds 已提交
2559
	case UPIO_MEM:
M
Marc St-Jean 已提交
2560
	case UPIO_DWAPB:
2561
	case UPIO_DWAPB32:
L
Linus Torvalds 已提交
2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583
		if (!up->port.mapbase)
			break;

		if (up->port.flags & UPF_IOREMAP) {
			iounmap(up->port.membase);
			up->port.membase = NULL;
		}

		release_mem_region(up->port.mapbase, size);
		break;

	case UPIO_HUB6:
	case UPIO_PORT:
		release_region(up->port.iobase, size);
		break;
	}
}

static int serial8250_request_rsa_resource(struct uart_8250_port *up)
{
	unsigned long start = UART_RSA_BASE << up->port.regshift;
	unsigned int size = 8 << up->port.regshift;
2584
	int ret = -EINVAL;
L
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2585 2586 2587 2588 2589

	switch (up->port.iotype) {
	case UPIO_HUB6:
	case UPIO_PORT:
		start += up->port.iobase;
2590 2591 2592
		if (request_region(start, size, "serial-rsa"))
			ret = 0;
		else
L
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2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614
			ret = -EBUSY;
		break;
	}

	return ret;
}

static void serial8250_release_rsa_resource(struct uart_8250_port *up)
{
	unsigned long offset = UART_RSA_BASE << up->port.regshift;
	unsigned int size = 8 << up->port.regshift;

	switch (up->port.iotype) {
	case UPIO_HUB6:
	case UPIO_PORT:
		release_region(up->port.iobase + offset, size);
		break;
	}
}

static void serial8250_release_port(struct uart_port *port)
{
2615 2616
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
2617 2618 2619 2620 2621 2622 2623 2624

	serial8250_release_std_resource(up);
	if (up->port.type == PORT_RSA)
		serial8250_release_rsa_resource(up);
}

static int serial8250_request_port(struct uart_port *port)
{
2625 2626
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640
	int ret = 0;

	ret = serial8250_request_std_resource(up);
	if (ret == 0 && up->port.type == PORT_RSA) {
		ret = serial8250_request_rsa_resource(up);
		if (ret < 0)
			serial8250_release_std_resource(up);
	}

	return ret;
}

static void serial8250_config_port(struct uart_port *port, int flags)
{
2641 2642
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
L
Linus Torvalds 已提交
2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657
	int probeflags = PROBE_ANY;
	int ret;

	/*
	 * Find the region that we can probe for.  This in turn
	 * tells us whether we can probe for the type of port.
	 */
	ret = serial8250_request_std_resource(up);
	if (ret < 0)
		return;

	ret = serial8250_request_rsa_resource(up);
	if (ret < 0)
		probeflags &= ~PROBE_RSA;

A
Alan Cox 已提交
2658 2659 2660
	if (up->port.iotype != up->cur_iotype)
		set_io_from_upio(port);

L
Linus Torvalds 已提交
2661 2662
	if (flags & UART_CONFIG_TYPE)
		autoconfig(up, probeflags);
2663 2664 2665 2666 2667

	/* if access method is AU, it is a 16550 with a quirk */
	if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
		up->bugs |= UART_BUG_NOMSR;

L
Linus Torvalds 已提交
2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679
	if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
		autoconfig_irq(up);

	if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
		serial8250_release_rsa_resource(up);
	if (up->port.type == PORT_UNKNOWN)
		serial8250_release_std_resource(up);
}

static int
serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
{
Y
Yinghai Lu 已提交
2680
	if (ser->irq >= nr_irqs || ser->irq < 0 ||
L
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	    ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
	    ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
	    ser->type == PORT_STARTECH)
		return -EINVAL;
	return 0;
}

static const char *
serial8250_type(struct uart_port *port)
{
	int type = port->type;

	if (type >= ARRAY_SIZE(uart_config))
		type = 0;
	return uart_config[type].name;
}

static struct uart_ops serial8250_pops = {
	.tx_empty	= serial8250_tx_empty,
	.set_mctrl	= serial8250_set_mctrl,
	.get_mctrl	= serial8250_get_mctrl,
	.stop_tx	= serial8250_stop_tx,
	.start_tx	= serial8250_start_tx,
	.stop_rx	= serial8250_stop_rx,
	.enable_ms	= serial8250_enable_ms,
	.break_ctl	= serial8250_break_ctl,
	.startup	= serial8250_startup,
	.shutdown	= serial8250_shutdown,
	.set_termios	= serial8250_set_termios,
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	.set_ldisc	= serial8250_set_ldisc,
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	.pm		= serial8250_pm,
	.type		= serial8250_type,
	.release_port	= serial8250_release_port,
	.request_port	= serial8250_request_port,
	.config_port	= serial8250_config_port,
	.verify_port	= serial8250_verify_port,
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#ifdef CONFIG_CONSOLE_POLL
	.poll_get_char = serial8250_get_poll_char,
	.poll_put_char = serial8250_put_poll_char,
#endif
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};

static struct uart_8250_port serial8250_ports[UART_NR];

2725 2726 2727 2728 2729 2730 2731 2732 2733 2734
static void (*serial8250_isa_config)(int port, struct uart_port *up,
	unsigned short *capabilities);

void serial8250_set_isa_configurator(
	void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
{
	serial8250_isa_config = v;
}
EXPORT_SYMBOL(serial8250_set_isa_configurator);

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static void __init serial8250_isa_init_ports(void)
{
	struct uart_8250_port *up;
	static int first = 1;
2739
	int i, irqflag = 0;
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	if (!first)
		return;
	first = 0;

2745
	for (i = 0; i < nr_uarts; i++) {
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		struct uart_8250_port *up = &serial8250_ports[i];

		up->port.line = i;
		spin_lock_init(&up->port.lock);

		init_timer(&up->timer);
		up->timer.function = serial8250_timeout;

		/*
		 * ALPHA_KLUDGE_MCR needs to be killed.
		 */
		up->mcr_mask = ~ALPHA_KLUDGE_MCR;
		up->mcr_force = ALPHA_KLUDGE_MCR;

		up->port.ops = &serial8250_pops;
	}

2763 2764 2765
	if (share_irqs)
		irqflag = IRQF_SHARED;

2766
	for (i = 0, up = serial8250_ports;
2767
	     i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
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	     i++, up++) {
		up->port.iobase   = old_serial_port[i].port;
		up->port.irq      = irq_canonicalize(old_serial_port[i].irq);
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		up->port.irqflags = old_serial_port[i].irqflags;
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		up->port.uartclk  = old_serial_port[i].baud_base * 16;
		up->port.flags    = old_serial_port[i].flags;
		up->port.hub6     = old_serial_port[i].hub6;
		up->port.membase  = old_serial_port[i].iomem_base;
		up->port.iotype   = old_serial_port[i].io_type;
		up->port.regshift = old_serial_port[i].iomem_reg_shift;
2778
		set_io_from_upio(&up->port);
2779
		up->port.irqflags |= irqflag;
2780 2781 2782
		if (serial8250_isa_config != NULL)
			serial8250_isa_config(i, &up->port, &up->capabilities);

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	}
}

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static void
serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
{
	up->port.type = type;
	up->port.fifosize = uart_config[type].fifo_size;
	up->capabilities = uart_config[type].flags;
	up->tx_loadsz = uart_config[type].tx_loadsz;
}

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static void __init
serial8250_register_ports(struct uart_driver *drv, struct device *dev)
{
	int i;

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	for (i = 0; i < nr_uarts; i++) {
		struct uart_8250_port *up = &serial8250_ports[i];
		up->cur_iotype = 0xFF;
	}

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	serial8250_isa_init_ports();

2807
	for (i = 0; i < nr_uarts; i++) {
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		struct uart_8250_port *up = &serial8250_ports[i];

		up->port.dev = dev;
2811 2812 2813 2814

		if (up->port.flags & UPF_FIXED_TYPE)
			serial8250_init_fixed_type_port(up, up->port.type);

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		uart_add_one_port(drv, &up->port);
	}
}

#ifdef CONFIG_SERIAL_8250_CONSOLE

2821 2822
static void serial8250_console_putchar(struct uart_port *port, int ch)
{
2823 2824
	struct uart_8250_port *up =
		container_of(port, struct uart_8250_port, port);
2825 2826 2827 2828 2829

	wait_for_xmitr(up, UART_LSR_THRE);
	serial_out(up, UART_TX, ch);
}

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/*
 *	Print a string to the serial port trying not to disturb
 *	any possible real use of the port...
 *
 *	The console_lock must be held when we get here.
 */
static void
serial8250_console_write(struct console *co, const char *s, unsigned int count)
{
	struct uart_8250_port *up = &serial8250_ports[co->index];
2840
	unsigned long flags;
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	unsigned int ier;
2842
	int locked = 1;
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2844 2845
	touch_nmi_watchdog();

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	local_irq_save(flags);
	if (up->port.sysrq) {
		/* serial8250_handle_port() already took the lock */
		locked = 0;
	} else if (oops_in_progress) {
		locked = spin_trylock(&up->port.lock);
2852
	} else
2853
		spin_lock(&up->port.lock);
2854

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	/*
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	 *	First save the IER then disable the interrupts
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	 */
	ier = serial_in(up, UART_IER);

	if (up->capabilities & UART_CAP_UUE)
		serial_out(up, UART_IER, UART_IER_UUE);
	else
		serial_out(up, UART_IER, 0);

2865
	uart_console_write(&up->port, s, count, serial8250_console_putchar);
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	/*
	 *	Finally, wait for transmitter to become empty
	 *	and restore the IER
	 */
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	wait_for_xmitr(up, BOTH_EMPTY);
2872
	serial_out(up, UART_IER, ier);
2873

2874 2875 2876 2877 2878 2879 2880 2881 2882 2883
	/*
	 *	The receive handling will happen properly because the
	 *	receive ready bit will still be set; it is not cleared
	 *	on read.  However, modem control will not, we must
	 *	call it if we have saved something in the saved flags
	 *	while processing with interrupts off.
	 */
	if (up->msr_saved_flags)
		check_modem_status(up);

2884
	if (locked)
2885 2886
		spin_unlock(&up->port.lock);
	local_irq_restore(flags);
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}

2889
static int __init serial8250_console_setup(struct console *co, char *options)
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{
	struct uart_port *port;
	int baud = 9600;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';

	/*
	 * Check whether an invalid uart number has been specified, and
	 * if so, search for the first available port that does have
	 * console support.
	 */
2902
	if (co->index >= nr_uarts)
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		co->index = 0;
	port = &serial8250_ports[co->index].port;
	if (!port->iobase && !port->membase)
		return -ENODEV;

	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);

	return uart_set_options(port, co, baud, parity, bits, flow);
}

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static int serial8250_console_early_setup(void)
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{
	return serial8250_find_port_for_earlycon();
}

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static struct console serial8250_console = {
	.name		= "ttyS",
	.write		= serial8250_console_write,
	.device		= uart_console_device,
	.setup		= serial8250_console_setup,
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	.early_setup	= serial8250_console_early_setup,
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	.flags		= CON_PRINTBUFFER | CON_ANYTIME,
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	.index		= -1,
	.data		= &serial8250_reg,
};

static int __init serial8250_console_init(void)
{
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	if (nr_uarts > UART_NR)
		nr_uarts = UART_NR;

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	serial8250_isa_init_ports();
	register_console(&serial8250_console);
	return 0;
}
console_initcall(serial8250_console_init);

2941
int serial8250_find_port(struct uart_port *p)
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{
	int line;
	struct uart_port *port;

2946
	for (line = 0; line < nr_uarts; line++) {
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		port = &serial8250_ports[line].port;
2948
		if (uart_match_port(p, port))
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			return line;
	}
	return -ENODEV;
}

#define SERIAL8250_CONSOLE	&serial8250_console
#else
#define SERIAL8250_CONSOLE	NULL
#endif

static struct uart_driver serial8250_reg = {
	.owner			= THIS_MODULE,
	.driver_name		= "serial",
	.dev_name		= "ttyS",
	.major			= TTY_MAJOR,
	.minor			= 64,
	.cons			= SERIAL8250_CONSOLE,
};

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/*
 * early_serial_setup - early registration for 8250 ports
 *
 * Setup an 8250 port structure prior to console initialisation.  Use
 * after console initialisation will cause undefined behaviour.
 */
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int __init early_serial_setup(struct uart_port *port)
{
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	struct uart_port *p;

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	if (port->line >= ARRAY_SIZE(serial8250_ports))
		return -ENODEV;

	serial8250_isa_init_ports();
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	p = &serial8250_ports[port->line].port;
	p->iobase       = port->iobase;
	p->membase      = port->membase;
	p->irq          = port->irq;
2986
	p->irqflags     = port->irqflags;
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	p->uartclk      = port->uartclk;
	p->fifosize     = port->fifosize;
	p->regshift     = port->regshift;
	p->iotype       = port->iotype;
	p->flags        = port->flags;
	p->mapbase      = port->mapbase;
	p->private_data = port->private_data;
2994 2995
	p->type		= port->type;
	p->line		= port->line;
2996 2997 2998 2999 3000 3001 3002

	set_io_from_upio(p);
	if (port->serial_in)
		p->serial_in = port->serial_in;
	if (port->serial_out)
		p->serial_out = port->serial_out;

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	return 0;
}

/**
 *	serial8250_suspend_port - suspend one serial port
 *	@line:  serial line number
 *
 *	Suspend one serial port.
 */
void serial8250_suspend_port(int line)
{
	uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
}

/**
 *	serial8250_resume_port - resume one serial port
 *	@line:  serial line number
 *
 *	Resume one serial port.
 */
void serial8250_resume_port(int line)
{
3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038
	struct uart_8250_port *up = &serial8250_ports[line];

	if (up->capabilities & UART_NATSEMI) {
		unsigned char tmp;

		/* Ensure it's still in high speed mode */
		serial_outp(up, UART_LCR, 0xE0);

		tmp = serial_in(up, 0x04); /* EXCR2 */
		tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
		tmp |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
		serial_outp(up, 0x04, tmp);

		serial_outp(up, UART_LCR, 0);
3039
		up->port.uartclk = 921600*16;
3040 3041
	}
	uart_resume_port(&serial8250_reg, &up->port);
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}

/*
 * Register a set of serial devices attached to a platform device.  The
 * list is terminated with a zero flags entry, which means we expect
 * all entries to have at least UPF_BOOT_AUTOCONF set.
 */
3049
static int __devinit serial8250_probe(struct platform_device *dev)
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{
3051
	struct plat_serial8250_port *p = dev->dev.platform_data;
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	struct uart_port port;
3053
	int ret, i, irqflag = 0;
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	memset(&port, 0, sizeof(struct uart_port));

3057 3058 3059
	if (share_irqs)
		irqflag = IRQF_SHARED;

3060
	for (i = 0; p && p->flags != 0; p++, i++) {
3061 3062 3063
		port.iobase		= p->iobase;
		port.membase		= p->membase;
		port.irq		= p->irq;
3064
		port.irqflags		= p->irqflags;
3065 3066 3067 3068 3069 3070 3071
		port.uartclk		= p->uartclk;
		port.regshift		= p->regshift;
		port.iotype		= p->iotype;
		port.flags		= p->flags;
		port.mapbase		= p->mapbase;
		port.hub6		= p->hub6;
		port.private_data	= p->private_data;
3072
		port.type		= p->type;
3073 3074
		port.serial_in		= p->serial_in;
		port.serial_out		= p->serial_out;
3075
		port.set_termios	= p->set_termios;
3076
		port.pm			= p->pm;
3077
		port.dev		= &dev->dev;
3078
		port.irqflags		|= irqflag;
3079 3080
		ret = serial8250_register_port(&port);
		if (ret < 0) {
3081
			dev_err(&dev->dev, "unable to register port at index %d "
3082 3083 3084
				"(IO%lx MEM%llx IRQ%d): %d\n", i,
				p->iobase, (unsigned long long)p->mapbase,
				p->irq, ret);
3085
		}
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	}
	return 0;
}

/*
 * Remove serial ports registered against a platform device.
 */
3093
static int __devexit serial8250_remove(struct platform_device *dev)
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{
	int i;

3097
	for (i = 0; i < nr_uarts; i++) {
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		struct uart_8250_port *up = &serial8250_ports[i];

3100
		if (up->port.dev == &dev->dev)
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			serial8250_unregister_port(i);
	}
	return 0;
}

3106
static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
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{
	int i;

	for (i = 0; i < UART_NR; i++) {
		struct uart_8250_port *up = &serial8250_ports[i];

3113
		if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
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			uart_suspend_port(&serial8250_reg, &up->port);
	}

	return 0;
}

3120
static int serial8250_resume(struct platform_device *dev)
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{
	int i;

	for (i = 0; i < UART_NR; i++) {
		struct uart_8250_port *up = &serial8250_ports[i];

3127
		if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3128
			serial8250_resume_port(i);
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	}

	return 0;
}

3134
static struct platform_driver serial8250_isa_driver = {
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	.probe		= serial8250_probe,
	.remove		= __devexit_p(serial8250_remove),
	.suspend	= serial8250_suspend,
	.resume		= serial8250_resume,
3139 3140
	.driver		= {
		.name	= "serial8250",
3141
		.owner	= THIS_MODULE,
3142
	},
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};

/*
 * This "device" covers _all_ ISA 8250-compatible serial devices listed
 * in the table in include/asm/serial.h
 */
static struct platform_device *serial8250_isa_devs;

/*
 * serial8250_register_port and serial8250_unregister_port allows for
 * 16x50 serial ports to be configured at run-time, to support PCMCIA
 * modems and PCI multiport cards.
 */
3156
static DEFINE_MUTEX(serial_mutex);
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static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
{
	int i;

	/*
	 * First, find a port entry which matches.
	 */
3165
	for (i = 0; i < nr_uarts; i++)
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		if (uart_match_port(&serial8250_ports[i].port, port))
			return &serial8250_ports[i];

	/*
	 * We didn't find a matching entry, so look for the first
	 * free entry.  We look for one which hasn't been previously
	 * used (indicated by zero iobase).
	 */
3174
	for (i = 0; i < nr_uarts; i++)
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		if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
		    serial8250_ports[i].port.iobase == 0)
			return &serial8250_ports[i];

	/*
	 * That also failed.  Last resort is to find any entry which
	 * doesn't have a real port associated with it.
	 */
3183
	for (i = 0; i < nr_uarts; i++)
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		if (serial8250_ports[i].port.type == PORT_UNKNOWN)
			return &serial8250_ports[i];

	return NULL;
}

/**
 *	serial8250_register_port - register a serial port
 *	@port: serial port template
 *
 *	Configure the serial port specified by the request. If the
 *	port exists and is in use, it is hung up and unregistered
 *	first.
 *
 *	The port is then probed and if necessary the IRQ is autodetected
 *	If this fails an error is returned.
 *
 *	On success the port is ready to use and the line number is returned.
 */
int serial8250_register_port(struct uart_port *port)
{
	struct uart_8250_port *uart;
	int ret = -ENOSPC;

	if (port->uartclk == 0)
		return -EINVAL;

3211
	mutex_lock(&serial_mutex);
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	uart = serial8250_find_match_or_unused(port);
	if (uart) {
		uart_remove_one_port(&serial8250_reg, &uart->port);

3217 3218 3219
		uart->port.iobase       = port->iobase;
		uart->port.membase      = port->membase;
		uart->port.irq          = port->irq;
3220
		uart->port.irqflags     = port->irqflags;
3221 3222 3223 3224 3225 3226 3227
		uart->port.uartclk      = port->uartclk;
		uart->port.fifosize     = port->fifosize;
		uart->port.regshift     = port->regshift;
		uart->port.iotype       = port->iotype;
		uart->port.flags        = port->flags | UPF_BOOT_AUTOCONF;
		uart->port.mapbase      = port->mapbase;
		uart->port.private_data = port->private_data;
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		if (port->dev)
			uart->port.dev = port->dev;
3230

3231 3232
		if (port->flags & UPF_FIXED_TYPE)
			serial8250_init_fixed_type_port(uart, port->type);
3233

3234 3235 3236 3237 3238 3239
		set_io_from_upio(&uart->port);
		/* Possibly override default I/O functions.  */
		if (port->serial_in)
			uart->port.serial_in = port->serial_in;
		if (port->serial_out)
			uart->port.serial_out = port->serial_out;
3240 3241 3242
		/*  Possibly override set_termios call */
		if (port->set_termios)
			uart->port.set_termios = port->set_termios;
3243 3244
		if (port->pm)
			uart->port.pm = port->pm;
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3246 3247 3248 3249
		if (serial8250_isa_config != NULL)
			serial8250_isa_config(0, &uart->port,
					&uart->capabilities);

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		ret = uart_add_one_port(&serial8250_reg, &uart->port);
		if (ret == 0)
			ret = uart->port.line;
	}
3254
	mutex_unlock(&serial_mutex);
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3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270

	return ret;
}
EXPORT_SYMBOL(serial8250_register_port);

/**
 *	serial8250_unregister_port - remove a 16x50 serial port at runtime
 *	@line: serial line number
 *
 *	Remove one serial port.  This may not be called from interrupt
 *	context.  We hand the port back to the our control.
 */
void serial8250_unregister_port(int line)
{
	struct uart_8250_port *uart = &serial8250_ports[line];

3271
	mutex_lock(&serial_mutex);
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	uart_remove_one_port(&serial8250_reg, &uart->port);
	if (serial8250_isa_devs) {
		uart->port.flags &= ~UPF_BOOT_AUTOCONF;
		uart->port.type = PORT_UNKNOWN;
		uart->port.dev = &serial8250_isa_devs->dev;
		uart_add_one_port(&serial8250_reg, &uart->port);
	} else {
		uart->port.dev = NULL;
	}
3281
	mutex_unlock(&serial_mutex);
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}
EXPORT_SYMBOL(serial8250_unregister_port);

static int __init serial8250_init(void)
{
A
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3287
	int ret;
L
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3289 3290 3291
	if (nr_uarts > UART_NR)
		nr_uarts = UART_NR;

3292
	printk(KERN_INFO "Serial: 8250/16550 driver, "
3293
		"%d ports, IRQ sharing %sabled\n", nr_uarts,
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		share_irqs ? "en" : "dis");

3296 3297 3298 3299
#ifdef CONFIG_SPARC
	ret = sunserial_register_minors(&serial8250_reg, UART_NR);
#else
	serial8250_reg.nr = UART_NR;
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3300
	ret = uart_register_driver(&serial8250_reg);
3301
#endif
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3302 3303 3304
	if (ret)
		goto out;

3305 3306 3307 3308
	serial8250_isa_devs = platform_device_alloc("serial8250",
						    PLAT8250_DEV_LEGACY);
	if (!serial8250_isa_devs) {
		ret = -ENOMEM;
3309
		goto unreg_uart_drv;
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3310 3311
	}

3312 3313 3314 3315
	ret = platform_device_add(serial8250_isa_devs);
	if (ret)
		goto put_dev;

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3316 3317
	serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);

3318 3319 3320
	ret = platform_driver_register(&serial8250_isa_driver);
	if (ret == 0)
		goto out;
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3321

3322
	platform_device_del(serial8250_isa_devs);
A
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3323
put_dev:
3324
	platform_device_put(serial8250_isa_devs);
A
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3325
unreg_uart_drv:
3326 3327 3328
#ifdef CONFIG_SPARC
	sunserial_unregister_minors(&serial8250_reg, UART_NR);
#else
L
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3329
	uart_unregister_driver(&serial8250_reg);
3330
#endif
A
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3331
out:
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3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345
	return ret;
}

static void __exit serial8250_exit(void)
{
	struct platform_device *isa_dev = serial8250_isa_devs;

	/*
	 * This tells serial8250_unregister_port() not to re-register
	 * the ports (thereby making serial8250_isa_driver permanently
	 * in use.)
	 */
	serial8250_isa_devs = NULL;

3346
	platform_driver_unregister(&serial8250_isa_driver);
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3347 3348
	platform_device_unregister(isa_dev);

3349 3350 3351
#ifdef CONFIG_SPARC
	sunserial_unregister_minors(&serial8250_reg, UART_NR);
#else
L
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3352
	uart_unregister_driver(&serial8250_reg);
3353
#endif
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3354 3355 3356 3357 3358 3359 3360 3361 3362
}

module_init(serial8250_init);
module_exit(serial8250_exit);

EXPORT_SYMBOL(serial8250_suspend_port);
EXPORT_SYMBOL(serial8250_resume_port);

MODULE_LICENSE("GPL");
3363
MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
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3364 3365 3366 3367 3368

module_param(share_irqs, uint, 0644);
MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
	" (unsafe)");

3369 3370 3371
module_param(nr_uarts, uint, 0644);
MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");

3372 3373 3374
module_param(skip_txen_test, uint, 0644);
MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");

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3375 3376 3377 3378 3379
#ifdef CONFIG_SERIAL_8250_RSA
module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
#endif
MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);