s3c244x.c 4.5 KB
Newer Older
1
/* linux/arch/arm/plat-s3c24xx/s3c244x.c
2 3 4 5
 *
 * Copyright (c) 2004-2006 Simtec Electronics
 *   Ben Dooks <ben@simtec.co.uk>
 *
6
 * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
7 8 9 10 11 12 13 14 15 16 17 18
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
19
#include <linux/serial_core.h>
20 21
#include <linux/platform_device.h>
#include <linux/sysdev.h>
22
#include <linux/syscore_ops.h>
23
#include <linux/clk.h>
24
#include <linux/io.h>
25 26 27 28 29

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

30
#include <mach/hardware.h>
31 32
#include <asm/irq.h>

33 34
#include <plat/cpu-freq.h>

35
#include <mach/regs-clock.h>
36
#include <plat/regs-serial.h>
37 38 39
#include <mach/regs-gpio.h>
#include <mach/regs-gpioj.h>
#include <mach/regs-dsc.h>
40

41
#include <plat/s3c2410.h>
42
#include <plat/s3c244x.h>
43
#include <plat/clock.h>
44 45 46
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/pm.h>
47
#include <plat/pll.h>
48
#include <plat/nand-core.h>
49 50 51 52 53 54 55 56 57 58 59 60 61 62

static struct map_desc s3c244x_iodesc[] __initdata = {
	IODESC_ENT(CLKPWR),
	IODESC_ENT(TIMER),
	IODESC_ENT(WATCHDOG),
};

/* uart initialisation */

void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
	s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
}

63
void __init s3c244x_map_io(void)
64 65 66 67 68 69 70
{
	/* register our io-tables */

	iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));

	/* rename any peripherals used differing from the s3c2410 */

71
	s3c_device_sdi.name  = "s3c2440-sdi";
72
	s3c_device_i2c0.name  = "s3c2440-i2c";
73
	s3c_nand_setname("s3c2440-nand");
74
	s3c_device_ts.name = "s3c2440-ts";
75
	s3c_device_usbgadget.name = "s3c2440-usbgadget";
76 77
}

78
void __init_or_cpufreq s3c244x_setup_clocks(void)
79
{
80
	struct clk *xtal_clk;
81 82
	unsigned long clkdiv;
	unsigned long camdiv;
83
	unsigned long xtal;
84 85 86
	unsigned long hclk, fclk, pclk;
	int hdiv = 1;

87 88 89
	xtal_clk = clk_get(NULL, "xtal");
	xtal = clk_get_rate(xtal_clk);
	clk_put(xtal_clk);
90

91
	fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116

	clkdiv = __raw_readl(S3C2410_CLKDIVN);
	camdiv = __raw_readl(S3C2440_CAMDIVN);

	/* work out clock scalings */

	switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
	case S3C2440_CLKDIVN_HDIVN_1:
		hdiv = 1;
		break;

	case S3C2440_CLKDIVN_HDIVN_2:
		hdiv = 2;
		break;

	case S3C2440_CLKDIVN_HDIVN_4_8:
		hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
		break;

	case S3C2440_CLKDIVN_HDIVN_3_6:
		hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
		break;
	}

	hclk = fclk / hdiv;
117
	pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
118 119 120 121 122 123

	/* print brief summary of clocks, etc */

	printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
	       print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));

124 125 126 127 128
	s3c24xx_setup_clocks(fclk, hclk, pclk);
}

void __init s3c244x_init_clocks(int xtal)
{
129 130 131 132
	/* initialise the clocks here, to allow other things like the
	 * console to use them, and to add new ones after the initialisation
	 */

133 134
	s3c24xx_register_baseclocks(xtal);
	s3c244x_setup_clocks();
135
	s3c2410_baseclk_add();
136 137 138 139 140
}

/* Since the S3C2442 and S3C2440 share  items, put both sysclasses here */

struct sysdev_class s3c2440_sysclass = {
141
	.name		= "s3c2440-core",
142 143 144
};

struct sysdev_class s3c2442_sysclass = {
145
	.name		= "s3c2442-core",
146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
};

/* need to register class before we actually register the device, and
 * we also need to ensure that it has been initialised before any of the
 * drivers even try to use it (even if not on an s3c2440 based system)
 * as a driver which may support both 2410 and 2440 may try and use it.
*/

static int __init s3c2440_core_init(void)
{
	return sysdev_class_register(&s3c2440_sysclass);
}

core_initcall(s3c2440_core_init);

static int __init s3c2442_core_init(void)
{
	return sysdev_class_register(&s3c2442_sysclass);
}

core_initcall(s3c2442_core_init);
167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196


#ifdef CONFIG_PM
static struct sleep_save s3c244x_sleep[] = {
	SAVE_ITEM(S3C2440_DSC0),
	SAVE_ITEM(S3C2440_DSC1),
	SAVE_ITEM(S3C2440_GPJDAT),
	SAVE_ITEM(S3C2440_GPJCON),
	SAVE_ITEM(S3C2440_GPJUP)
};

static int s3c244x_suspend(void)
{
	s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
	return 0;
}

static void s3c244x_resume(void)
{
	s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
}
#else
#define s3c244x_suspend NULL
#define s3c244x_resume  NULL
#endif

struct syscore_ops s3c244x_pm_syscore_ops = {
	.suspend	= s3c244x_suspend,
	.resume		= s3c244x_resume,
};