radeon_pm.c 10.3 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
/*
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Rafał Miłecki <zajec5@gmail.com>
21
 *          Alex Deucher <alexdeucher@gmail.com>
22 23 24 25
 */
#include "drmP.h"
#include "radeon.h"

26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
#define RADEON_IDLE_LOOP_MS 100
#define RADEON_RECLOCK_DELAY_MS 200

static void radeon_pm_check_limits(struct radeon_device *rdev);
static void radeon_pm_set_clocks_locked(struct radeon_device *rdev);
static void radeon_pm_set_clocks(struct radeon_device *rdev);
static void radeon_pm_reclock_work_handler(struct work_struct *work);
static void radeon_pm_idle_work_handler(struct work_struct *work);
static int radeon_debugfs_pm_init(struct radeon_device *rdev);

static const char *pm_state_names[4] = {
	"PM_STATE_DISABLED",
	"PM_STATE_MINIMUM",
	"PM_STATE_PAUSED",
	"PM_STATE_ACTIVE"
};
42

43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71
static void radeon_print_power_mode_info(struct radeon_device *rdev)
{
	int i, j;
	bool is_default;

	DRM_INFO("%d Power State(s)\n", rdev->pm.num_power_states);
	for (i = 0; i < rdev->pm.num_power_states; i++) {
		if (rdev->pm.default_power_state == &rdev->pm.power_state[i])
			is_default = true;
		else
			is_default = false;
		DRM_INFO("State %d %s\n", i, is_default ? "(default)" : "");
		if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP))
			DRM_INFO("\t%d PCIE Lanes\n", rdev->pm.power_state[i].non_clock_info.pcie_lanes);
		DRM_INFO("\t%d Clock Mode(s)\n", rdev->pm.power_state[i].num_clock_modes);
		for (j = 0; j < rdev->pm.power_state[i].num_clock_modes; j++) {
			if (rdev->flags & RADEON_IS_IGP)
				DRM_INFO("\t\t%d engine: %d\n",
					 j,
					 rdev->pm.power_state[i].clock_info[j].sclk * 10);
			else
				DRM_INFO("\t\t%d engine/memory: %d/%d\n",
					 j,
					 rdev->pm.power_state[i].clock_info[j].sclk * 10,
					 rdev->pm.power_state[i].clock_info[j].mclk * 10);
		}
	}
}

72 73
int radeon_pm_init(struct radeon_device *rdev)
{
74 75 76 77 78
	rdev->pm.state = PM_STATE_DISABLED;
	rdev->pm.planned_action = PM_ACTION_NONE;
	rdev->pm.downclocked = false;
	rdev->pm.vblank_callback = false;

79 80 81 82 83 84 85 86
	if (rdev->bios) {
		if (rdev->is_atom_bios)
			radeon_atombios_get_power_modes(rdev);
		else
			radeon_combios_get_power_modes(rdev);
		radeon_print_power_mode_info(rdev);
	}

87 88
	radeon_pm_check_limits(rdev);

89
	if (radeon_debugfs_pm_init(rdev)) {
R
Rafał Miłecki 已提交
90
		DRM_ERROR("Failed to register debugfs file for PM!\n");
91 92
	}

93 94 95 96 97 98 99 100 101 102
	INIT_WORK(&rdev->pm.reclock_work, radeon_pm_reclock_work_handler);
	INIT_DELAYED_WORK(&rdev->pm.idle_work, radeon_pm_idle_work_handler);

	if (radeon_dynpm != -1 && radeon_dynpm) {
		rdev->pm.state = PM_STATE_PAUSED;
		DRM_INFO("radeon: dynamic power management enabled\n");
	}

	DRM_INFO("radeon: power management initialized\n");

103 104 105
	return 0;
}

106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309
static void radeon_pm_check_limits(struct radeon_device *rdev)
{
	rdev->pm.min_gpu_engine_clock = rdev->clock.default_sclk - 5000;
	rdev->pm.min_gpu_memory_clock = rdev->clock.default_mclk - 5000;
}

void radeon_pm_compute_clocks(struct radeon_device *rdev)
{
	struct drm_device *ddev = rdev->ddev;
	struct drm_connector *connector;
	struct radeon_crtc *radeon_crtc;
	int count = 0;

	if (rdev->pm.state == PM_STATE_DISABLED)
		return;

	mutex_lock(&rdev->pm.mutex);

	rdev->pm.active_crtcs = 0;
	list_for_each_entry(connector,
		&ddev->mode_config.connector_list, head) {
		if (connector->encoder &&
			connector->dpms != DRM_MODE_DPMS_OFF) {
			radeon_crtc = to_radeon_crtc(connector->encoder->crtc);
			rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id);
			++count;
		}
	}

	if (count > 1) {
		if (rdev->pm.state == PM_STATE_ACTIVE) {
			wait_queue_head_t wait;
			init_waitqueue_head(&wait);

			cancel_delayed_work(&rdev->pm.idle_work);

			rdev->pm.state = PM_STATE_PAUSED;
			rdev->pm.planned_action = PM_ACTION_UPCLOCK;
			rdev->pm.vblank_callback = true;

			mutex_unlock(&rdev->pm.mutex);

			wait_event_timeout(wait, !rdev->pm.downclocked,
				msecs_to_jiffies(300));
			if (!rdev->pm.downclocked)
				radeon_pm_set_clocks(rdev);

			DRM_DEBUG("radeon: dynamic power management deactivated\n");
		} else {
			mutex_unlock(&rdev->pm.mutex);
		}
	} else if (count == 1) {
		rdev->pm.min_mode_engine_clock = rdev->pm.min_gpu_engine_clock;
		rdev->pm.min_mode_memory_clock = rdev->pm.min_gpu_memory_clock;
		/* TODO: Increase clocks if needed for current mode */

		if (rdev->pm.state == PM_STATE_MINIMUM) {
			rdev->pm.state = PM_STATE_ACTIVE;
			rdev->pm.planned_action = PM_ACTION_UPCLOCK;
			radeon_pm_set_clocks_locked(rdev);

			queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
				msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
		}
		else if (rdev->pm.state == PM_STATE_PAUSED) {
			rdev->pm.state = PM_STATE_ACTIVE;
			queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
				msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
			DRM_DEBUG("radeon: dynamic power management activated\n");
		}

		mutex_unlock(&rdev->pm.mutex);
	}
	else { /* count == 0 */
		if (rdev->pm.state != PM_STATE_MINIMUM) {
			cancel_delayed_work(&rdev->pm.idle_work);

			rdev->pm.state = PM_STATE_MINIMUM;
			rdev->pm.planned_action = PM_ACTION_MINIMUM;
			radeon_pm_set_clocks_locked(rdev);
		}

		mutex_unlock(&rdev->pm.mutex);
	}
}

static void radeon_pm_set_clocks_locked(struct radeon_device *rdev)
{
	/*radeon_fence_wait_last(rdev);*/
	switch (rdev->pm.planned_action) {
	case PM_ACTION_UPCLOCK:
		radeon_set_engine_clock(rdev, rdev->clock.default_sclk);
		rdev->pm.downclocked = false;
		break;
	case PM_ACTION_DOWNCLOCK:
		radeon_set_engine_clock(rdev,
			rdev->pm.min_mode_engine_clock);
		rdev->pm.downclocked = true;
		break;
	case PM_ACTION_MINIMUM:
		radeon_set_engine_clock(rdev,
			rdev->pm.min_gpu_engine_clock);
		break;
	case PM_ACTION_NONE:
		DRM_ERROR("%s: PM_ACTION_NONE\n", __func__);
		break;
	}

	rdev->pm.planned_action = PM_ACTION_NONE;
}

static void radeon_pm_set_clocks(struct radeon_device *rdev)
{
	mutex_lock(&rdev->pm.mutex);
	/* new VBLANK irq may come before handling previous one */
	if (rdev->pm.vblank_callback) {
		mutex_lock(&rdev->cp.mutex);
		if (rdev->pm.req_vblank & (1 << 0)) {
			rdev->pm.req_vblank &= ~(1 << 0);
			drm_vblank_put(rdev->ddev, 0);
		}
		if (rdev->pm.req_vblank & (1 << 1)) {
			rdev->pm.req_vblank &= ~(1 << 1);
			drm_vblank_put(rdev->ddev, 1);
		}
		rdev->pm.vblank_callback = false;
		radeon_pm_set_clocks_locked(rdev);
		mutex_unlock(&rdev->cp.mutex);
	}
	mutex_unlock(&rdev->pm.mutex);
}

static void radeon_pm_reclock_work_handler(struct work_struct *work)
{
	struct radeon_device *rdev;
	rdev = container_of(work, struct radeon_device,
				pm.reclock_work);
	radeon_pm_set_clocks(rdev);
}

static void radeon_pm_idle_work_handler(struct work_struct *work)
{
	struct radeon_device *rdev;
	rdev = container_of(work, struct radeon_device,
				pm.idle_work.work);

	mutex_lock(&rdev->pm.mutex);
	if (rdev->pm.state == PM_STATE_ACTIVE &&
		!rdev->pm.vblank_callback) {
		unsigned long irq_flags;
		int not_processed = 0;

		read_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
		if (!list_empty(&rdev->fence_drv.emited)) {
			struct list_head *ptr;
			list_for_each(ptr, &rdev->fence_drv.emited) {
				/* count up to 3, that's enought info */
				if (++not_processed >= 3)
					break;
			}
		}
		read_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);

		if (not_processed >= 3) { /* should upclock */
			if (rdev->pm.planned_action == PM_ACTION_DOWNCLOCK) {
				rdev->pm.planned_action = PM_ACTION_NONE;
			} else if (rdev->pm.planned_action == PM_ACTION_NONE &&
				rdev->pm.downclocked) {
				rdev->pm.planned_action =
					PM_ACTION_UPCLOCK;
				rdev->pm.action_timeout = jiffies +
				msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
			}
		} else if (not_processed == 0) { /* should downclock */
			if (rdev->pm.planned_action == PM_ACTION_UPCLOCK) {
				rdev->pm.planned_action = PM_ACTION_NONE;
			} else if (rdev->pm.planned_action == PM_ACTION_NONE &&
				!rdev->pm.downclocked) {
				rdev->pm.planned_action =
					PM_ACTION_DOWNCLOCK;
				rdev->pm.action_timeout = jiffies +
				msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
			}
		}

		if (rdev->pm.planned_action != PM_ACTION_NONE &&
			jiffies > rdev->pm.action_timeout) {
			if (rdev->pm.active_crtcs & (1 << 0)) {
				rdev->pm.req_vblank |= (1 << 0);
				drm_vblank_get(rdev->ddev, 0);
			}
			if (rdev->pm.active_crtcs & (1 << 1)) {
				rdev->pm.req_vblank |= (1 << 1);
				drm_vblank_get(rdev->ddev, 1);
			}
			rdev->pm.vblank_callback = true;
		}
	}
	mutex_unlock(&rdev->pm.mutex);

	queue_delayed_work(rdev->wq, &rdev->pm.idle_work,
					msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
}

310 311 312 313 314 315 316 317 318 319 320
/*
 * Debugfs info
 */
#if defined(CONFIG_DEBUG_FS)

static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct radeon_device *rdev = dev->dev_private;

321
	seq_printf(m, "state: %s\n", pm_state_names[rdev->pm.state]);
322 323 324 325 326
	seq_printf(m, "default engine clock: %u0 kHz\n", rdev->clock.default_sclk);
	seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
	seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk);
	if (rdev->asic->get_memory_clock)
		seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
327 328 329 330 331 332 333 334 335

	return 0;
}

static struct drm_info_list radeon_pm_info_list[] = {
	{"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL},
};
#endif

336
static int radeon_debugfs_pm_init(struct radeon_device *rdev)
337 338 339 340 341 342 343
{
#if defined(CONFIG_DEBUG_FS)
	return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list));
#else
	return 0;
#endif
}